From e4734e6ca90f14febb120eea635fa4e723275336 Mon Sep 17 00:00:00 2001 From: AdvaySingh1 Date: Thu, 12 Feb 2026 12:49:15 -0800 Subject: [PATCH] Added comments explaining the MUX network repair Idea to see if there's a combinational circuit out of the input values which can serve as the enable signal --- notes.txt | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/notes.txt b/notes.txt index 1d39c08f9..27756baf1 100644 --- a/notes.txt +++ b/notes.txt @@ -269,4 +269,27 @@ bool input_set_is_enable_exact(const pool &input_set, SigSpec sig_d, Sig Setting up the SAT condition: - Need to have the equation for Q, need to have the equation for D need to XOR those equations, need to XOR that equation with the new - one. Need to make sure that that's never SAT. \ No newline at end of file + one. Need to make sure that that's never SAT. + + + + + + + + + +Ok so I have this idea: + + + + +I'm doing to take the input variables, universally quantize them and also take D and Q and universilly quantise them + +Then I have this formula SAT((D^Q) !^ MUX)) + +Where the MUX has (for the select inputs the input values, and then has random variables d_0 to D_2^n when there's n inputs. + +SAT returns the combination of the values for d which make this work. + +But in this case, how can I go from determining the values of the Ds to determine the gates and converting that to combinational logic? And also, how can I Universially Quantize the other values? \ No newline at end of file