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logger: sort out help message related multi line logging

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This commit is contained in:
Miodrag Milanovic
2026-10-07 07:49:29 +02:00
parent d46606243a
commit ddd4277bf4
12 changed files with 52 additions and 53 deletions
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kernel/log_help.cc
+2 -1
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@@ -125,7 +125,8 @@ void log_body_str(const std::string &pass_str, std::string indent_str, bool lead
word = word.substr(1, word.length()-2);
if (curr_len + word.length() >= MAX_LINE_LEN-1) {
curr_len = 0;
message += "\n" + indent_str;
log("%s\n", message);
message = indent_str;
}
if (word.length()) {
message += word + " ";
passes/equiv/equiv.h
+12 -14
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@@ -34,20 +34,18 @@ struct EquivBasicConfig {
}
return false;
}
static std::string help(const char* default_seq) {
return stringf(
" -undef\n"
" enable modelling of undef states\n"
"\n"
" -seq <N>\n"
" the max. number of time steps to be considered (default = %s)\n"
"\n"
" -set-assumes\n"
" set all assumptions provided via $assume cells\n"
"\n"
" -ignore-unknown-cells\n"
" ignore all cells that can not be matched to a SAT model\n"
, default_seq);
static void help(const char* default_seq) {
log(" -undef\n");
log(" enable modelling of undef states\n");
log("\n");
log(" -seq <N>\n");
log(" the max. number of time steps to be considered (default = %s)\n", default_seq);
log("\n");
log(" -set-assumes\n");
log(" set all assumptions provided via $assume cells\n");
log("\n");
log(" -ignore-unknown-cells\n");
log(" ignore all cells that can not be matched to a SAT model\n");
}
};
passes/equiv/equiv_induct.cc
+1 -1
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@@ -174,7 +174,7 @@ struct EquivInductPass : public Pass {
log("Only selected $equiv cells are proven and only selected cells are used to\n");
log("perform the proof.\n");
log("\n");
log("%s", EquivBasicConfig::help("4"));
EquivBasicConfig::help("4");
log("\n");
log("This command is very effective in proving complex sequential circuits, when\n");
log("the internal state of the circuit quickly propagates to $equiv cells.\n");
passes/equiv/equiv_simple.cc
+13 -13
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@@ -45,18 +45,18 @@ struct EquivSimpleConfig : EquivBasicConfig {
}
return false;
}
static std::string help(const char* default_seq) {
return EquivBasicConfig::help(default_seq) +
" -v\n"
" verbose output\n"
"\n"
" -short\n"
" create shorter input cones that stop at shared nodes. This yields\n"
" simpler SAT problems but sometimes fails to prove equivalence.\n"
"\n"
" -nogroup\n"
" disabling grouping of $equiv cells by output wire\n"
"\n";
static void help(const char* default_seq) {
EquivBasicConfig::help(default_seq);
log(" -v\n");
log(" verbose output\n");
log("\n");
log(" -short\n");
log(" create shorter input cones that stop at shared nodes. This yields\n");
log(" simpler SAT problems but sometimes fails to prove equivalence.\n");
log("\n");
log(" -nogroup\n");
log(" disabling grouping of $equiv cells by output wire\n");
log("\n");
}
};
@@ -428,7 +428,7 @@ struct EquivSimplePass : public Pass {
log("\n");
log("This command tries to prove $equiv cells using a simple direct SAT approach.\n");
log("\n");
log("%s", EquivSimpleConfig::help("1"));
EquivSimpleConfig::help("1");
log("\n");
}
void execute(std::vector<std::string> args, Design *design) override
passes/proc/proc_dlatch.h
+7 -8
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@@ -50,15 +50,14 @@ struct SynthLatchesConfig {
const char *str() const { return latch_policy_str(policy); }
static const char *help()
static void help()
{
return
" -latches <info|warn|error>\n"
" select the behaviour for latches that cannot be mapped to a\n"
" dedicated hardware primitive and are implemented using LUTs\n"
" instead. 'error' (the default) aborts synthesis, 'warn' only\n"
" prints a warning, and 'info' permits them with an info-level message.\n"
" Latches explicitly requested with 'always_latch' are always permitted.\n";
log(" -latches <info|warn|error>\n");
log(" select the behaviour for latches that cannot be mapped to a\n");
log(" dedicated hardware primitive and are implemented using LUTs\n");
log(" instead. 'error' (the default) aborts synthesis, 'warn' only\n");
log(" prints a warning, and 'info' permits them with an info-level message.\n");
log(" Latches explicitly requested with 'always_latch' are always permitted.\n");
}
};
passes/techmap/abc.cc
+11 -10
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@@ -824,7 +824,7 @@ std::string add_echos_to_abc_cmd(std::string str)
return new_str;
}
std::string fold_abc_cmd(std::string str)
void fold_abc_cmd(std::string str)
{
std::string token, new_str = " ";
int char_counter = 10;
@@ -833,14 +833,15 @@ std::string fold_abc_cmd(std::string str)
if (i < str.size())
token += str[i];
if (i == str.size() || str[i] == ';') {
if (char_counter + token.size() > 75)
new_str += "\n ", char_counter = 14;
if (char_counter + token.size() > 75) {
log("%s\n", new_str);
new_str = " ", char_counter = 14;
}
new_str += token, char_counter += token.size();
token.clear();
}
}
return new_str;
log("%s\n", new_str);
}
std::string replace_tempdir(std::string text, std::string_view global_tempdir_name, std::string_view per_run_tempdir_name, bool show_tempdir)
@@ -1892,19 +1893,19 @@ struct AbcPass : public Pass {
log(" if no -script parameter is given, the following scripts are used:\n");
log("\n");
log(" for -liberty/-genlib without -constr:\n");
log("%s\n", fold_abc_cmd(ABC_COMMAND_LIB));
fold_abc_cmd(ABC_COMMAND_LIB);
log("\n");
log(" for -liberty/-genlib with -constr:\n");
log("%s\n", fold_abc_cmd(ABC_COMMAND_CTR));
fold_abc_cmd(ABC_COMMAND_CTR);
log("\n");
log(" for -lut/-luts (only one LUT size):\n");
log("%s\n", fold_abc_cmd(ABC_COMMAND_LUT "; lutpack -S 1"));
fold_abc_cmd(ABC_COMMAND_LUT "; lutpack -S 1");
log("\n");
log(" for -lut/-luts (different LUT sizes):\n");
log("%s\n", fold_abc_cmd(ABC_COMMAND_LUT));
fold_abc_cmd(ABC_COMMAND_LUT);
log("\n");
log(" otherwise:\n");
log("%s\n", fold_abc_cmd(ABC_COMMAND_DFL));
fold_abc_cmd(ABC_COMMAND_DFL);
log("\n");
log(" -liberty <file>\n");
log(" generate netlists for the specified cell library (using the liberty\n");
techlibs/efinix/synth_efinix.cc
+1 -1
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@@ -61,7 +61,7 @@ struct SynthEfinixPass : public ScriptPass
log(" -nobram\n");
log(" do not use EFX_RAM_5K cells in output netlist\n");
log("\n");
log("%s", SynthLatchesConfig::help());
SynthLatchesConfig::help();
log("\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");
techlibs/fabulous/synth_fabulous.cc
+1 -1
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@@ -111,7 +111,7 @@ struct SynthPass : public ScriptPass {
log(" read/write collision\" (same result as setting the no_rw_check\n");
log(" attribute on all memories).\n");
log("\n");
log("%s", SynthLatchesConfig::help());
SynthLatchesConfig::help();
log("\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");
techlibs/ice40/synth_ice40.cc
+1 -1
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@@ -106,7 +106,7 @@ struct SynthIce40Pass : public ScriptPass
log(" read/write collision\" (same result as setting the no_rw_check\n");
log(" attribute on all memories).\n");
log("\n");
log("%s", SynthLatchesConfig::help());
SynthLatchesConfig::help();
log("\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");
techlibs/lattice/synth_lattice.cc
+1 -1
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@@ -148,7 +148,7 @@ struct SynthLatticePass : public ScriptPass
log(" implement constant comparisons in soft logic, do not involve\n");
log(" hard carry chains\n");
log("\n");
log("%s", SynthLatchesConfig::help());
SynthLatchesConfig::help();
log(" (ignored with -asyncprld, which has a latch primitive)\n");
log("\n");
log("\n");
techlibs/nanoxplore/synth_nanoxplore.cc
+1 -1
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@@ -95,7 +95,7 @@ struct SynthNanoXplorePass : public ScriptPass
log(" read/write collision\" (same result as setting the no_rw_check\n");
log(" attribute on all memories).\n");
log("\n");
log("%s", SynthLatchesConfig::help());
SynthLatchesConfig::help();
log("\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");
techlibs/quicklogic/synth_quicklogic.cc
+1 -1
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@@ -69,7 +69,7 @@ struct SynthQuickLogicPass : public ScriptPass {
log(" write the design to the specified verilog file. writing of an output\n");
log(" file is omitted if this parameter is not specified.\n");
log("\n");
log("%s", SynthLatchesConfig::help());
SynthLatchesConfig::help();
log(" (only applies to the pp3 family)\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");