mirror of https://github.com/YosysHQ/yosys.git
Add Design.run_pass API
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@ -1254,6 +1254,12 @@ std::vector<RTLIL::Module*> RTLIL::Design::selected_modules(RTLIL::SelectPartial
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return result;
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}
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void RTLIL::Design::run_pass(std::string command) {
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log("\n-- Running command `%s' --\n", command.c_str());
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Pass::call(this, command);
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log_flush();
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}
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RTLIL::Module::Module()
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{
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static unsigned int hashidx_count = 123456789;
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@ -1446,6 +1446,10 @@ struct RTLIL::Design
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// returns all selected unboxed whole modules, warning the user if any
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// partially selected or boxed modules have been ignored
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std::vector<RTLIL::Module*> selected_unboxed_whole_modules_warn() const { return selected_modules(SELECT_WHOLE_WARN, SB_UNBOXED_WARN); }
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// SILIMATE ADDED TO IMPROVE PYOSYS API
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void run_pass(std::string command);
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#ifdef WITH_PYTHON
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static std::map<unsigned int, RTLIL::Design*> *get_all_designs(void);
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#endif
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