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tests: fix rtlil roundtrip test

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Emil J. Tywoniak
2026-09-17 14:13:57 +02:00
parent 1e1cc5c916
commit 7818419608
1 changed files with 1 additions and 1 deletions
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tests/rtlil/roundtrip-text.sh
+1 -1
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@@ -10,7 +10,7 @@ remove_empty_lines() {
}
# write_rtlil and dump are equivalent
${YOSYS} -p "read_verilog -sv everything.v; copy alu zzz; proc zzz; dump -o temp/roundtrip-text.dump.il; write_rtlil temp/roundtrip-text.write.il"
${YOSYS} -p "read_verilog -sv everything.v; copy alu zzz; proc zzz; bufnorm -reset; dump -o temp/roundtrip-text.dump.il; write_rtlil temp/roundtrip-text.write.il"
remove_empty_lines temp/roundtrip-text.dump.il
remove_empty_lines temp/roundtrip-text.write.il
# Trim first line ("Generated by Yosys ...")