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Revert some vhdl stuff

This commit is contained in:
Akash Levy 2025-08-08 01:05:57 -07:00
parent 0e50fd3b74
commit 6a9102346a
1 changed files with 3 additions and 3 deletions
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6
frontends/verific/verific.cc
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@ -3585,9 +3585,9 @@ struct VerificPass : public Pass {
RuntimeFlags::SetVar("vhdl_support_variable_slice", 1);
RuntimeFlags::SetVar("vhdl_ignore_assertion_statements", 0);
// RuntimeFlags::SetVar("vhdl_preserve_assignments", 1); // SILIMATE: control this externally
// RuntimeFlags::SetVar("vhdl_preserve_comments", 1); // SILIMATE: control this externally
// RuntimeFlags::SetVar("vhdl_preserve_drivers", 1); // SILIMATE: control this externally
// RuntimeFlags::SetVar("vhdl_preserve_assignments", 1);
// RuntimeFlags::SetVar("vhdl_preserve_comments", 1);
// RuntimeFlags::SetVar("vhdl_preserve_drivers", 1);
#endif
#ifdef VERIFIC_SYSTEMVERILOG_SUPPORT
// RuntimeFlags::SetVar("veri_preserve_assignments", 1); // SILIMATE: control this externally