From 6a9102346a693b7d14e66be596004daadde130b2 Mon Sep 17 00:00:00 2001 From: Akash Levy Date: Fri, 8 Aug 2025 01:05:57 -0700 Subject: [PATCH] Revert some vhdl stuff --- frontends/verific/verific.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 6f76f9556..b7da455fa 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -3585,9 +3585,9 @@ struct VerificPass : public Pass { RuntimeFlags::SetVar("vhdl_support_variable_slice", 1); RuntimeFlags::SetVar("vhdl_ignore_assertion_statements", 0); - // RuntimeFlags::SetVar("vhdl_preserve_assignments", 1); // SILIMATE: control this externally - // RuntimeFlags::SetVar("vhdl_preserve_comments", 1); // SILIMATE: control this externally - // RuntimeFlags::SetVar("vhdl_preserve_drivers", 1); // SILIMATE: control this externally + // RuntimeFlags::SetVar("vhdl_preserve_assignments", 1); + // RuntimeFlags::SetVar("vhdl_preserve_comments", 1); + // RuntimeFlags::SetVar("vhdl_preserve_drivers", 1); #endif #ifdef VERIFIC_SYSTEMVERILOG_SUPPORT // RuntimeFlags::SetVar("veri_preserve_assignments", 1); // SILIMATE: control this externally