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hierarchy: tolerance for apparent recursive instances in techmap files
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@@ -687,6 +687,8 @@ bool set_keep_print(std::map<RTLIL::Module*, bool> &cache, RTLIL::Module *mod)
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if (cache.count(mod) == 0) {
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cache[mod] = false;
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for (auto c : mod->cells()) {
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if (mod->name == c->type)
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continue;
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RTLIL::Module *m = mod->design->module(c->type);
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if ((m != nullptr && set_keep_print(cache, m)) || c->type == ID($print)) {
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cache[mod] = true;
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@@ -702,6 +704,8 @@ bool set_keep_assert(std::map<RTLIL::Module*, bool> &cache, RTLIL::Module *mod)
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if (cache.count(mod) == 0) {
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cache[mod] = false;
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for (auto c : mod->cells()) {
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if (mod->name == c->type)
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continue;
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RTLIL::Module *m = mod->design->module(c->type);
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if ((m != nullptr && set_keep_assert(cache, m)) || c->type.in(ID($check), ID($assert), ID($assume), ID($live), ID($fair), ID($cover))) {
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cache[mod] = true;
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