hierarchy: tolerance for apparent recursive instances in techmap files

This commit is contained in:
Emil J. Tywoniak
2026-09-17 15:43:54 +02:00
parent 9226f55d17
commit 3ecb03eaa0
+4
View File
@@ -687,6 +687,8 @@ bool set_keep_print(std::map<RTLIL::Module*, bool> &cache, RTLIL::Module *mod)
if (cache.count(mod) == 0) {
cache[mod] = false;
for (auto c : mod->cells()) {
if (mod->name == c->type)
continue;
RTLIL::Module *m = mod->design->module(c->type);
if ((m != nullptr && set_keep_print(cache, m)) || c->type == ID($print)) {
cache[mod] = true;
@@ -702,6 +704,8 @@ bool set_keep_assert(std::map<RTLIL::Module*, bool> &cache, RTLIL::Module *mod)
if (cache.count(mod) == 0) {
cache[mod] = false;
for (auto c : mod->cells()) {
if (mod->name == c->type)
continue;
RTLIL::Module *m = mod->design->module(c->type);
if ((m != nullptr && set_keep_assert(cache, m)) || c->type.in(ID($check), ID($assert), ID($assume), ID($live), ID($fair), ID($cover))) {
cache[mod] = true;