A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
Go to file
Stefan Schippers fea391fcfd fix bug in subst_tok() ( subst_tok(NULL, "tok", "val") --> NULL instead of "tok=val") 2020-08-21 10:50:27 +02:00
XSchemWin Joanne fixes: in print_vhdl_primitive, set variable, format, from "vhdl_format" with get_tok_value before checking if its NULL, more work on windows port. 2020-08-10 23:43:20 +02:00
doc changed tcl procs abs_sym_path and rel_sym_path, now the real symbol filename is obtained by prepending one of the XSCHEM_LIBRARY_PATH paths until the symbol is found. This allows more than one directory levels in symbol references. 2020-08-13 02:19:08 +02:00
scconfig removed some dead code, remove_symbol() can remove i-th symbol, not only last one 2020-08-10 09:16:11 +02:00
src fix bug in subst_tok() ( subst_tok(NULL, "tok", "val") --> NULL instead of "tok=val") 2020-08-21 10:50:27 +02:00
tests Joanne fixes: in print_vhdl_primitive, set variable, format, from "vhdl_format" with get_tok_value before checking if its NULL, more work on windows port. 2020-08-10 23:43:20 +02:00
xschem_library snap and grid entries will not annoyingly receive keyboard focus with TAB key 2020-08-19 15:08:35 +02:00
.gitignore changed .gitignore for specific xschem files 2020-08-08 23:25:43 +02:00
AUTHORS populating xschem git repo 2020-08-08 15:47:34 +02:00
COPYING populating xschem git repo 2020-08-08 15:47:34 +02:00
Changelog populating xschem git repo 2020-08-08 15:47:34 +02:00
INSTALL populating xschem git repo 2020-08-08 15:47:34 +02:00
LICENSE added LICENSE 2020-08-09 09:12:07 +02:00
Makefile populating xschem git repo 2020-08-08 15:47:34 +02:00
Makefile.conf.in populating xschem git repo 2020-08-08 15:47:34 +02:00
README populating xschem git repo 2020-08-08 15:47:34 +02:00
README.md Add manual link 2020-08-08 16:04:20 +02:00
config.h.in populating xschem git repo 2020-08-08 15:47:34 +02:00
configure populating xschem git repo 2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse. Manual and instructions: http://repo.hu/projects/xschem/xschem_man/xschem_man.html