A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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Stefan Frederik f644ce58a6 graphs are now rendered (as detailed png bitmaps) in svg exports 2022-09-15 19:39:16 +02:00
XSchemWin add xschem get zoom to query zoom factor 2022-08-24 11:22:26 +02:00
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src graphs are now rendered (as detailed png bitmaps) in svg exports 2022-09-15 19:39:16 +02:00
tests inst_hash_lookup() will insert and lookup only instance basename (x1[3:0] --> x1) so better and stronger uniquenes of instance names is ensured. ngspice_backannotate accepts a filename (if not given assume as before <circuit_name>.raw) 2022-09-12 12:01:26 +02:00
xschem_library look for inutile stimuli files in schematic directory instead of in simulation directory 2022-09-13 18:53:17 +02:00
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AUTHORS update copyright info to 2021; update Product.wxs 2021-09-12 08:32:16 +02:00
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README_MacOS.md added notes for MacOS 'Big Sur' builds. 2021-09-26 13:24:51 +02:00
config.h.in remove all xrender and all xcb code, remove detection as well. Fix a couple of potentially uninitialized variables 2022-01-19 00:49:46 +01:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions