A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
Go to file
Stefan Frederik f4ff14fbd8 fix bus msb nibble calculation in case of incomplete MSB nibble. Add sigma delta adc example 2022-02-16 02:27:57 +01:00
XSchemWin (only) on fat32 or similar case insensitive FS and if case_insensitive is set to 1 in xschemrc do not consider case in symbol lookup 2022-02-04 02:56:11 +01:00
doc doc updates (graphs) 2022-02-15 01:28:29 +01:00
scconfig remove all xrender and all xcb code, remove detection as well. Fix a couple of potentially uninitialized variables 2022-01-19 00:49:46 +01:00
src fix bus msb nibble calculation in case of incomplete MSB nibble. Add sigma delta adc example 2022-02-16 02:27:57 +01:00
tests fix wave panning if a non graph added, better error reporting in png writer function, better flags option names for special objejcts (image and graphs) 2022-01-21 02:18:07 +01:00
xschem_library example schematics formatting 2022-02-16 01:08:16 +01:00
.gitignore changed .gitignore for specific xschem files 2020-08-08 23:25:43 +02:00
AUTHORS update copyright info to 2021; update Product.wxs 2021-09-12 08:32:16 +02:00
COPYING populating xschem git repo 2020-08-08 15:47:34 +02:00
Changelog bump version to 3.0.0; prepare for 3.0.0 release 2021-09-11 07:53:11 +02:00
INSTALL populating xschem git repo 2020-08-08 15:47:34 +02:00
LICENSE update license info 2021-07-27 16:42:54 +02:00
Makefile populating xschem git repo 2020-08-08 15:47:34 +02:00
Makefile.conf.in populating xschem git repo 2020-08-08 15:47:34 +02:00
README update license info 2021-07-27 16:42:54 +02:00
README.md Update README.md 2020-10-08 00:54:06 +02:00
README_MacOS.md added notes for MacOS 'Big Sur' builds. 2021-09-26 13:24:51 +02:00
config.h.in remove all xrender and all xcb code, remove detection as well. Fix a couple of potentially uninitialized variables 2022-01-19 00:49:46 +01:00
configure populating xschem git repo 2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions