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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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stefan schippers d77fb43e5e Configure simulators and tools: rearrange buttons behavior: `Accept, no SAve and CLose` and `Accept, SAve and Close` 2024-01-01 10:54:05 +01:00
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doc extend interval raw file loading to `xschem raw read file type sweep1 sweep2` 2024-01-01 01:28:28 +01:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions