A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

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Stefan Frederik a820cc2e3f removed (now) duplicated inst_hash_lookup: use int_hash_lookup. Search function does not highlight nets if searching for something that is not "lab"		2022-10-12 13:14:48 +02:00
XSchemWin	update xschemtest, more robust spice flatten.awk netlist flattener, specifically when translating expressions containing electrical nodes and parameters, all these need to be translated/substituted.	2022-10-12 01:16:23 +02:00
doc	add cmdline option --preinit <commands> to execute given commands before executing xschemrc file. This can be used to switch library search paths depending on a variable setting.	2022-10-11 00:26:06 +02:00
scconfig	monospaced font in code_shown.sym	2022-08-30 15:54:18 +02:00
src	removed (now) duplicated inst_hash_lookup: use int_hash_lookup. Search function does not highlight nets if searching for something that is not "lab"	2022-10-12 13:14:48 +02:00
tests	better check_unique_names() and hash_all_names() implementation (do not skip label instances or instances with no format attr). Button click focuses main drawing window even if autofocus_mainwindow is set to 0, to avoid losing keyboard focus forever if TAB is pressed.	2022-10-12 11:56:02 +02:00
xschem_library	removed (now) duplicated inst_hash_lookup: use int_hash_lookup. Search function does not highlight nets if searching for something that is not "lab"	2022-10-12 13:14:48 +02:00
.gitignore	changed .gitignore for specific xschem files	2020-08-08 23:25:43 +02:00
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README_MacOS.md	added notes for MacOS 'Big Sur' builds.	2021-09-26 13:24:51 +02:00
config.h.in	remove all xrender and all xcb code, remove detection as well. Fix a couple of potentially uninitialized variables	2022-01-19 00:49:46 +01:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions