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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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stefan schippers a1c2569506 revert previous: print_spice_element(): do 2nd level translate() only on `model` tokens whose value contains @variables. 2024-01-22 18:57:42 +01:00
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XSchemWin set tab/window title if xschem invoked with `xschem -n file.sch`. fix poweramp.sch testbench for Xyce sim. 2024-01-11 08:19:25 +01:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions