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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
92 Commits 3 Branches 10 Tags 88 MiB
C 71.5%
Tcl 15.7%
Awk 8.2%
Roff 2%
Yacc 0.7%
Other 1.8%
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Stefan Schippers 9561204c77 When loading/descending in a symbol set netlist_type to CAD_SYMBOL_ATTRS, set back to previous value when done. Tcl procedure "load_file_dialog" is now used also for saving files (so list of defined xschem libs is available as well as preview window). 2020-09-15 11:19:57 +02:00
XSchemWin Joanne fixes: in print_vhdl_primitive, set variable, format, from "vhdl_format" with get_tok_value before checking if its NULL, more work on windows port. 2020-08-10 23:43:20 +02:00
doc eliminated any differences between SYMBOL and SCHEMATIC files. There is no "current_type" variable any more. Symbols who used to have netlisting rules defined in schvhdlprop have now these attributes in schsymbolprop. Old symbol files with schvhdlprop will be saved with netlisting rules in schsymbolprop. 2020-09-14 10:27:45 +02:00
scconfig eliminated any differences between SYMBOL and SCHEMATIC files. There is no "current_type" variable any more. Symbols who used to have netlisting rules defined in schvhdlprop have now these attributes in schsymbolprop. Old symbol files with schvhdlprop will be saved with netlisting rules in schsymbolprop. 2020-09-14 10:27:45 +02:00
src When loading/descending in a symbol set netlist_type to CAD_SYMBOL_ATTRS, set back to previous value when done. Tcl procedure "load_file_dialog" is now used also for saving files (so list of defined xschem libs is available as well as preview window). 2020-09-15 11:19:57 +02:00
tests Joanne fixes: in print_vhdl_primitive, set variable, format, from "vhdl_format" with get_tok_value before checking if its NULL, more work on windows port. 2020-08-10 23:43:20 +02:00
xschem_library dash attribute for arcs 2020-09-02 23:59:58 +02:00
.gitignore changed .gitignore for specific xschem files 2020-08-08 23:25:43 +02:00
AUTHORS populating xschem git repo 2020-08-08 15:47:34 +02:00
COPYING populating xschem git repo 2020-08-08 15:47:34 +02:00
Changelog fix bind instructions for Windows Alt-*-KeyPress combinations, doc updates for fill attributes in shapes. 2020-09-09 00:21:40 +02:00
INSTALL populating xschem git repo 2020-08-08 15:47:34 +02:00
LICENSE added LICENSE 2020-08-09 09:12:07 +02:00
Makefile populating xschem git repo 2020-08-08 15:47:34 +02:00
Makefile.conf.in populating xschem git repo 2020-08-08 15:47:34 +02:00
README populating xschem git repo 2020-08-08 15:47:34 +02:00
README.md Add manual link 2020-08-08 16:04:20 +02:00
config.h.in populating xschem git repo 2020-08-08 15:47:34 +02:00
configure populating xschem git repo 2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse. Manual and instructions: http://repo.hu/projects/xschem/xschem_man/xschem_man.html