luke
/
xschem
mirror of https://github.com/StefanSchippers/xschem.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
3,421 Commits 3 Branches 10 Tags 86 MiB
C 71.5%
Tcl 15.8%
Awk 8.2%
Roff 2%
Yacc 0.7%
Other 1.7%
Go to file
Chayan Deb 6a43b2069e [Bugfix]: Fixed an issue stemming from recent feature update of 'orthogonal_wiring' on objects connected to multiple wires. The functionality was refactored and the bug was later pointed out in issue #336 in the upstream repo. 2025-03-18 22:59:52 +05:30
.github/workflows Configure github CI 2023-05-06 02:04:30 +02:00
XSchemWin eval_expr.y: fix eval_expr_clear_table, remove unneeded unistd.h 2025-02-14 02:15:03 +01:00
doc add command `xschem get ui_state`, improvements in proc insert_symbol 2025-03-12 02:00:45 +01:00
scconfig fix some c89 violations (warnings) 2025-01-10 16:14:24 +01:00
src [Bugfix]: Fixed an issue stemming from recent feature update of 'orthogonal_wiring' on objects connected to multiple wires. The functionality was refactored and the bug was later pointed out in issue #336 in the upstream repo. 2025-03-18 22:59:52 +05:30
tests allow `xschem translate -1 string` to translate tokens that do not depend on specific instances; yet another change in wrap detection in graphs, always use simulator sweep-var instead of user specified sweep variable; simulated data will never wrap exactly to first value due to roundoff errors; -fast optionto `xschem hilight_netname` command 2025-01-24 03:52:20 +01:00
xschem_library revert res.sym 2025-03-04 10:01:29 +01:00
.gitignore [Minor Addition to .gitignore]: Added an entry to ignore locally used config file for auto-formatting C-code. This helps reduce confusion when reading existing code and makes future contributions easier for newcomer developers. 2025-03-13 12:54:56 +05:30
AUTHORS update copyright info to 2021; update Product.wxs 2021-09-12 08:32:16 +02:00
CMakeLists.txt Added png and embedded graphs to ps and pdf export 2023-01-15 21:34:43 -07:00
Changelog update Changelog 2024-12-16 17:01:38 +01:00
INSTALL populating xschem git repo 2020-08-08 15:47:34 +02:00
LICENSE update license info 2021-07-27 16:42:54 +02:00
Makefile make uninstall: remove empty directories (share/xschem and share/doc/xschem); make command `xschem help` work also if running in src/ directory; use XSCHEM_SHAREDIR shell variable (if defined and directory existing), else set XCSCHEM_SHAREDIR to `pwd` if started from src/ dir, else set compile set XSCHEM_SHAREDIR. xschemrc can override this XSCHEM_SHAREDIR setting. 2025-01-05 01:29:04 +01:00
Makefile.conf.in remove check for libreadline (not used) 2024-11-13 01:35:24 +01:00
README update license info 2021-07-27 16:42:54 +02:00
README.md Update README.md 2020-10-08 00:54:06 +02:00
README_MacOS.md added notes for MacOS 'Big Sur' builds. 2021-09-26 13:24:51 +02:00
config.h.in remove check for libreadline (not used) 2024-11-13 01:35:24 +01:00
configure populating xschem git repo 2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions