luke
/
xschem
mirror of https://github.com/StefanSchippers/xschem.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
419 Commits 3 Branches 10 Tags 89 MiB
C 71.5%
Tcl 15.7%
Awk 8.1%
Roff 2%
Yacc 0.7%
Other 1.9%
Go to file
Stefan Frederik 5bd6d565d1 propagate_hilights does a prepare_netlist_structs() to ensure consistent connectivity and avoid crashes when returning from lower level symbols; specialized there_are_hilights() function that tells if there still are hilights in the hash table. Checking hilights in current level of hierarchy only is an error since there might be hilights in other hierarchies. 2020-12-24 01:13:37 +01:00
XSchemWin windows install updates 2020-12-16 10:51:41 +01:00
doc removed obsolete --a3page command option 2020-12-20 20:42:07 +01:00
scconfig -a -m check for unbound instances (Joanne fix) 2020-12-23 15:57:28 +01:00
src propagate_hilights does a prepare_netlist_structs() to ensure consistent connectivity and avoid crashes when returning from lower level symbols; specialized there_are_hilights() function that tells if there still are hilights in the hash table. Checking hilights in current level of hierarchy only is an error since there might be hilights in other hierarchies. 2020-12-24 01:13:37 +01:00
tests better wire connecting bubble zoom scaling at different snap levels 2020-10-07 19:45:40 +02:00
xschem_library fix: avoid doing any erc checking/highlights if a schematic is explicitly loaded without linking components to symbols. This is done for instances with (spice|verilog)_stop=true attributes set to prevent unwanted symbol expansion 2020-12-23 18:16:53 +01:00
.gitignore changed .gitignore for specific xschem files 2020-08-08 23:25:43 +02:00
AUTHORS populating xschem git repo 2020-08-08 15:47:34 +02:00
COPYING populating xschem git repo 2020-08-08 15:47:34 +02:00
Changelog fix regression due to r1395, updated Changelog, fix set initial window size when doing ps/pdf export from cli 2020-12-17 03:48:34 +01:00
INSTALL populating xschem git repo 2020-08-08 15:47:34 +02:00
LICENSE Update LICENSE 2020-10-10 11:44:58 +02:00
Makefile populating xschem git repo 2020-08-08 15:47:34 +02:00
Makefile.conf.in populating xschem git repo 2020-08-08 15:47:34 +02:00
README populating xschem git repo 2020-08-08 15:47:34 +02:00
README.md Update README.md 2020-10-08 00:54:06 +02:00
README_MacOS.md Update README_MacOS.md 2020-12-12 02:18:39 +01:00
config.h.in better comments in config.h.in 2020-10-28 00:23:26 +01:00
configure populating xschem git repo 2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions