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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
2,578 Commits 3 Branches 10 Tags 87 MiB
C 71.5%
Tcl 15.7%
Awk 8.2%
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stefan schippers 3cdd6526c6 add xschem closest_object command, improve intuitive_interface (dont full-select already partially selected item when dragging) 2024-03-05 11:57:15 +01:00
.github/workflows Configure github CI 2023-05-06 02:04:30 +02:00
XSchemWin recognize integrated_noise, improve `xschem preview_window` command 2024-01-27 11:42:05 +01:00
doc add xschem closest_object command, improve intuitive_interface (dont full-select already partially selected item when dragging) 2024-03-05 11:57:15 +01:00
scconfig add "inst_sch_select" example dir in search path in scconfig/hooks.c 2023-05-05 07:59:24 +02:00
src add xschem closest_object command, improve intuitive_interface (dont full-select already partially selected item when dragging) 2024-03-05 11:57:15 +01:00
tests update hash for greycnt.sch in xschemtest.tcl 2024-01-04 00:09:28 +01:00
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.gitignore gitignore update 2023-01-16 13:41:16 -07:00
AUTHORS update copyright info to 2021; update Product.wxs 2021-09-12 08:32:16 +02:00
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Makefile added install_pdf to create pdf doc from html man pages 2023-07-03 11:38:09 +02:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions