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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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Stefan Frederik 2c09982e5a resolve a race condition in context menu (mouse click and immediately destroy menu by exiting the area) 2022-01-03 01:38:15 +01:00
XSchemWin fix BadDrawable regression in free_rawfile(): after deleting data a draw() was called, but since this function is called also in exit handler all windows are already closed. Added digital waveforms and bussed signal display 2021-12-29 05:11:39 +01:00
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tests speed optimizations in draw_graph() 2022-01-01 21:47:17 +01:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions