A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Go to file

Stefan Frederik 1bb59cf41a cleanup in postscript print		2020-12-16 10:48:15 +01:00
XSchemWin	scconfig (configure) and windows install updates	2020-12-11 19:27:56 +01:00
doc	added symbol creation video in documentation	2020-12-14 23:31:04 +01:00
scconfig	scconfig updates to detect custom tcl-tk installations (MacOS issue)	2020-12-12 11:02:07 +01:00
src	cleanup in postscript print	2020-12-16 10:48:15 +01:00
tests	better wire connecting bubble zoom scaling at different snap levels	2020-10-07 19:45:40 +02:00
xschem_library	cleanup in postscript print	2020-12-16 10:48:15 +01:00
.gitignore	changed .gitignore for specific xschem files	2020-08-08 23:25:43 +02:00
AUTHORS	populating xschem git repo	2020-08-08 15:47:34 +02:00
COPYING	populating xschem git repo	2020-08-08 15:47:34 +02:00
Changelog	update Changelog	2020-12-01 17:13:46 +01:00
INSTALL	populating xschem git repo	2020-08-08 15:47:34 +02:00
LICENSE	Update LICENSE	2020-10-10 11:44:58 +02:00
Makefile	populating xschem git repo	2020-08-08 15:47:34 +02:00
Makefile.conf.in	populating xschem git repo	2020-08-08 15:47:34 +02:00
README	populating xschem git repo	2020-08-08 15:47:34 +02:00
README.md	Update README.md	2020-10-08 00:54:06 +02:00
README_MacOS.md	Update README_MacOS.md	2020-12-12 02:18:39 +01:00
config.h.in	better comments in config.h.in	2020-10-28 00:23:26 +01:00
configure	populating xschem git repo	2020-08-08 15:47:34 +02:00

README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions