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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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stefan schippers 08607afacc correct "type" attr of cccs.sym and ccvs.sym 2025-11-07 11:48:02 +01:00
.github/workflows Update ci.yaml 2025-05-07 16:16:25 +02:00
XSchemWin correct "type" attr of cccs.sym and ccvs.sym 2025-11-07 11:48:02 +01:00
doc implement "nodraw" flag in all object selections in the "xschem select" command, implement the "nodraw" flag in "xschem search" command 2025-10-29 09:06:07 +01:00
scconfig replace const string literal XSCHEM_LIBRARY_PATH with array of const string literals, one per path, to get rid of C89 509 character limit 2025-09-26 15:57:40 +02:00
src cleanup double (or more) slashes in pathlist when parsing XSCHEM_LIBRARY_PATH 2025-11-03 12:21:48 +01:00
tests vector unnamed nets are set as net%d_[%d..0] instead of net%d[%d:0] so they are compatible with spice and Vacask 2025-08-03 00:15:57 +02:00
xschem_library correct "type" attr of cccs.sym and ccvs.sym 2025-11-07 11:48:02 +01:00
.gitignore added eval_expr.c to .gitignore 2025-02-10 23:36:21 +01:00
AUTHORS
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CMakeLists.txt
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Changelog prepare for 3.4.7 tag 2025-05-14 09:58:55 +02:00
INSTALL
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LICENSE
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Makefile make uninstall: remove empty directories (share/xschem and share/doc/xschem); make command `xschem help` work also if running in src/ directory; use XSCHEM_SHAREDIR shell variable (if defined and directory existing), else set XCSCHEM_SHAREDIR to `pwd` if started from src/ dir, else set compile set XSCHEM_SHAREDIR. xschemrc can override this XSCHEM_SHAREDIR setting. 2025-01-05 01:29:04 +01:00
Makefile.conf.in
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README
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README.md
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README_MacOS.md
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config.h.in replace const string literal XSCHEM_LIBRARY_PATH with array of const string literals, one per path, to get rid of C89 509 character limit 2025-09-26 15:57:40 +02:00
configure
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions