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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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Stefan Frederik 0791a99165 updated geda translation, some additional allowed syntax in parselabel.l 2021-10-12 15:03:23 +02:00
XSchemWin update copyright info to 2021; update Product.wxs 2021-09-12 08:32:16 +02:00
doc Add File menu commands to open empty schematic or symbol in new window 2021-10-09 00:41:39 +02:00
scconfig doc updates (xschem + open_pdks installation video) 2021-10-04 14:05:52 +02:00
src updated geda translation, some additional allowed syntax in parselabel.l 2021-10-12 15:03:23 +02:00
tests update license info 2021-07-27 16:42:54 +02:00
xschem_library updated geda translation, some additional allowed syntax in parselabel.l 2021-10-12 15:03:23 +02:00
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AUTHORS update copyright info to 2021; update Product.wxs 2021-09-12 08:32:16 +02:00
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Changelog bump version to 3.0.0; prepare for 3.0.0 release 2021-09-11 07:53:11 +02:00
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README_MacOS.md added notes for MacOS 'Big Sur' builds. 2021-09-26 13:24:51 +02:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions