updated test schematic
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@ -25,7 +25,7 @@ node="out
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in"}
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T {actual value
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50u} 270 -580 0 0 0.4 0.4 {}
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T {Example using a symbol with an extracted schematic} 660 -1180 0 0 1 1 {}
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T {Example using a symbol with an extracted netlist} 220 -1160 0 0 1 1 {}
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N 350 -920 350 -900 {
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lab=MINUS}
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N 290 -280 290 -260 {lab=#net1}
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@ -135,8 +135,8 @@ C {capa.sym} 490 -240 0 0 {name=C2 m=1 value="100u"}
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C {ngspice_probe.sym} 290 -280 0 1 {name=p35}
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C {ngspice_probe.sym} 290 -120 0 1 {name=p36}
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C {ngspice_probe.sym} 530 -200 0 0 {name=p37}
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C {spice_probe.sym} 520 -280 0 0 {name=p45 analysis=tran voltage=49.84}
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C {spice_probe.sym} 520 -120 0 0 {name=p46 analysis=tran voltage=-49.86}
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C {spice_probe.sym} 520 -280 0 0 {name=p45 analysis=tran voltage=49.93}
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C {spice_probe.sym} 520 -120 0 0 {name=p46 analysis=tran voltage=-49.93}
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C {vsource.sym} 660 -160 0 0 {name=VVSS value=0}
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C {lab_pin.sym} 660 -210 0 1 {name=p10 lab=VSS}
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C {lab_pin.sym} 660 -130 0 1 {name=p11 lab=0}
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@ -148,9 +148,9 @@ C {vsource.sym} 30 -420 0 0 {name=VIN value="pwl
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+ 310u -10"
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}
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C {lab_pin.sym} 30 -330 0 1 {name=p1 lab=VSS}
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C {spice_probe.sym} 970 -920 0 0 {name=p2 analysis=tran voltage=-49.86}
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C {spice_probe.sym} 370 -920 0 0 {name=p13 analysis=tran voltage=-49.86}
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C {spice_probe.sym} 120 -510 0 0 {name=p14 analysis=tran voltage=-49.86}
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C {spice_probe.sym} 970 -920 0 0 {name=p2 analysis=tran voltage=-0.1176}
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C {spice_probe.sym} 370 -920 0 0 {name=p13 analysis=tran voltage=21.07}
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C {spice_probe.sym} 120 -510 0 0 {name=p14 analysis=tran voltage=0.0000e+00}
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C {lab_wire.sym} 620 -900 0 0 {name=l3 lab=PLUS}
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C {launcher.sym} 905 -535 0 0 {name=h5
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descr="Select arrow and
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@ -182,3 +182,7 @@ footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 1030 -760 0 0 {name=p17 lab=VSS}
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C {launcher.sym} 660 -350 0 0 {name=h1
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descr=Backannotate
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tclcommand="ngspice::annotate"}
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C {spice_probe.sym} 550 -620 0 0 {name=p19 analysis=tran voltage=21.07}
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