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update inst_sch_select.sch, fix constrained move reset in intuitive_interface

This commit is contained in:
stefan schippers 2024-03-08 00:48:05 +01:00
parent 93722e8a21
commit 336a132219
4 changed files with 93 additions and 50 deletions
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14
src/callback.c
View File

@ -1689,6 +1689,8 @@ static void end_shape_point_edit()
int n = xctx->sel_array[0].n; int n = xctx->sel_array[0].n;
int c = xctx->sel_array[0].col; int c = xctx->sel_array[0].col;
move_objects(END,0,0,0); move_objects(END,0,0,0);
xctx->constr_mv=0;
tcleval("set constr_mv 0" );
xctx->poly[c][n].sel = SELECTED; xctx->poly[c][n].sel = SELECTED;
xctx->shape_point_selected = 0; xctx->shape_point_selected = 0;
for(k=0; k<xctx->poly[c][n].points; ++k) { for(k=0; k<xctx->poly[c][n].points; ++k) {
@ -1700,6 +1702,8 @@ static void end_shape_point_edit()
int n = xctx->sel_array[0].n; int n = xctx->sel_array[0].n;
int c = xctx->sel_array[0].col; int c = xctx->sel_array[0].col;
move_objects(END,0,0,0); move_objects(END,0,0,0);
xctx->constr_mv=0;
tcleval("set constr_mv 0" );
xctx->rect[c][n].sel = SELECTED; xctx->rect[c][n].sel = SELECTED;
xctx->shape_point_selected = 0; xctx->shape_point_selected = 0;
xctx->need_reb_sel_arr=1; xctx->need_reb_sel_arr=1;
@ -1708,6 +1712,8 @@ static void end_shape_point_edit()
int n = xctx->sel_array[0].n; int n = xctx->sel_array[0].n;
int c = xctx->sel_array[0].col; int c = xctx->sel_array[0].col;
move_objects(END,0,0,0); move_objects(END,0,0,0);
xctx->constr_mv=0;
tcleval("set constr_mv 0" );
xctx->line[c][n].sel = SELECTED; xctx->line[c][n].sel = SELECTED;
xctx->shape_point_selected = 0; xctx->shape_point_selected = 0;
xctx->need_reb_sel_arr=1; xctx->need_reb_sel_arr=1;
@ -1715,6 +1721,8 @@ static void end_shape_point_edit()
else if(xctx->lastsel == 1 && xctx->sel_array[0].type==WIRE) { else if(xctx->lastsel == 1 && xctx->sel_array[0].type==WIRE) {
int n = xctx->sel_array[0].n; int n = xctx->sel_array[0].n;
move_objects(END,0,0,0); move_objects(END,0,0,0);
xctx->constr_mv=0;
tcleval("set constr_mv 0" );
xctx->wire[n].sel = SELECTED; xctx->wire[n].sel = SELECTED;
xctx->shape_point_selected = 0; xctx->shape_point_selected = 0;
xctx->need_reb_sel_arr=1; xctx->need_reb_sel_arr=1;
@ -3556,15 +3564,17 @@ int rstate; /* (reduced state, without ShiftMask) */
waves_callback(event, mx, my, key, button, aux, state); waves_callback(event, mx, my, key, button, aux, state);
break; break;
} }
/* end intuitive_interface copy or move */ /* end intuitive_interface copy or move */
if(xctx->ui_state & STARTCOPY && xctx->drag_elements) { if(xctx->ui_state & STARTCOPY && xctx->drag_elements) {
copy_objects(END); copy_objects(END);
xctx->constr_mv=0;
tcleval("set constr_mv 0" );
xctx->drag_elements = 0; xctx->drag_elements = 0;
} }
else if(xctx->ui_state & STARTMOVE && xctx->drag_elements) { else if(xctx->ui_state & STARTMOVE && xctx->drag_elements) {
move_objects(END,0,0,0); move_objects(END,0,0,0);
xctx->constr_mv=0;
tcleval("set constr_mv 0" );
xctx->drag_elements = 0; xctx->drag_elements = 0;
} }

31
xschem_library/inst_sch_select/comp3_read.cir
View File

@ -1,6 +1,27 @@
* comp3_read.cir .subckt comp3_read MINUS OUT PLUS
** parasitic netlist
.subckt comp3_read PLUS OUT MINUS cparax1 net1 0 150f
v1 x 0 1.1 cparax2 net2 0 150f
e1 out x plus minus 0.5 cparax3 net3 0 150f
cparax4 net4 0 150f
cparax5 net5 0 150f
cparaxout out 0 180f
M1 net1 GN1 0 0 nmos w=4u l=0.4u m=1
M2 GN1 GN1 0 0 nmos w=4u l=0.4u m=1
I0 VCC GN1 30u
M3 net2 MINUS net1 0 nmos w=1.5u l=0.2u m=1
M4 net3 PLUS net1 0 nmos w=1.5u l=0.2u m=1
M5 net2 net2 VCC VCC pmos w=6u l=0.3u m=1
M6 net3 net2 VCC VCC pmos w=6u l=0.3u m=1
M14 net4 net3 VCC VCC pmos w=6u l=0.3u m=1
.save v(gn1)
.save v(net2)
M7 net4 GN1 0 0 nmos w=4u l=0.4u m=1
M8 net5 net4 0 0 nmos w=1u l=0.4u m=1
M9 net5 net4 VCC VCC pmos w=2u l=0.4u m=1
M10 OUT net5 0 0 nmos w=1u l=0.4u m=1
M11 OUT net5 VCC VCC pmos w=2u l=0.4u m=1
M13 net4 net4 net5 0 nmos w=2u l=0.1u m=1
M12 net5 net5 net4 0 nmos w=2u l=0.1u m=1
C2 GN1 0 200f m=1
.ends .ends

4
xschem_library/inst_sch_select/comp3_read.sym
View File

@ -23,7 +23,9 @@ G {}
K {type=subcircuit K {type=subcircuit
format="@name @pinlist @symname" format="@name @pinlist @symname"
template="name=x1" template="name=x1"
spice_sym_def="tcleval([read_data_nonewline [abs_sym_path comp3_read.cir]])"} xspice_sym_def="tcleval([read_data_nonewline [abs_sym_path comp3_read.cir]])"
spice_sym_def="tcleval(.include [abs_sym_path comp3_read.cir])"}
V {} V {}
S {} S {}
E {} E {}

94
xschem_library/inst_sch_select/inst_sch_select.sch
View File

@ -24,16 +24,16 @@ K {}
V {} V {}
S {} S {}
E {} E {}
B 2 710 -620 1510 -220 {flags=graph B 2 1240 -590 2040 -80 {flags=graph
y1=-0.013 y1=0
y2=2.1 y2=2.1
ypos1=0 ypos1=0
ypos2=2 ypos2=2
divy=5 divy=5
subdivy=1 subdivy=1
unity=1 unity=1
x1=-2.5e-09 x1=0
x2=4.75e-08 x2=5e-08
divx=5 divx=5
subdivx=1 subdivx=1
node="out1 node="out1
@ -49,16 +49,16 @@ unitx=1
logx=0 logx=0
logy=0 logy=0
hilight_wave=-1} hilight_wave=-1}
B 2 710 -940 1510 -620 {flags=graph B 2 1240 -1010 2040 -600 {flags=graph
y1=-0.013 y1=0
y2=2.1 y2=2
ypos1=0 ypos1=0
ypos2=2 ypos2=2
divy=5 divy=5
subdivy=1 subdivy=1
unity=1 unity=1
x1=-2.5e-09 x1=0
x2=4.75e-08 x2=5e-08
divx=5 divx=5
subdivx=1 subdivx=1
@ -71,38 +71,48 @@ hilight_wave=-1
color="4 7" color="4 7"
node="plus minus"} node="plus minus"}
T {Default instance: T {Default instance:
Uses comp3.sch} 10 -1190 0 0 0.4 0.4 { layer=7} Uses comp3.sch} 320 -950 0 0 0.4 0.4 { layer=7}
T {Alternate instance: T {Alternate instance:
Uses comp3_parax.sch} 10 -980 0 0 0.4 0.4 { layer=8} Uses comp3_parax.sch} 10 -960 0 0 0.4 0.4 { layer=8}
T {Alternate instance: T {Alternate instance:
Uses comp3_pex Uses comp3_pex
contained in attribute contained in attribute
spice_sym_def spice_sym_def
No schematic used} 10 -780 0 0 0.4 0.4 { layer=9} No schematic used} 10 -760 0 0 0.4 0.4 { layer=9}
T {Alternate instance: T {Alternate instance:
Uses comp3_empty.sch Uses comp3_empty.sch
netlist embedded in global netlist embedded in global
spice schematic attribute} 340 -920 0 0 0.4 0.4 { layer=11} spice schematic attribute} 320 -750 0 0 0.4 0.4 { layer=11}
T {Alternate instance: T {Alternate instance:
Uses spice_sym_def to read in Uses spice_sym_def to read in
file comp3_file.cir file comp3_file.cir
no schematic used} 340 -620 0 0 0.4 0.4 { layer=12} no schematic used} 330 -450 0 0 0.4 0.4 { layer=12}
T {The same symbol is simulated with 5 different implementations T {The same symbol is simulated with 5 different implementations
using instance 'schematic' and 'spice_sym_def' attributes} 510 -1050 0 0 0.6 0.6 { layer=4 slant=oblique} using instance 'schematic' and 'spice_sym_def ' attributes} 30 -1040 0 0 0.4 0.4 { layer=4 slant=oblique}
T {Instance based implementation selection.} 570 -1110 0 0 0.8 0.8 {} T {Instance based
implementation selection.} 100 -1140 0 0 0.8 0.8 {}
T {comp3_read.sym: T {comp3_read.sym:
symbol has "spice_sym_def" symbol has "spice_sym_def"
attribute and reads in a file} 340 -360 0 0 0.4 0.4 { layer=13} attribute and reads in a file} 740 -410 0 0 0.4 0.4 { layer=13}
T {Alternate instance: T {Alternate instance:
Uses comp3_pex2 Uses comp3_pex2
referenced by a referenced by a
.include comp3_pex2.cir .include comp3_pex2.cir
in spice_sym_def in spice_sym_def
No schematic used} 10 -500 0 0 0.4 0.4 { layer=10} No schematic used} 10 -500 0 0 0.4 0.4 { layer=10}
C {comp3.sym} 180 -1080 0 0 {name=x1} T {Symbol based
C {comp3.sym} 180 -870 0 0 {name=x2 implementation selection.} 650 -530 2 1 0.8 0.8 {}
T {The 'spice_sym_def ' attribute is defined inside the
symbol, this applies to all placements of this symbol} 640 -510 0 0 0.4 0.4 { layer=4 slant=oblique}
T {In all cases where an external netlist file
is provided either directly or by a .include
line xschem will adapt port order of instances
to match the port order of the provided
netlists.} 620 -940 0 0 0.5 0.5 {}
C {comp3.sym} 480 -840 0 0 {name=x1}
C {comp3.sym} 180 -850 0 0 {name=x2
schematic=comp3_parax.sch} schematic=comp3_parax.sch}
C {comp3.sym} 180 -600 0 0 {name=x3 C {comp3.sym} 180 -580 0 0 {name=x3
schematic=comp3_pex schematic=comp3_pex
spice_sym_def=".subckt comp3_pex MINUS PLUS OUT spice_sym_def=".subckt comp3_pex MINUS PLUS OUT
** parasitic netlist ** parasitic netlist
@ -140,9 +150,9 @@ spice_sym_def="tcleval(.include [abs_sym_path comp3_pex2.cir])"
verilog_sym_def="verilog stuff" verilog_sym_def="verilog stuff"
vhdl_sym_def="vhdl stuff"} vhdl_sym_def="vhdl stuff"}
C {comp3.sym} 490 -730 0 0 {name=x5 C {comp3.sym} 480 -580 0 0 {name=x5
schematic=comp3_empty.sch} schematic=comp3_empty.sch}
C {comp3.sym} 490 -450 0 0 {name=x6 C {comp3.sym} 480 -280 0 0 {name=x6
schematic=comp3_file schematic=comp3_file
spice_sym_def="tcleval( spice_sym_def="tcleval(
[read_data_nonewline [abs_sym_path comp3_file.cir]] [read_data_nonewline [abs_sym_path comp3_file.cir]]
@ -152,17 +162,17 @@ vhdl_sym_def="tcleval(
[read_data_nonewline [abs_sym_path comp3_file.cir]] [read_data_nonewline [abs_sym_path comp3_file.cir]]
)" )"
tclcommand="textwindow [abs_sym_path comp3_file.cir]"} tclcommand="textwindow [abs_sym_path comp3_file.cir]"}
C {comp3_read.sym} 490 -230 0 0 {name=x7 C {comp3_read.sym} 890 -280 0 0 {name=x7
tclcommand="textwindow [abs_sym_path comp3_read.cir]"} tclcommand="textwindow [abs_sym_path comp3_read.cir]"}
C {lab_pin.sym} 240 -1080 0 1 {name=p2 lab=OUT1} C {lab_pin.sym} 540 -840 0 1 {name=p2 lab=OUT1}
C {lab_pin.sym} 240 -870 0 1 {name=p5 lab=OUT2} C {lab_pin.sym} 240 -850 0 1 {name=p5 lab=OUT2}
C {lab_pin.sym} 240 -600 0 1 {name=p8 lab=OUT3} C {lab_pin.sym} 240 -580 0 1 {name=p8 lab=OUT3}
C {lab_pin.sym} 240 -290 0 1 {name=p35 lab=OUT4} C {lab_pin.sym} 240 -290 0 1 {name=p35 lab=OUT4}
C {lab_pin.sym} 550 -730 0 1 {name=p16 lab=OUT5} C {lab_pin.sym} 540 -580 0 1 {name=p16 lab=OUT5}
C {lab_pin.sym} 550 -450 0 1 {name=p19 lab=OUT6} C {lab_pin.sym} 540 -280 0 1 {name=p19 lab=OUT6}
C {lab_pin.sym} 550 -230 0 1 {name=p23 lab=OUT7} C {lab_pin.sym} 950 -280 0 1 {name=p23 lab=OUT7}
C {lab_pin.sym} 120 -840 0 0 {name=p6 lab=MINUS} C {lab_pin.sym} 120 -820 0 0 {name=p6 lab=MINUS}
C {lab_pin.sym} 700 -90 0 0 {name=p10 lab=0} C {lab_pin.sym} 700 -90 0 0 {name=p10 lab=0}
C {vsource.sym} 820 -120 0 0 {name=V2 value=1 C {vsource.sym} 820 -120 0 0 {name=V2 value=1
savecurrent=true} savecurrent=true}
@ -173,7 +183,7 @@ savecurrent=true}
C {lab_pin.sym} 970 -150 0 0 {name=p13 lab=PLUS} C {lab_pin.sym} 970 -150 0 0 {name=p13 lab=PLUS}
C {lab_pin.sym} 970 -90 0 0 {name=p14 lab=0} C {lab_pin.sym} 970 -90 0 0 {name=p14 lab=0}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"} C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {launcher.sym} 820 -190 0 0 {name=h5 C {launcher.sym} 1380 -40 0 0 {name=h5
descr="load waves" descr="load waves"
tclcommand="xschem raw_read $netlist_dir/test_instance_schematic_selection.raw tran" tclcommand="xschem raw_read $netlist_dir/test_instance_schematic_selection.raw tran"
} }
@ -183,8 +193,8 @@ C {code_shown.sym} 140 -170 0 0 {name=COMMANDS only_toplevel=false value=".contr
write test_instance_schematic_selection.raw write test_instance_schematic_selection.raw
.endc .endc
"} "}
C {lab_pin.sym} 120 -1110 0 0 {name=p1 lab=PLUS} C {lab_pin.sym} 420 -870 0 0 {name=p1 lab=PLUS}
C {lab_pin.sym} 430 -760 0 0 {name=p15 lab=PLUS} C {lab_pin.sym} 420 -610 0 0 {name=p15 lab=PLUS}
C {code.sym} 0 -200 0 0 {name=MODELS only_toplevel=false value="* Beta Version released on 2/22/06 C {code.sym} 0 -200 0 0 {name=MODELS only_toplevel=false value="* Beta Version released on 2/22/06
* PTM 65nm NMOS * PTM 65nm NMOS
@ -311,17 +321,17 @@ C {code.sym} 0 -200 0 0 {name=MODELS only_toplevel=false value="* Beta Version r
+rshg = 0.4 gbmin = 1e-010 rbpb = 5 rbpd = 15 +rshg = 0.4 gbmin = 1e-010 rbpb = 5 rbpd = 15
+rbps = 15 rbdb = 15 rbsb = 15 ngcon = 1 +rbps = 15 rbdb = 15 rbsb = 15 ngcon = 1
"} "}
C {lab_pin.sym} 430 -700 0 0 {name=p17 lab=MINUS} C {lab_pin.sym} 420 -550 0 0 {name=p17 lab=MINUS}
C {lab_pin.sym} 120 -900 0 0 {name=p4 lab=PLUS} C {lab_pin.sym} 120 -880 0 0 {name=p4 lab=PLUS}
C {lab_pin.sym} 430 -480 0 0 {name=p18 lab=PLUS} C {lab_pin.sym} 420 -310 0 0 {name=p18 lab=PLUS}
C {vsource.sym} 700 -120 0 0 {name=V1 value=2 C {vsource.sym} 700 -120 0 0 {name=V1 value=2
savecurrent=true} savecurrent=true}
C {lab_pin.sym} 430 -420 0 0 {name=p20 lab=MINUS} C {lab_pin.sym} 420 -250 0 0 {name=p20 lab=MINUS}
C {lab_pin.sym} 120 -630 0 0 {name=p7 lab=PLUS} C {lab_pin.sym} 120 -610 0 0 {name=p7 lab=PLUS}
C {lab_pin.sym} 430 -260 0 0 {name=p22 lab=PLUS} C {lab_pin.sym} 830 -310 0 0 {name=p22 lab=PLUS}
C {lab_pin.sym} 700 -150 0 0 {name=p21 lab=VCC} C {lab_pin.sym} 700 -150 0 0 {name=p21 lab=VCC}
C {lab_pin.sym} 430 -200 0 0 {name=p24 lab=MINUS} C {lab_pin.sym} 830 -250 0 0 {name=p24 lab=MINUS}
C {lab_pin.sym} 120 -1050 0 0 {name=p3 lab=MINUS} C {lab_pin.sym} 420 -810 0 0 {name=p3 lab=MINUS}
C {lab_pin.sym} 120 -320 0 0 {name=p34 lab=PLUS} C {lab_pin.sym} 120 -320 0 0 {name=p34 lab=PLUS}
C {lab_pin.sym} 120 -570 0 0 {name=p9 lab=MINUS} C {lab_pin.sym} 120 -550 0 0 {name=p9 lab=MINUS}
C {lab_pin.sym} 120 -260 0 0 {name=p36 lab=MINUS} C {lab_pin.sym} 120 -260 0 0 {name=p36 lab=MINUS}