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xyce quircks/integration for ac analysis, refuse to stretch unscalable images, more example schematics

This commit is contained in:
Stefan Frederik 2022-02-03 00:40:59 +01:00
parent 008b289e4f
commit 1cb9645e9f
14 changed files with 2614 additions and 706 deletions
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10
src/draw.c
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@ -1988,9 +1988,11 @@ void setup_graph_data(int i, const int flags, int skip, Graph_ctx *gr)
gr->h = gr->y2 - gr->y1;
/* label text size calculations */
gr->txtsizelab = gr->marginy * 0.009;
tmp = gr->w * 0.00044;
if(tmp < gr->txtsizelab) gr->txtsizelab = tmp;
gr->txtsizelab = gr->marginy * 0.007;
/*
* tmp = gr->w * 0.00044;
* if(tmp < gr->txtsizelab) gr->txtsizelab = tmp;
*/
if(flags & 2)
gr->digtxtsizelab = 0.000900 * fabs( gr->h / gr->posh * gr->gh );
else
@ -2107,7 +2109,7 @@ static void draw_graph_variables(int wcnt, int wave_color, int n_nodes, int swee
else my_snprintf(tmpstr, S(tmpstr), "%s",find_nth(ntok, ',', 1));
} else {
if(xctx->graph_sim_type == 3) {
if(strstr(ntok, "ph(") == ntok)
if(strstr(ntok, "ph(") == ntok || strstr(ntok, "_ph"))
my_snprintf(tmpstr, S(tmpstr), "%s[Phase]", ntok);
else
my_snprintf(tmpstr, S(tmpstr), "%s[dB]", ntok);

2
src/save.c
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@ -358,7 +358,7 @@ static int read_dataset(FILE *fd)
strstr(varname, "V(") == varname || strstr(varname, "I(") == varname)
my_mstrcat(540, &xctx->graph_names[(i << 1) + 1], "ph(", varname + 2, NULL);
else
my_mstrcat(540, &xctx->graph_names[(i << 1) + 1], varname, "_ph", NULL);
my_mstrcat(540, &xctx->graph_names[(i << 1) + 1], "ph(", varname, ")", NULL);
int_hash_lookup(xctx->raw_table, xctx->graph_names[(i << 1) + 1], (i << 1) + 1, XINSERT_NOREPLACE);
} else {
my_strcat(541, &xctx->graph_names[i], varname);

2
src/select.c
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@ -1128,7 +1128,7 @@ void select_inside(double x1,double y1, double x2, double y2, int sel) /*added u
xctx->ui_state |= SELECTION; /* set xctx->ui_state to SELECTION also if unselecting by area ???? */
sel? select_box(c,i, SELECTED, 1): select_box(c,i, 0, 1);
}
else {
else if(c != GRIDLAYER || !(xctx->rect[c][i].flags & 2048)){ /* no stretch on unscaled images */
if( sel && en_s && POINTINSIDE(xctx->rect[c][i].x1,xctx->rect[c][i].y1, x1,y1,x2,y2) )
{ /*20070302 added stretch select */
xctx->ui_state |= SELECTION;

46
xschem_library/examples/0_examples_top.sch
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@ -45,7 +45,7 @@ A 7 884.1666666666666 -210 39.58991173406564 210.3432488842396 198.9246444160511
P 1 10 880 -490 870 -550 950 -530 910 -510 940 -480 920 -480 910 -460 890 -500 880 -480 880 -490 {dash=3}
P 4 6 830 -470 830 -560 820 -510 820 -550 810 -520 810 -490 {}
P 15 11 870 -520 880 -560 900 -530 910 -550 920 -520 940 -530 920 -490 890 -500 860 -480 840 -530 870 -520 {fill=true}
T {Welcome to XSCHEM!} 110 -990 0 0 1 1 {layer=5}
T {Welcome to XSCHEM!} 110 -1020 0 0 1 1 {layer=5}
T {This is a test schematic window
On the left you see some sample circuits. You may descend into any
@ -53,7 +53,7 @@ of these by selecting one with a left mouse button click and
pressing the 'e' key, or by menu 'Edit -> Push Schematic'.
You can return here after descending into a schematic by hitting
'<Ctrl>-e' or by menu 'Edit -> Pop'.
} 60 -920 0 0 0.4 0.4 {}
} 60 -950 0 0 0.4 0.4 {}
T {Lines} 960 -680 0 0 0.6 0.6 {layer=4}
T {Rectangles} 960 -620 0 0 0.6 0.6 {layer=4}
T {Polygons} 960 -530 0 0 0.6 0.6 {layer=4}
@ -85,15 +85,15 @@ N 820 -420 940 -420 {lab=#net1}
N 860 -460 860 -370 {lab=#net2}
N 860 -390 920 -390 {lab=#net2}
N 880 -430 910 -420 {lab=#net1}
N 380 -530 640 -530 {lab=BUS[4:0]}
N 510 -640 510 -540 {lab=BUS[1]}
N 410 -600 410 -540 {lab=BUS[2]}
C {poweramp.sym} 160 -530 0 0 {name=x1
N 370 -430 630 -430 {lab=BUS[4:0]}
N 500 -540 500 -440 {lab=BUS[1]}
N 400 -500 400 -440 {lab=BUS[2]}
C {poweramp.sym} 500 -650 0 0 {name=x1
tclcommand="xschem descend"}
C {tesla.sym} 160 -450 0 0 {name=x2}
C {test_ne555.sym} 160 -410 0 0 {name=x3}
C {test_lm324.sym} 160 -370 0 0 {name=x4}
C {osc.sym} 160 -490 0 0 {name=x5}
C {tesla.sym} 160 -490 0 0 {name=x2}
C {test_ne555.sym} 160 -450 0 0 {name=x3}
C {test_lm324.sym} 160 -410 0 0 {name=x4}
C {osc.sym} 160 -530 0 0 {name=x5}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {cmos_example.sym} 160 -570 0 0 {name=x6}
C {greycnt.sym} 160 -610 0 0 {name=x8}
@ -115,16 +115,16 @@ program=x-www-browser
}
C {rlc.sym} 160 -690 0 0 {name=x0}
C {lab_pin.sym} 640 -530 0 1 {name=l2 sig_type=std_logic lab=BUS[4:0]}
C {bus_connect.sym} 500 -530 0 0 {name=l3 lab=BUS[1]}
C {bus_connect_nolab.sym} 400 -530 0 0 {name=r1}
C {lab_pin.sym} 410 -600 3 1 {name=l4 sig_type=std_logic lab=BUS[2]}
C {LCC_instances.sym} 160 -330 0 0 {name=x7}
C {test_backannotated_subckt.sym} 160 -290 0 0 {name=x10}
C {plot_manipulation.sym} 160 -250 0 0 {name=x11}
C {logic_test.sym} 160 -210 0 0 {name=x12}
C {simulate_ff.sym} 160 -170 0 0 {name=x13}
C {test_mos_verilog.sym} 160 -130 0 0 {name=x14}
C {lab_pin.sym} 630 -430 0 1 {name=l2 sig_type=std_logic lab=BUS[4:0]}
C {bus_connect.sym} 490 -430 0 0 {name=l3 lab=BUS[1]}
C {bus_connect_nolab.sym} 390 -430 0 0 {name=r1}
C {lab_pin.sym} 400 -500 3 1 {name=l4 sig_type=std_logic lab=BUS[2]}
C {LCC_instances.sym} 160 -370 0 0 {name=x7}
C {test_backannotated_subckt.sym} 160 -330 0 0 {name=x10}
C {plot_manipulation.sym} 160 -290 0 0 {name=x11}
C {logic_test.sym} 160 -250 0 0 {name=x12}
C {simulate_ff.sym} 160 -210 0 0 {name=x13}
C {test_mos_verilog.sym} 160 -170 0 0 {name=x14}
C {launcher.sym} 1265 -225 0 0 {name=h5
descr=" Ctrl-Left-Click to load/
unload waveforms"
@ -1457,4 +1457,8 @@ xwtAgA9ve8fHC0Dod8blIpQLQJBdgRgxavQ/AAAAgEslwD6d7SiMdxwqP41maeirFRxABH/Rb+tVM0DO
cwtAyKwqggMC8z8AAABAXz/APixDHOviNio/cIyWTt0GHEAHmaX3NW0zQHJvU5F/bTNA3V5CW3kqoL85tJeeXUIJQIB/waNeQglAcFfF8JIdC0DY7tjwBPjxPwAAALCc
UsA+"
}
C {test_ac.sym} 160 -90 0 0 {name=x15}
C {test_ac.sym} 160 -130 0 0 {name=x15}
C {test_ac_xyce.sym} 160 -90 0 0 {name=x16}
C {rom8k.sym} 500 -690 0 0 {name=x17}
C {poweramp_xyce.sym} 500 -610 0 0 {name=x18
tclcommand="xschem descend"}

1362
xschem_library/examples/cmos_example.sch
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8
xschem_library/examples/poweramp.sch
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File diff suppressed because one or more lines are too long

21
xschem_library/examples/poweramp_xyce.sch
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11
xschem_library/examples/poweramp_xyce.sym Normal file
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@ -0,0 +1,11 @@
v {xschem version=3.0.0 file_version=1.2}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
}
T {@symname} -76.5 -6 0 0 0.3 0.3 {}
T {@name} 135 -22 0 0 0.2 0.2 {}
L 4 -130 -10 130 -10 {}
L 4 -130 10 130 10 {}
L 4 -130 -10 -130 10 {}
L 4 130 -10 130 10 {}

89
xschem_library/examples/tesla.sch
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@ -4,12 +4,49 @@ K {}
V {}
S {}
E {}
B 2 10 -270 390 -110 {flags=graph
y1=-5400
y2=5400
ypos1=0
ypos2=2
divy=5
subdivy=1
unity=k
x1=4e-10
x2=0.001
divx=5
subdivx=1
node=hv
color=7
dataset=0
unitx=u
}
B 2 10 -440 390 -280 {flags=graph
y1=-0.9
y2=13
ypos1=0
ypos2=2
divy=5
subdivy=1
unity=1
x1=4e-10
x2=0.001
divx=5
subdivx=1
dataset=0
unitx=u
color="4 7 6"
node="fb
d
vcc"}
T {PARASITIC
CAP} 1020 -510 0 0 0.25 0.2 {}
T {TESLA COIL HIGH VOLTAGE GENERATOR EXAMPLE} 420 -740 0 0 0.4 0.4 {}
N 140 -550 140 -500 {lab=VCCS}
N 140 -640 140 -610 {lab=VCC}
N 230 -640 230 -500 {lab=VCC}
N 140 -590 140 -540 {lab=VCCS}
N 140 -680 140 -650 {lab=VCC}
N 230 -680 230 -540 {lab=VCC}
N 870 -530 1010 -530 {lab=HV}
N 1010 -420 1010 -250 {lab=VSS}
N 1010 -530 1010 -480 {lab=HV}
@ -80,19 +117,19 @@ N 520 -430 520 -340 {lab=#net3}
N 520 -340 720 -340 {lab=#net3}
N 810 -340 870 -340 {lab=FB}
N 520 -490 580 -490 {lab=VCC}
N 580 -640 580 -490 {lab=VCC}
N 580 -680 580 -490 {lab=VCC}
N 870 -530 870 -490 {lab=HV}
N 870 -430 870 -340 {lab=FB}
N 580 -170 580 -150 {lab=VSS}
N 140 -640 230 -640 {lab=VCC}
N 140 -420 230 -420 {lab=VSS}
N 140 -680 230 -680 {lab=VCC}
N 140 -460 230 -460 {lab=VSS}
N 800 -220 800 -200 {lab=VCC}
N 800 -140 870 -140 {lab=FB}
N 230 -440 230 -420 {lab=VSS}
N 140 -440 140 -420 {lab=VSS}
N 230 -480 230 -460 {lab=VSS}
N 140 -480 140 -460 {lab=VSS}
N 460 -200 540 -200 {lab=FB}
N 580 -280 580 -230 {lab=D}
N 230 -640 580 -640 {lab=VCC}
N 230 -680 580 -680 {lab=VCC}
N 470 -280 470 -260 {lab=VCC}
N 460 -420 460 -400 {lab=VCC}
N 460 -340 520 -340 {lab=#net3}
@ -111,16 +148,19 @@ vvss vss 0 dc 0
** referenced file in simulation directory.
.include models_tesla.txt
.temp 30
.tran 1n 1m uic
.meas tran iavg AVG i(vvcc) from=950u to=990u
.probe tran p(q5) i(l1) i(l2)
.meas tran pavg AVG @q5[p] from=950u to=990u
.control
tran 40n 1m uic
meas tran iavg AVG i(vvcc) from=950u to=990u
save tran p(q5) i(l1) i(l2)
write tesla.raw
.endc
"}
C {lab_pin.sym} 140 -640 0 0 {name=p1 lab=VCC}
C {res.sym} 140 -580 0 1 {name=Rs m=1 value=1}
C {vsource.sym} 140 -470 0 1 {name=Vvcc value="pwl 0 0 1u 12"}
C {lab_pin.sym} 140 -420 0 0 {name=p7 lab=VSS}
C {capa.sym} 230 -470 0 0 {name=Cvcc m=1 value=10u}
C {lab_pin.sym} 140 -680 0 0 {name=p1 lab=VCC}
C {res.sym} 140 -620 0 1 {name=Rs m=1 value=1}
C {vsource.sym} 140 -510 0 1 {name=Vvcc value="pwl 0 0 1u 12"}
C {lab_pin.sym} 140 -460 0 0 {name=p7 lab=VSS}
C {capa.sym} 230 -510 0 0 {name=Cvcc m=1 value=10u}
C {launcher.sym} 1180 -530 0 0 {name=h2
descr="BJT MODELS"
url="http://www.zen22142.zen.co.uk/ltspice/standard.bjt"}
@ -133,7 +173,7 @@ url="http://hamwaves.com/antennas/inductance.html"}
C {launcher.sym} 1180 -630 0 0 {name=h4
descr="ltwiki BJT MODELS"
url="http://ltwiki.org/?title=Standard.bjt"}
C {lab_pin.sym} 140 -530 0 0 {name=p6 lab=VCCS}
C {lab_pin.sym} 140 -570 0 0 {name=p6 lab=VCCS}
C {lab_pin.sym} 870 -560 0 1 {name=p4 lab=HV}
C {capa.sym} 1010 -450 0 0 {name=C1 m=1 value=1p}
C {lab_pin.sym} 1010 -250 0 0 {name=p3 lab=VSS}
@ -165,3 +205,14 @@ C {diode.sym} 720 -310 2 0 {name=D4 model=d1n5400 area=1
}
C {lab_pin.sym} 720 -260 0 0 {name=p14 lab=VSS}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {launcher.sym} 100 -810 0 0 {name=h5
descr="tcleval(Select arrow and
Ctrl key + Left Button-Click to load/unload waveforms
from $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw)"
tclcommand="
xschem raw_read $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw
"
}
C {launcher.sym} 170 -90 0 0 {name=h6
descr="Graph Manual page"
url="https://xschem.sourceforge.io/stefan/xschem_man/graphs.html"}

1308
xschem_library/examples/test_ac.sch
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418
xschem_library/examples/test_ac_xyce.sch Normal file
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11
xschem_library/examples/test_ac_xyce.sym Normal file
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@ -0,0 +1,11 @@
v {xschem version=3.0.0 file_version=1.2}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
}
T {@symname} -72 -6 0 0 0.3 0.3 {}
T {@name} 135 -22 0 0 0.2 0.2 {}
L 4 -130 -10 130 -10 {}
L 4 -130 10 130 10 {}
L 4 -130 -10 -130 10 {}
L 4 130 -10 130 10 {}

21
xschem_library/rom8k/rom8k.sch
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File diff suppressed because one or more lines are too long

11
xschem_library/rom8k/rom8k.sym Normal file
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@ -0,0 +1,11 @@
v {xschem version=3.0.0 file_version=1.2}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
}
T {@symname} -40.5 -6 0 0 0.3 0.3 {}
T {@name} 135 -22 0 0 0.2 0.2 {}
L 4 -130 -10 130 -10 {}
L 4 -130 10 130 10 {}
L 4 -130 -10 -130 10 {}
L 4 130 -10 130 10 {}