From 13df66243e6d65337a9f63f8e6c5dd0fc09afd9d Mon Sep 17 00:00:00 2001
From: Stefan Frederik
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Use the file selector dialog to locate res.sym.
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Now select the resistor by left-clicking on it (it will turn to grey color)
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After selecting the component (component is an instance of a symbol) descend into its symbol definition @@ -44,7 +44,7 @@ p{padding: 15px 30px 10px;} the parent schematic drawing before loading the resistor symbol. Answer 'yes'.
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The image above is the 'symbol definition', you can now select individual graphic elements that represent the symbol, lines, rectangles and text. diff --git a/doc/xschem_man/commands.html b/doc/xschem_man/commands.html index 7eded0eb..d57347d2 100644 --- a/doc/xschem_man/commands.html +++ b/doc/xschem_man/commands.html @@ -238,18 +238,18 @@ set replace_key(w) Shift-W The first thing to do is to drag a selection rectangle with the mouse holding down the Ctrl key, cutting wires we need to stretch:
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After selection is done hit the move ('m') key. You will be able to move the selected part of the schematic keeping connected the wires crossing the selection rectangle:
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In our example we needed to move up part of the circuit, the end result is shown in next picture. Multiple stretch rectangles can be set using the Shift key in addition to the Ctrl key after setting the first stretch area.
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@@ -261,12 +261,12 @@ set replace_key(w) Shift-W while creating wires, lines, and moving, stretching, copying objects, pressing the 'h' or 'v' keys will constrain the movement to a horizontal or vertical direction, respectively.
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Constrained horizontal move: regardless of the mouse pointer Y position movement occurs on the X direction only.
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Unconstrained move: objects follow the mouse pointer in X and Y direction.
diff --git a/doc/xschem_man/component_instantiation.html b/doc/xschem_man/component_instantiation.html index a9e27862..4ebf8ef3 100644 --- a/doc/xschem_man/component_instantiation.html +++ b/doc/xschem_man/component_instantiation.html @@ -26,18 +26,18 @@ p{padding: 15px 30px 10px;} component properties. Start by opening a test schematic window (you may delete any existing stuff in it if any). -
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Now start by inserting a component, consider for example devices/nmos4.sym; press the Insert key, navigate to the devices design library and open the nmos4.sym symbol.
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Now draw some wires on each pin of the nmos; place the mouse pointer on the component pins and use the 'w' bindkey.
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we need now to put labels on wire ends: use the Insert key and locate the devices/lab_pin.sym symbol. After the lab_pin symbol is placed you can move it @@ -46,13 +46,13 @@ p{padding: 15px 30px 10px;} placing the first one you may copy the others from it ('c' bindkey). The end result should look like this:
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This is what an electrical circuit is all about: a network of wires and components. In this schematic we have 5 components (4 labels and one mos) and 4 nets. It is not mandatory to put a wire segment between component pins; we could equally well do this:
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This circuit is absolutely equivalent to the previous one: it will produce the same
device connectivity netlist.
@@ -60,22 +60,22 @@ p{padding: 15px 30px 10px;}
component properties. Select the wire label on the nmos source pin and press the 'q'
bindkey:
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Now, replace the 'xxx' default string in the dialog with a different name (example: SOURCE) After clicking OK the source terminal will have the right label.
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repeat the process for the remaining GATE, DRAIN, BODY terminals;
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The following picture shows the lab_pin component with its properties and the corresponding symbol definition with its global properties (remember global properties in the xschem_properties slide)
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when building the netlist XSCHEM will look for wires that touch the red square of the lab_pin component and name that wires with the component 'lab' property. @@ -85,7 +85,7 @@ p{padding: 15px 30px 10px;}
We need now to edit the nmos properties. Select it and press the 'q' bindkey
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from the edit properties dialog you see there are 5 attributes with values defined:
@@ -100,7 +100,7 @@ p{padding: 15px 30px 10px;} We have never defined a value for these properties. These are the default values defined in the template attribute in the global nmos4.sym property string. -
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We may want to change the dimensions of the transistor; simply change the w and
l attribute values.
@@ -108,7 +108,7 @@ p{padding: 15px 30px 10px;}
All simulators require that components are unique, it is not permitted to have 2 components
with identical name, so XSCHEM enforces this.
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If a name is set that matches an existing component @@ -130,7 +130,7 @@ p{padding: 15px 30px 10px;} These components are used to name a net or a pin of another component. They do not have any other function other than giving an explicit name to a net.
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The dialog box allows to change the property string as well as the symbol reference. The property string
is essentially a list of attribute=value items. As with symbol properties if a value
@@ -110,7 +110,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
commands, the statement will be executed when pressing the <shift>H key
(or <Alt> left mouse button) on the selected instance.
The tclcommand and url properties are mutually exclusive.
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this attribute is valid only on netlist_commands type symbols and specifies that the symbol should be netlisted only if it is instantiated in the top-most hierarchy. This is very usefull @@ -118,7 +118,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10" and are meaningfull only when simulating the block, but should be skipped if the component is simulated as part of a bigger system which has its own (at higher hierarchy level) netlistcomponent for Spice commands.
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A lock=true attribute will make the symbol not editable. the only way to make it editable again is to right click on it to bring up the edit attributes dialog box and set to false. This is useful for title @@ -150,7 +150,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10" This property is applicable only to label type components: ipin.sym, iopin.sym, opin.sym, lab_pin.sym, lab_wire.sym.
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This is the same as sig_type but for verilog netlisting: can be used to declare a wire or a reg or any other datatype supported by the verilog language. @@ -160,7 +160,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10" Consider the following examples of placement of generic_pin components in a VHDL design:
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As you will see in the parameters slide, generics (they are just parameters passed to components) can be passed also via property strings in addition to using generic_pin components.
diff --git a/doc/xschem_man/create_pdf_man b/doc/xschem_man/create_pdf_man index 0388cd86..635c3893 100644 --- a/doc/xschem_man/create_pdf_man +++ b/doc/xschem_man/create_pdf_man @@ -1,7 +1,8 @@ #### before creating set width of images in html: -sed -i '/
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Copy another instance of it and set its lab attribute to B. Next place an output pin devices/opin.sym and set its lab to Z. The result will be as follows:
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Now we need to build the actual circuit. Since we plan to do it in CMOS technology we need nmos and pmos transistors. Place one nmos from devices/nmos4.sym and one @@ -40,12 +40,12 @@ p{padding: 15px 30px 10px;} copying ('c' bindkey) place 4 transistors in the following way (the upper ones are pmos4, the lower ones nmos4):
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now draw wires to connect together the transistor to form a NAND gate; in the picture i have highlighted 2 electrical nodes by selecting one wire segment of each and pressing the 'k' bindkey.
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Next we need to place the supply nodes , VCC and VSS. we decide to use global nodes. Global nodes in SPICE semantics are like global variables in C programs, they are available everywhere, we do not @@ -55,7 +55,7 @@ p{padding: 15px 30px 10px;} Since the default names are respectively VDD and GND use the edit property bindkey 'q' to change these to VCC and VSS.
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we still need to connect the body terminals of the mos transistors. One possibility is to hookup the two upper pmos transistor terminals to VCC with wires, and the two bottom nmos @@ -64,13 +64,13 @@ p{padding: 15px 30px 10px;} use 4 instances of it to name the 4 body terminals. Remember, while moving (select and press the 'm' key) you can flip/rotate using the R/F keys.
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Finally we must connect the input and output port connectors, and to complete the gate schematic we decide to use W=8u for the pmos transistors. Select both the pmos devices and press the edit proprty 'q' key; modify from 5u (default) to 8u.
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Now do a Save as operation, save it for example in mylib/nand2.sch.
To make the schematic nicer we also add the title component. This component is not netlisted but is
@@ -78,7 +78,7 @@ p{padding: 15px 30px 10px;}
component. The NAND gate is completed! (below picture also with grid, normally disabled in pictures
to make image sizes smaller).
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Normally a cmos gate like the one used in this example is used as a building block (among many others) for bigger circuits, therefore we need to enclose the schematic view above in a symbol representation. @@ -88,12 +88,12 @@ p{padding: 15px 30px 10px;} XSCHEM has the ability to automatically generate a symbol view given the schematic view. Just press the 'a' bindkey in the drawing area of the nand2 gate.
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After pressing 'OK' a mylib/nand2.sym file is generated. try opening it (File->Open):
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As you can see a symbolic view of the gate has been automatically created using the information in the schematic view (specifically, the input/output pins). Now, this graphic is not really @@ -104,7 +104,7 @@ p{padding: 15px 30px 10px;} segments you may need to reduce the snap factor (menu View->Half snap thresholf) remember to reset the snap factor to its default setting when done.
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This completes the nand2 component. It is now ready to be placed in a schematic. Open a test schematic (for example mylib/test.sch (remember to save the nand2.sym you have just created), @@ -112,7 +112,7 @@ p{padding: 15px 30px 10px;} Then insert devices/lab_pin.sym components and place wires to connect some nodes to the newly instantiated nand2 component:
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This is now a valid circuit. Let's test it by extracting the SPICE netlist. Enable the showing of netlist window (Options -> Show netlist win, or 'A' key). @@ -147,13 +147,13 @@ m4 net1 B VSS VSS nmos w=5u l=0.18u m=1 This is an example of a hierarchical circuit. The nand2 is a symbol view of another lower level schematic. We may place multiple times the nand2 symbol to create more complex circuits.
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By selecting one of the nand2 gates and pressing the 'e' key or menu Edit -> Push schematic we can 'descend' into it and navigate through the various hierarchies. Pressing <ctrl>e returns back to the upper level.
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This is the corresponding netlist:
@@ -193,7 +193,7 @@ m4 net1 B VSS VSS nmos w=5u l=0.18u m=1 select the symbol, then Press the 'H' key or the Symbol->Attach pins to component instance menu entry. -
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The use prefix will prepend the shown prefix to the wire names to be attached to the component.
The default value for the prefix is the instance name followed by an underscore.
@@ -203,7 +203,7 @@ m4 net1 B VSS VSS nmos w=5u l=0.18u m=1
the second example with use prefix not selected and use wire labels selected. As you
can see in the second example you may draw wires without overstriking the labels.
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diff --git a/doc/xschem_man/creating_symbols.html b/doc/xschem_man/creating_symbols.html
index 073670f7..fa4cc996 100644
--- a/doc/xschem_man/creating_symbols.html
+++ b/doc/xschem_man/creating_symbols.html
@@ -27,13 +27,13 @@ p{padding: 15px 30px 10px;}
press the edit property bindkey (q key) and set a new name for the symbol, set also the
copy cell checkbox:
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After pressing OK a copy (both schematic and symbol views) of the previously selected component will be created. After this clone operation modifications can be made on the newly created schematic and symbol views without affecting the original component.
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for more info on symbols see the Tutorial
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The above picture shows a resistor symbol, built drawing some lines on layer 4 (green), some pins on layer 5 (red) and some text. @@ -75,7 +75,7 @@ p{padding: 15px 30px 10px;} and can be placed like just any other primitive object multiple times in a schematic window with different orientations.
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Another special primitive object in XSCHEM is 'Wire', Graphically it is drawn as a line on layer 1 (wires). @@ -101,7 +101,7 @@ p{padding: 15px 30px 10px;} XSCHEM coordinates are stored as double precision floating point numbers, axis orientation is the same as Xorg default coordinate orientation:
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When drawing objecs in XSCHEM coordinates are snapped to a multiple of 10.0 coordinate units,
so all drawn objects are easily aligned.
@@ -242,7 +242,7 @@ in this case only the verilog-related global property has some definition. This
of text objects. Using rotation and mirror text can be aligned to any corner of its bounding box, so there are 4 different
alignments for vertical text and 4 different alignments for horizontal text. Below picture shows how text is displayed
with respect to its anchor point.
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@@ -306,7 +306,7 @@ in this case only the verilog-related global property has some definition. This
mirror (integer range [0:1]), and a property string defining various attributes
including the mandatory name=... attribute.
Orientation and mirror meanings are as follows:
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@@ -335,7 +335,7 @@ T {@#0:pinnumber} -47.5 -2.5 0 0 0.12 0.12 {}
T {@#1:pinnumber} -2.5 12.5 0 0 0.12 0.12 {}
T {@#2:pinnumber} 47.5 -2.5 0 1 0.12 0.12 {}
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@@ -420,7 +420,7 @@ assign VCC12=1;
"}
C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns" }
- 





Select some nets...
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...press the 'k' key...
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...all nets are highlighted, select the white net...
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..press the <Ctrl>k key and white net is un-highlighted...
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if you descend into component instance x1 (mos_power_ampli) ('e' key) you will see the highlight nets propagated into the child component.
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A very useful function is the 'View only probes' mode, ('5' key) that hides everything but the highlight probes. This is useful in very big VLSI designs to quickly locate start and end point of nets. Pressing again the '5' key restores the normal view.
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diff --git a/doc/xschem_man/netlisting.html b/doc/xschem_man/netlisting.html
index e12068e2..07128284 100644
--- a/doc/xschem_man/netlisting.html
+++ b/doc/xschem_man/netlisting.html
@@ -43,7 +43,7 @@ p{padding: 15px 30px 10px;}
Consider the following top level schematic, part of the XSCHEM distribution (examples/poweramp.sch).
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This schematic is made of some leaf components and some subcircuit components: diff --git a/doc/xschem_man/parameters.html b/doc/xschem_man/parameters.html index 97a7a020..212ff205 100644 --- a/doc/xschem_man/parameters.html +++ b/doc/xschem_man/parameters.html @@ -37,12 +37,12 @@ p{padding: 15px 30px 10px;} shift key pressed, so with edit property 'q' key you will change properties for both.
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By doing the same for the NMOS transistors we end up with a schematic with fully parametrized transistor geometry.
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Now we have to change the mylib/nand2.sym symbol. Save the changes in the nand2 schematic (<shift>S) and load (Ctrl-o) @@ -50,7 +50,7 @@ p{padding: 15px 30px 10px;} anything hit the 'q' key to edit the symbol global property string. make the changes as shown in the picture.
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The template attribute defines the default values to assign to WN, LN, WP, LP. The format string is updated to pass parameters, @@ -59,7 +59,7 @@ p{padding: 15px 30px 10px;} You may also add some descriptive text ('t') so you will visually see the actual value for the parameters of the component:
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Now close the modified symbol saving the changes. Let's test the placement of the new modified symbol. Start a new @@ -67,7 +67,7 @@ p{padding: 15px 30px 10px;} the NAND2 gate. by pressing 'q' you are now able to speciify different values for the geometric parameters:
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let's place a second instance (select and 'c' copy key) of the nand gate. set for the second NAND gate different WN, LN, WP, LP parameters. @@ -79,7 +79,7 @@ p{padding: 15px 30px 10px;} TIP: XSCHEM can automatically place pin labels on a component: just select it and press the Shift-h key.
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now save the new schematic ('s' key, save in mylib/test2.sch) If you enable the netlist window, menu Options->Show netlist win and press diff --git a/doc/xschem_man/run_xschem.html b/doc/xschem_man/run_xschem.html index 1b2c47dd..f38a934f 100644 --- a/doc/xschem_man/run_xschem.html +++ b/doc/xschem_man/run_xschem.html @@ -29,13 +29,13 @@ user:~$ xschem
the xschem window should appear. If xschem is not in the search path then specify its full pathname.
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if a filename is given that file will be loaded on startup:
user:~$ xschem .../xschem_library/examples/0_examples_top.sch-
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@@ -98,12 +98,12 @@ the schematic file `counter.sch' will be loaded.
To create a new schematic run xschem and give a non existent filename:
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You can save the schematic by pressing '<ctrl shift>s' or by using the menu File - Save As:
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If no filename change is needed you can just use File - Save. Now a new empty schematic file is created. You can use this test.sch for testing while diff --git a/doc/xschem_man/simulation.html b/doc/xschem_man/simulation.html index d54cde3d..fd7cad7e 100644 --- a/doc/xschem_man/simulation.html +++ b/doc/xschem_man/simulation.html @@ -28,7 +28,7 @@ p{padding: 15px 30px 10px;} can be placed in a schematic acting as a container of text files for all the needed SPICE models and any additional information to make the schematic ready for simulation.
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The devices/netlist_not_shown symbol shown in the picture (with name MODELS) for example contains all the spice models of the components used in the schematic, this makes @@ -48,7 +48,7 @@ p{padding: 15px 30px 10px;} that is able to show simulator results. Install these two valuable tools and setup simulator invocation by using the Simulator configurator (Simulation->Configure Simulators and tools).
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The text entry on the verilog line is the command to invoke icarus verilog simulation. $N will be expanded to the netlist file ($netlist_dir/greycnt.v), while $n @@ -64,7 +64,7 @@ p{padding: 15px 30px 10px;}
user:~$ xschem examples/greycnt-
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This testbench has a 8 bit input vector A[7:0] and two output vectors, B[7:0] and C[7:0]. B[7:0] is a grey coded vector, this mean that if A[7:0] is incremented as a binary number @@ -81,19 +81,19 @@ user:~$ xschem examples/greycnt An Ex-Nor gate can be represented as a verilog primitive, so for the xnor gate we just need to setup a verilog_format attribute in the global property string of the xnor.sym gate:
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the 'assign' symbol is much simpler, in this property string you see the definition for SPICE (format attribute), Verilog (verilog_format) and VHDL (vhdl_format). This shows how a single symbol can be used for different netlist formats.
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While showing the top-level testbench greycnt set XSCHEM in Verilog mode (menu Options->Verilog radio button, or <Shift>V key) and press the edit property 'q' key, you will see some verilog code:
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This is the testbench behavioral code that generates stimuli for the simulation and gives instructions on where to save simulation results. If you generate the verilog netlist with @@ -149,28 +149,28 @@ endmodule in this case the input vector A[7:0] and the grey coded B[7:0] vectors are shown. You can quit the simulator log window by pressing 'q'.
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If simulation completes with no errors waveforms can be viewed. Press the Waves button in the top-right of the menu bar, you may add waveforms in the gtkwave window:
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If the schematic contains errors that the simulator can not handle instead of the simulation log a window showing the error messages from the simulator is shown:
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To facilitate the debug you may wish to edit the netlist (Simulation->Edit Netlist) to locate the error, in the picture below i inserted deliberately a random string to trigger the failure:
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As you can see the error is in the behavioral code of the top level greycnt schematic, so edit the global property ('q' key with no component selected) and fix the error.
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diff --git a/doc/xschem_man/symbol_property_syntax.html b/doc/xschem_man/symbol_property_syntax.html
index c7025cf2..129699cf 100644
--- a/doc/xschem_man/symbol_property_syntax.html
+++ b/doc/xschem_man/symbol_property_syntax.html
@@ -56,7 +56,7 @@ p{padding: 15px 30px 10px;}
+
Only symbols of type subcircuit or primitive may be descended into
@@ -87,10 +87,10 @@ p{padding: 15px 30px 10px;}
This allows to create different netlists for simulation (example: all MOS are defined as subcircuits)
or LVS (no device subcircuits).
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The order these attributes appear in the property string is not important,
they can be on the same line or on different lines:
@@ -135,7 +135,7 @@ type=nmos
instead of a
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If no matching attribute is defined in instance (for example we have @W in symbol and no W=... in instance) the @W string is substituted with an empty string. @@ -184,7 +184,7 @@ type=nmos MOS symbol definition; the model attribute is declared as string and it will be quoted in VHDL netlists.
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the resulting netlist is shown here, note that without the generic_type attribute the irf5305 string would not be quoted.
@@ -215,7 +215,7 @@ end arch_test2 ;
pins. This allows to realize inherited connections, a kind of hidden pins with connections passed as parameters.
Example of a symbol definition for the following cmos gate:
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the symbol property list defines 2 extra pins , VCCPIN and VSSPIN that can be assigned to at
component instantiation. The extra property tells XSCHEM that these 2 parameters are connection pins and not parameters
@@ -298,7 +298,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1
Defines the direction of a symbol pin. Allowed values are in, out, inout.
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This attribute instructs xschem to do a 'propagate highlight' from the pin with this attribute to the @@ -312,7 +312,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1 global attribute. There is one 'funtionn' for each n output pin. see 'functionn' attribute for more info.
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@@ -332,7 +332,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1 after selecting the pin to know its sequence number). Multiple functions (function3="...", function4="...") can be defined in case of elements with multiple outputs.
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Commands that can appear in functions are:
@@ -363,7 +363,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1 Global nets in spice netlists are like global variables in a C program, these nets are accessible at any hierarchical level without the need of passing them through pin connections. -
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+
@@ -65,11 +65,11 @@ p{padding: 15px 30px 10px;} (devices/bus_connect_nolab.sym) are used to take slices of bits from the main bus. Wire labels are used to define bus slices. To display thick wires for busses, select all wire segments, then press 'q' and add attribute bus=true.
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following picture shows an istantiation of 6 inverters:
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The generated spice netlist is the following:
@@ -86,7 +86,7 @@ xinv0 BB5 AA0 bfExample of a more complex bus routing. main bus is a bundle of 2 buses: DATA_A[0..15] and DATA_B[0..15]
-
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diff --git a/doc/xschem_man/tutorial_create_symbol.html b/doc/xschem_man/tutorial_create_symbol.html
index d5ce767c..2b764548 100644
--- a/doc/xschem_man/tutorial_create_symbol.html
+++ b/doc/xschem_man/tutorial_create_symbol.html
@@ -22,14 +22,14 @@ p{padding: 15px 30px 10px;}
In this tutorial we will build a 4011 CMOS quad 2-input NAND symbol.
This IC has 4 nand gates (3 pins each, total 4*3=12 pins + VDD,VSS power pins)
This device comes in a dual in line 14 pin package.
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+
+
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Do NOT forget to reset the grid setting to the default (10) value as soon as you finished drawing small objects, otherwise the rest of the objects will be all off grid making the symbol unusable
Update: a more advanced command is now available to place a symbol pin: Alt-p
+
+
+
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Instead of the q key the attribute dialog box can also be displayed by placing the mouse pointer over the pin object and pressing the right mouse button
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tEDAx v1 diff --git a/doc/xschem_man/tutorial_gschemtoxschem.html b/doc/xschem_man/tutorial_gschemtoxschem.html index 3abfb830..4e76a363 100644 --- a/doc/xschem_man/tutorial_gschemtoxschem.html +++ b/doc/xschem_man/tutorial_gschemtoxschem.html @@ -57,9 +57,9 @@ done-Below an example of a schematic and a symbol shown both in xschem and lepton-schematic (gschem fork)
-+
![]()
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![]()
Notes for schematics targeted for spice simulations
@@ -96,7 +96,7 @@ done since the LATESN symbol does not have such supply pins.
-
In spice netlist VDD/GND to the subcircuit is in this particular case passed via net-assign.+
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diff --git a/doc/xschem_man/tutorial_install_xschem.html b/doc/xschem_man/tutorial_install_xschem.html index e352b3b5..b029fac5 100644 --- a/doc/xschem_man/tutorial_install_xschem.html +++ b/doc/xschem_man/tutorial_install_xschem.html @@ -128,7 +128,7 @@ schippes@mazinga:~/build/trunk$ sudo make install schippes@mazinga:~/build/trunk$ cd schippes@mazinga:~$ xschem


schippes@mazinga:~$ /usr/local/bin/xschem @@ -156,21 +156,21 @@ schippes@mazinga:~$ xschem




















+
@@ -60,14 +60,14 @@ lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl Ngspice simulator is selected (not Ngspice batch). Also ensure the spice netlist mode is selected (Options -> Spice netlist).
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If you now press the Netlist followed by the Simulate button simulation should complete with no errors.
-
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You can close the simulator since we need only the cmos_example.raw file that is now saved
in the simulation directory (usually ~/.xschem/simulations/cmos_example.raw).
@@ -89,17 +89,17 @@ xschem [~]
The first element is the devices/spice_probe.sym component. This must be attached to
some schematic wires to show the voltage value.
+
Place some of these elements on various nets, issue the above mentioned ngspice::annotate command and see the voltage values in the schematic.
-
+
Another useful component is the devices/ammeter.sym one which allow to monitor branch currents. Break some wires and insert this component as shown here:
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IMPORTANT: When inserting current probes the circuit topology changes (new nodes are created) so you need to re-create the netlist and re-run the simulation @@ -108,7 +108,7 @@ xschem [~] Doing again the ngspice::annotate command after simulation will update the ammeters showing the branch currents.
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These voltage and current values are inserted in the probe components as attributes and thus can be saved to file. Remember that if you change the circuit the values shown in the probe elements are no longer valid, @@ -119,7 +119,7 @@ xschem [~] annotate script. The advantage of this method is that values pushed into probes can be saved to file and are thus persistent.
-
+
@@ -151,16 +151,16 @@ write cmos_example.raw component, but does not need to be attached to any specific point or wire. Edit its attributes and set its node attribute to an existing saved variable in the raw file.
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+
Run again the simulation and the ngspice::annotate command and values will be updated.
-
+
You can add additional variables in the raw file , for example modifying the .save instruction:
.save all @m4[gm] @m5[gm] @m1[gm]
+
Data annotated into the schematic using these components allows more simulation parameters to be viewed into the schematic, not being restricted to currents and voltages. Since these components get data using a pull method @@ -174,11 +174,11 @@ write cmos_example.raw more complex data. In the example below this component is used to display the electrical power of transistor m3, calculated as V(GN) * Id(m3).
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+
The example shown uses this component to display a (meaningless, but shows the usage) gm ratio of 2 transistors:
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+
The syntax is a bit complex, considering the verbosity of TCL and the strange ngspice naming syntax, however once a working one is created changing the expression is easy. @@ -189,7 +189,7 @@ write cmos_example.raw can be placed with the tcl command for doing the annotation. Just do a Ctrl-Click on it to trigger the annotation.
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+
+
+
+
+
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+
+
+
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Another sample2.symdef file specifically created to generate a perfectly valid xschem symbol (including
attributes for spice netlisting) is the following:
@@ -171,7 +171,7 @@ STEFAN FREDERIK SCHIPPERS
9 io> DGND1
20 io> GND2
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+
some extensions of xschem's symdef text file format with respect to original djboxsym format: diff --git a/doc/xschem_man/tutorial_xschem_slides.html b/doc/xschem_man/tutorial_xschem_slides.html index 04792b9a..e0df0b71 100644 --- a/doc/xschem_man/tutorial_xschem_slides.html +++ b/doc/xschem_man/tutorial_xschem_slides.html @@ -36,8 +36,8 @@ p{padding: 15px 30px 10px;}
-
+
+
diff --git a/doc/xschem_man/tutorial_xschem_slides06.html b/doc/xschem_man/tutorial_xschem_slides06.html
index f8a4661e..201d38d4 100644
--- a/doc/xschem_man/tutorial_xschem_slides06.html
+++ b/doc/xschem_man/tutorial_xschem_slides06.html
@@ -34,7 +34,7 @@ p{padding: 15px 30px 10px;}
+
diff --git a/doc/xschem_man/tutorial_xschem_slides061.html b/doc/xschem_man/tutorial_xschem_slides061.html
index 80fed6fc..88d047fb 100644
--- a/doc/xschem_man/tutorial_xschem_slides061.html
+++ b/doc/xschem_man/tutorial_xschem_slides061.html
@@ -32,7 +32,7 @@ p{padding: 15px 30px 10px;}
+
diff --git a/doc/xschem_man/tutorial_xschem_slides07.html b/doc/xschem_man/tutorial_xschem_slides07.html
index ba4eaebe..39f4ba3d 100644
--- a/doc/xschem_man/tutorial_xschem_slides07.html
+++ b/doc/xschem_man/tutorial_xschem_slides07.html
@@ -33,7 +33,7 @@ p{padding: 15px 30px 10px;}
-
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diff --git a/doc/xschem_man/tutorial_xschem_slides071.html b/doc/xschem_man/tutorial_xschem_slides071.html
index 028845c1..1064bee1 100644
--- a/doc/xschem_man/tutorial_xschem_slides071.html
+++ b/doc/xschem_man/tutorial_xschem_slides071.html
@@ -31,8 +31,8 @@ p{padding: 15px 30px 10px;}
of the feedback inverter is different from the forward inverter. This is all done with instance attributes.
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diff --git a/doc/xschem_man/tutorial_xschem_slides08.html b/doc/xschem_man/tutorial_xschem_slides08.html
index 5a133b36..f81d12e5 100644
--- a/doc/xschem_man/tutorial_xschem_slides08.html
+++ b/doc/xschem_man/tutorial_xschem_slides08.html
@@ -52,8 +52,8 @@ th,td {font-size: 60%;padding: 3px;}
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diff --git a/doc/xschem_man/tutorial_xschem_slides081.html b/doc/xschem_man/tutorial_xschem_slides081.html
index 426ac056..44226e32 100644
--- a/doc/xschem_man/tutorial_xschem_slides081.html
+++ b/doc/xschem_man/tutorial_xschem_slides081.html
@@ -36,7 +36,7 @@ p{padding: 15px 30px 10px;}
+
diff --git a/doc/xschem_man/tutorial_xschem_slides0812.html b/doc/xschem_man/tutorial_xschem_slides0812.html
index fa379f57..24c8606c 100644
--- a/doc/xschem_man/tutorial_xschem_slides0812.html
+++ b/doc/xschem_man/tutorial_xschem_slides0812.html
@@ -29,9 +29,9 @@ p{padding: 15px 30px 10px;}
+
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diff --git a/doc/xschem_man/tutorial_xschem_slides082.html b/doc/xschem_man/tutorial_xschem_slides082.html
index e08d34b9..3d3c6770 100644
--- a/doc/xschem_man/tutorial_xschem_slides082.html
+++ b/doc/xschem_man/tutorial_xschem_slides082.html
@@ -33,7 +33,7 @@ p{padding: 15px 30px 10px;}
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diff --git a/doc/xschem_man/tutorial_xschem_slides09.html b/doc/xschem_man/tutorial_xschem_slides09.html
index 22fd59c8..650783f4 100644
--- a/doc/xschem_man/tutorial_xschem_slides09.html
+++ b/doc/xschem_man/tutorial_xschem_slides09.html
@@ -32,8 +32,8 @@ p{padding: 15px 30px 10px;}
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diff --git a/doc/xschem_man/xschem_elements.html b/doc/xschem_man/xschem_elements.html
index 5f607cca..5509e740 100644
--- a/doc/xschem_man/xschem_elements.html
+++ b/doc/xschem_man/xschem_elements.html
@@ -34,7 +34,7 @@ p{padding: 15px 30px 10px;}
electrical node in the picture below has been highlighted in red (this is a XSCHEM function we
will cover later on).
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+
@@ -44,7 +44,7 @@ p{padding: 15px 30px 10px;} wires, but using the 'l' key. The 'Layers' menu allows to select various different layers (colors) for the line.
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+
Rectangles like Lines are drawable on multiple layers, and also do not carry any electrical information. @@ -52,7 +52,7 @@ p{padding: 15px 30px 10px;} Different fill styles (or no fill) can be defined for each layer. Rectangles are placed with the 'r' bindkey
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Polygons are paths that can be drawn on any layer. Placements begins with the 'ctrl-w' key @@ -66,7 +66,7 @@ p{padding: 15px 30px 10px;}
A fill=true attribute may be given to have the shape filled with the layer fill style.
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Arcs may be placed by hitting the Shift-C key. First click the start point, then the end point.
@@ -81,14 +81,14 @@ p{padding: 15px 30px 10px;}
If a circle is needed then use the Ctrl-Shift-C key combination.
A fill=true attribute may be given to have the shape filled with the layer fill style.
+
Text can be placed with the 't' bindkey. A dialog box appears where the user inputs the text and text size.
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+
The layer property can be used to draw text on a different layer, for example, setting layer=6 will draw on cyan color. @@ -99,12 +99,12 @@ p{padding: 15px 30px 10px;} A weight=bold attribute may be given for bold text, while a slant=italic or slant=oblique may specify italic or slanted text.
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You wil learn in the xschem properties chapter how to set, edit and change object properties.
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Symbols are graphical elements that represent electrical components. A symbol represents an electronic @@ -114,7 +114,7 @@ p{padding: 15px 30px 10px;} For example you see three placements of the 'npn' bipolar transistor symbol. Like in C++, where objects are instances of classes, here components are instances of symbols.
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Symbols (like schematic drawings) are stored in xschem libraries. For XSCHEM a library is just a directory placed under the diff --git a/doc/xschem_man/xschem_footer.html b/doc/xschem_man/xschem_footer.html index 0c887e23..0952b616 100644 --- a/doc/xschem_man/xschem_footer.html +++ b/doc/xschem_man/xschem_footer.html @@ -4,8 +4,8 @@
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The name=p dir=inout propag=1 pinnumber=1 property string tells that the selected pin name is 'p', @@ -54,7 +54,7 @@ p{padding: 15px 30px 10px;} To view the xschem index of a pin click and hold the mouse on it, the index will be shown as n= <number> in the bottom status line:
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The pinnumber=1 attribute is used when exporting to pcb software (via the tEDAx netlist) and tells to which pin number on the resistor footprint this positive pin is bound. @@ -63,7 +63,7 @@ p{padding: 15px 30px 10px;} The text primitives also have properties. For texts the property string may be used to specify font and the layer to use for displaying text.
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If you click outside of any displayed graphics in XSCHEM @@ -80,7 +80,7 @@ p{padding: 15px 30px 10px;} So, in addition to properties associated to graphical objects and symbols, we also have properties associated to schematic (.sch) and symbol files (.sym)
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In the above 'Symbol' global property string, the format attribute defines the format of the SPICE netlist. The SPICE netlist element line starts with the @@ -92,7 +92,7 @@ p{padding: 15px 30px 10px;} We will return on component instantiation later, but for now, considering the following picture:
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The @name will expand to R0, @pinlist for the R0
component will expand to POS NEG.
@@ -103,7 +103,7 @@ p{padding: 15px 30px 10px;}
of these. Select a pin, press the copy 'c'
bindkey and place a new copy of it somewhere.
+
After copying the pin you may change its properties, for example you will change its property string to @@ -133,7 +133,7 @@ p{padding: 15px 30px 10px;} set its number to 1 and so on. By doing so you have defined a specific pin ordering of the symbol.
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@@ -154,7 +154,7 @@ p{padding: 15px 30px 10px;}
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