41 lines
928 B
Plaintext
41 lines
928 B
Plaintext
|
|
v {xschem version=2.9.5 file_version=1.1}
|
||
|
|
G {type=inv
|
||
|
|
vhdl_stop=true
|
||
|
|
format="#@spiceprefix\\\\MA#@name @#0 @#1 @VCCPIN @VCCBPIN @modelp w=@wp l=@lp m=@m
|
||
|
|
#@spiceprefix\\\\MB#@name @#0 @#1 @VSSPIN @VSSBPIN @modeln w=@wn l=@ln m=@m"
|
||
|
|
template="name=x1 m=1
|
||
|
|
+ wn=1 ln=0.2 modeln=nmos
|
||
|
|
+ wp=2 lp=0.2 modelp=pmos
|
||
|
|
+ VCCPIN=VCC VCCBPIN=VCC VSSPIN=VSS VSSBPIN=VSS"
|
||
|
|
extra="VCCPIN VCCBPIN VSSPIN VSSBPIN"
|
||
|
|
generic_type="m=integer
|
||
|
|
wn=real ln=real
|
||
|
|
wp=real lp=real
|
||
|
|
VCCPIN=string
|
||
|
|
VCCBPIN=string
|
||
|
|
VSSPIN=string
|
||
|
|
VSSBPIN=string
|
||
|
|
modeln=string
|
||
|
|
modelp=string"
|
||
|
|
|
||
|
|
verilog_stop=true
|
||
|
|
}
|
||
|
|
V {}
|
||
|
|
S {}
|
||
|
|
E {}
|
||
|
|
L 4 -40 0 -25 0 {}
|
||
|
|
L 4 -25 -20 -25 20 {}
|
||
|
|
L 4 -25 -20 15 0 {}
|
||
|
|
L 4 -25 20 15 0 {}
|
||
|
|
L 4 25 0 40 0 {}
|
||
|
|
B 5 37.5 -2.5 42.5 2.5 {name=Z dir=out verilog_type=wire}
|
||
|
|
B 5 -42.5 -2.5 -37.5 2.5 {name=A dir=in}
|
||
|
|
A 4 20 0 5 180 360 {}
|
||
|
|
T {@name
|
||
|
|
@wn\\/@ln
|
||
|
|
@modeln} -20 60 2 1 0.2 0.2 {}
|
||
|
|
T {m=@m
|
||
|
|
@wp\\/@lp
|
||
|
|
@modelp} -20 -60 0 0 0.2 0.2 {}
|
||
|
|
T {@VCCPIN} 10 -20 0 0 0.2 0.2 {}
|