Files
verilator/docs
Geza Lore bb0e1c8c61 Optimize temporary insertion for concatenations in Dfg (#7013)
Add a new Dfg pass 'pushDownSel'. This will try to move selects through
a tree of concatenations in order to eliminate temporary nodes holding
intermediate concatenation results. This can get rid of a lot of
variables when packed arrays are assigned in parts (e.g. bit-wise).
2026-02-07 18:06:12 +00:00
..
2026-01-28 18:32:50 -05:00
2022-05-14 16:12:57 -04:00
2026-02-05 17:45:24 -05:00

.. SPDX-FileCopyrightText: 2003-2026 Wilson Snyder
.. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

Verilator Documentation
=======================

This folder contains sources for Verilator documentation.

For formatted documentation see:

- `Verilator README <https://github.com/verilator/verilator>`_

- `Verilator installation and package directory structure
  <https://verilator.org/install>`_

- `Verilator manual (HTML) <https://verilator.org/verilator_doc.html>`_, or
  `Verilator manual (PDF) <https://verilator.org/verilator_doc.pdf>`_

- `Subscribe to Verilator announcements
  <https://github.com/verilator/verilator-announce>`_

- `Verilator forum <https://verilator.org/forum>`_

- `Verilator issues <https://verilator.org/issues>`_