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10 lines
279 B
Plaintext
10 lines
279 B
Plaintext
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2019 Stefan Wallentowitz
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// SPDX-License-Identifier: CC0-1.0
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`verilator_config
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parallel_case -file "t/t_assert_synth.v" -lines 52
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