77 lines
2.4 KiB
Systemverilog
77 lines
2.4 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module - parameter/localparam refs in bins
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// This file ONLY is placed into the Public Domain, for any use, without warranty.
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// SPDX-FileCopyrightText: 2026 Wilson Snyder
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// SPDX-License-Identifier: CC0-1.0
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// Test: Referencing a parameter/localparam identifier inside a covergroup
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// `bins` value or range. This previously triggered an internal error
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// (V3WidthCommit.cpp: No dtype) because the folded constant had no dtype.
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// Expected: compiles and the bounds behave exactly like numeric literals.
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// verilog_format: off
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`define stop $stop
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`define checkr(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d: got=%f exp=%f\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
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// verilog_format: on
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module t #(
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parameter int PMIN = -100
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) (
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input clk
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);
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localparam int LMAX = 100;
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int signed value;
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covergroup cg;
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cp: coverpoint value {
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bins negative = {[PMIN : -1]}; // parameter as range lower bound
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bins zero = {0};
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bins positive = {[1 : LMAX]}; // localparam as range upper bound
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bins maxv = {LMAX}; // localparam as single value
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bins minv = {PMIN}; // parameter as single value
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}
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endgroup
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cg cg_inst = new;
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int cyc = 0;
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always @(posedge clk) begin
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cyc <= cyc + 1;
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case (cyc)
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0: value <= -100; // Hit negative + minv
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1: value <= 0; // Hit zero
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2: value <= 50; // Hit positive
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3: value <= 100; // Hit positive (dup) + maxv
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4: begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endcase
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cg_inst.sample();
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// Coverage progression (NBA committed before sample() within always block).
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// A final sample() also runs on the $finish cycle (value still 100), so the
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// positive/maxv hit counts are one higher than the number of distinct stimuli.
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// cyc=0: value=-100 -> negative + minv -> 2/5=40%
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// cyc=1: value=0 -> zero -> 3/5=60%
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// cyc=2: value=50 -> positive -> 4/5=80%
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// cyc=3: value=100 -> positive(dup) + maxv -> 5/5=100%
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if (cyc == 0) begin
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`checkr(cg_inst.get_inst_coverage(), 40.0);
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end
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if (cyc == 1) begin
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`checkr(cg_inst.get_inst_coverage(), 60.0);
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end
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if (cyc == 2) begin
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`checkr(cg_inst.get_inst_coverage(), 80.0);
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end
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if (cyc == 3) begin
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`checkr(cg_inst.get_inst_coverage(), 100.0);
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end
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end
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endmodule
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