// DESCRIPTION: Verilator: Verilog Test module - parameter/localparam refs in bins
// This file ONLY is placed into the Public Domain, for any use, without warranty.
// SPDX-FileCopyrightText: 2026 Wilson Snyder
// SPDX-License-Identifier: CC0-1.0
// Test: Referencing a parameter/localparam identifier inside a covergroup
// `bins` value or range. This previously triggered an internal error
// (V3WidthCommit.cpp: No dtype) because the folded constant had no dtype.
// Expected: compiles and the bounds behave exactly like numeric literals.
// verilog_format: off
`define stop $stop
`define checkr(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d: got=%f exp=%f\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
// verilog_format: on
modulet#(
parameterintPMIN=-100
)(
inputclk
);
localparamintLMAX=100;
intsignedvalue;
covergroupcg;
cp:coverpointvalue{
binsnegative={[PMIN:-1]};// parameter as range lower bound