3 Commits

Author	SHA1	Message	Date
Veripool API Bot	07ed6aef53	Tests: Verilog format	2026-03-08 18:26:40 -04:00
Anthony Donlon	3dde57d539	Fix lint of case statements with enum and wildcard bits (#4464) (#4487)	2023-09-14 07:22:49 -04:00
Wilson Snyder	d87ef8394a	Fix CASEINCOMPLETE when covers all enum values (#3745) (#3782). ... Co-authored-by: "G-A. Kamendje" <gkamendje@gmail.com>	2022-11-30 19:42:21 -05:00