luke
/
verilator
mirror of https://github.com/verilator/verilator.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
3,734 Commits 2 Branches 166 Tags 167 MiB
Commit Graph

3 Commits

Author SHA1 Message Date
Geza Lore 4a404bd92e Always mask LSB in V3Merge Cond when mergin AstAnd 2020-06-06 00:17:59 +01:00
Wilson Snyder a433096d5a Internals: Fix misc internal coverage holes. No functional change intended. 2020-06-04 19:49:39 -04:00
Geza Lore fe306a36b8
Add MergeCond pass to combine assignments with ?: on rhs (#2376) 
This provides minor simulation performance benefit, but can provide
large C++ compilation time improvement, notably with Clang (4x).

This patch implements #2366 .
 2020-05-30 21:09:05 +01:00