3 Commits

Author	SHA1	Message	Date
Veripool API Bot	07ed6aef53	Tests: Verilog format	2026-03-08 18:26:40 -04:00
Wilson Snyder	7c6c6a684b	Add SPDX copyright identifiers, and get 'reuse' clean. No functional change.	2026-01-26 20:24:34 -05:00
Wilson Snyder	18f8c8a14f	Fix error when dotted refers to missing module (#2095).	2020-12-12 20:25:00 -05:00