07ed6aef53
Tests: Verilog format
2026-03-08 18:26:40 -04:00
7c6c6a684b
Add SPDX copyright identifiers, and get 'reuse' clean. No functional change.
2026-01-26 20:24:34 -05:00
915ceb2d04
Tests: Untabify tests. No functional change.
2022-05-01 10:10:00 -04:00
d4f7f5297a
Support IEEE time units and time precisions, #234 . ( #2253 )
...
Includes `timescale, $printtimescale, $timeformat.
VL_TIME_MULTIPLIER, VL_TIME_PRECISION, VL_TIME_UNIT have been removed
and the time precision must now match the SystemC time precision.
To get closer behavior to older versions, use e.g. --timescale-override
"1ps/1ps".
2020-04-15 19:39:03 -04:00
1ce360ed5b
Add SPDX license identifiers. No functional change.
2020-03-21 11:24:24 -04:00
384807ebbd
Ignore SystemVerilog timeunit and timeprecision
2008-10-14 14:49:54 -04:00
52912c6329
Convert repository to git from svn.
...
- Change .cvsignore to .gitignore
- Remove Id metacomments
- Cleanup whitespace at end of lines
2008-06-09 21:25:10 -04:00
d2ce499b59
Support SystemVerilog .name and .* interconnect.
...
git-svn-id: file://localhost/svn/verilator/trunk/verilator@906 77ca24e4-aefa-0310-84f0-b9a241c72d87
2007-03-14 13:06:08 +00:00
Veripool API Bot
Wilson Snyder