luke
/
verilator
mirror of https://github.com/verilator/verilator.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Apply make format

This commit is contained in:
Yilou Wang 2026-03-27 20:16:49 +01:00
parent eb114eb96f
commit fc975c409a
4 changed files with 6 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/V3Timing.cpp
View File

@ -892,9 +892,8 @@ class TimingControlVisitor final : public VNVisitor {
m_underProcedure = true; m_underProcedure = true;
// Workaround for killing `always` processes (doing that is pretty much UB) // Workaround for killing `always` processes (doing that is pretty much UB)
// TODO: Disallow killing `always` at runtime (throw an error) // TODO: Disallow killing `always` at runtime (throw an error)
// Do not make combinational always blocks (always @*) suspendable just because // Combo blocks (always @*) must not become coroutines -- they have no
// they need process context (e.g. for uvm_fatal's process::self()). Combo blocks // suspend points and would spin forever.
// have no timing controls and would spin forever as coroutines.
if (hasFlags(nodep, T_HAS_PROC) if (hasFlags(nodep, T_HAS_PROC)
&& !(m_activep && m_activep->sentreep() && m_activep->sentreep()->hasCombo())) && !(m_activep && m_activep->sentreep() && m_activep->sentreep()->hasCombo()))
addFlags(nodep, T_SUSPENDEE); addFlags(nodep, T_SUSPENDEE);

8
src/V3Width.cpp
View File

@ -4464,14 +4464,10 @@ class WidthVisitor final : public VNVisitor {
if (AstNodeFTask* const ftaskp if (AstNodeFTask* const ftaskp
= VN_CAST(m_memberMap.findMember(ifacep, nodep->name()), NodeFTask)) { = VN_CAST(m_memberMap.findMember(ifacep, nodep->name()), NodeFTask)) {
UINFO(5, __FUNCTION__ << "AstNodeFTask" << nodep); UINFO(5, __FUNCTION__ << "AstNodeFTask" << nodep);
// When a function/task is called through a virtual interface, its body may // VIF function may write any member; prevent constant-folding.
// write to interface member variables. Mark all members as sensIfacep so
// optimization passes do not constant-fold them across instances.
if (adtypep->isVirtual()) { if (adtypep->isVirtual()) {
for (AstNode* itemp = ifacep->stmtsp(); itemp; itemp = itemp->nextp()) { for (AstNode* itemp = ifacep->stmtsp(); itemp; itemp = itemp->nextp()) {
if (AstVar* const mvarp = VN_CAST(itemp, Var)) { if (AstVar* const mvarp = VN_CAST(itemp, Var)) { mvarp->sensIfacep(ifacep); }
mvarp->sensIfacep(ifacep);
}
} }
} }
userIterate(ftaskp, nullptr); userIterate(ftaskp, nullptr);

2
test_regress/t/t_wait_iface_vif.py
View File

@ -4,7 +4,7 @@
# This program is free software; you can redistribute it and/or modify it # This program is free software; you can redistribute it and/or modify it
# under the terms of either the GNU Lesser General Public License Version 3 # under the terms of either the GNU Lesser General Public License Version 3
# or the Perl Artistic License Version 2.0. # or the Perl Artistic License Version 2.0.
# SPDX-FileCopyrightText: 2025 Wilson Snyder # SPDX-FileCopyrightText: 2026 Wilson Snyder
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap import vltest_bootstrap

2
test_regress/t/t_wait_iface_vif.v
View File

@ -1,7 +1,7 @@
// DESCRIPTION: Verilator: Verilog Test module // DESCRIPTION: Verilator: Verilog Test module
// //
// This file ONLY is placed under the Creative Commons Public Domain. // This file ONLY is placed under the Creative Commons Public Domain.
// SPDX-FileCopyrightText: 2025 PlanV GmbH // SPDX-FileCopyrightText: 2026 PlanV GmbH
// SPDX-License-Identifier: CC0-1.0 // SPDX-License-Identifier: CC0-1.0
/* verilator lint_off ZERODLY */ /* verilator lint_off ZERODLY */