Add descriptive headers to output files
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@ -981,6 +981,7 @@ It also creates internal files that can be mostly ignored:
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{each_verilog_module}.vpp // Post-processed verilog (--debug)
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{each_verilog_module}.vpp // Post-processed verilog (--debug)
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{prefix}.flags_vbin // Verilator dependencies
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{prefix}.flags_vbin // Verilator dependencies
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{prefix}.flags_vpp // Pre-processor dependencies
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{prefix}.flags_vpp // Pre-processor dependencies
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{prefix}__verFiles.dat // Timestamps for skip-identical
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{prefix}{misc}.d // Make dependencies (-MMD)
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{prefix}{misc}.d // Make dependencies (-MMD)
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{prefix}{misc}.dot // Debugging graph files (--debug)
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{prefix}{misc}.dot // Debugging graph files (--debug)
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{prefix}{misc}.tree // Debugging files (--debug)
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{prefix}{misc}.tree // Debugging files (--debug)
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@ -10,6 +10,7 @@ eval 'exec perl -wS $0 ${1+"$@"}'
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require 5.005;
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require 5.005;
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use warnings;
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use warnings;
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print "// DESCR"."IPTION: Generated by verilator_includer via makefile\n";
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foreach my $param (@ARGV) {
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foreach my $param (@ARGV) {
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print "#include \"$param\"\n"
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print "#include \"$param\"\n"
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}
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}
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@ -125,6 +125,11 @@ void EmitCSyms::emitInt() {
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m_ofp = &hf;
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m_ofp = &hf;
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ofp()->putsHeader();
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ofp()->putsHeader();
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puts("// DESCR" "IPTION: Verilator output: Symbol table internal header\n");
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puts("//\n");
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puts("// Internal details; most calling programs do not need this header\n");
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puts("\n");
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puts("#ifndef _"+symClassName()+"_H_\n");
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puts("#ifndef _"+symClassName()+"_H_\n");
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puts("#define _"+symClassName()+"_H_\n");
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puts("#define _"+symClassName()+"_H_\n");
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puts("\n");
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puts("\n");
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@ -188,6 +193,7 @@ void EmitCSyms::emitImp() {
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V3OutCFile cf (filename);
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V3OutCFile cf (filename);
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m_ofp = &cf;
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m_ofp = &cf;
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ofp()->putsHeader();
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ofp()->putsHeader();
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puts("// DESCR" "IPTION: Verilator output: Symbol table implementation internals\n");
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puts("\n");
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puts("\n");
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// Includes
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// Includes
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@ -505,6 +505,7 @@ void V3EmitV::emitv() {
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// All-in-one file
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// All-in-one file
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V3OutVFile of (v3Global.opt.makeDir()+"/"+v3Global.opt.prefix()+"__Vout.v");
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V3OutVFile of (v3Global.opt.makeDir()+"/"+v3Global.opt.prefix()+"__Vout.v");
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of.putsHeader();
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of.putsHeader();
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of.puts("# DESCR" "IPTION: Verilator output: Verilog representation of internal tree for debug\n");
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EmitVFileVisitor visitor (v3Global.rootp(), &of);
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EmitVFileVisitor visitor (v3Global.rootp(), &of);
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} else {
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} else {
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// Process each module in turn
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// Process each module in turn
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@ -144,6 +144,7 @@ inline void V3FileDependImp::writeTimes(const string& filename, const string& cm
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if (ofp->fail()) v3fatalSrc("Can't write "<<filename);
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if (ofp->fail()) v3fatalSrc("Can't write "<<filename);
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string cmdline = stripQuotes(cmdlineIn);
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string cmdline = stripQuotes(cmdlineIn);
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*ofp<<"# DESCR"<<"IPTION: Verilator output: Timestamp data for --skip-identical. Delete at will."<<endl;
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*ofp<<"C \""<<cmdline<<"\""<<endl;
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*ofp<<"C \""<<cmdline<<"\""<<endl;
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#if !defined (__MINGW32__)
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#if !defined (__MINGW32__)
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@ -171,6 +172,9 @@ inline bool V3FileDependImp::checkTimes(const string& filename, const string& cm
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UINFO(2," --check-times failed: no input "<<filename<<endl);
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UINFO(2," --check-times failed: no input "<<filename<<endl);
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return false;
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return false;
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}
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}
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{
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string ignore; getline(*ifp, ignore);
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}
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{
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{
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char chkDir; *ifp>>chkDir;
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char chkDir; *ifp>>chkDir;
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char quote; *ifp>>quote;
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char quote; *ifp>>quote;
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