Fix internal error on integer casts, bug374.

This commit is contained in:
Wilson Snyder 2011-08-09 19:56:22 -04:00
parent df1da3dda9
commit f9bbf31d65
3 changed files with 18 additions and 4 deletions

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@ -3,6 +3,10 @@ Revision history for Verilator
The contributors that suggested a given feature are shown in []. [by ...] The contributors that suggested a given feature are shown in []. [by ...]
indicates the contributor was also the author of the fix; Thanks! indicates the contributor was also the author of the fix; Thanks!
* Verilator 3.821****
**** Fix internal error on integer casts, bug374. [Chandan Egbert]
* Verilator 3.820 2011/07/28 * Verilator 3.820 2011/07/28
** Support 'real' numbers and related functions. ** Support 'real' numbers and related functions.

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@ -642,10 +642,11 @@ private:
V3Width::widthParamsEdit(nodep->dtypep()); // MAY CHANGE dtypep() V3Width::widthParamsEdit(nodep->dtypep()); // MAY CHANGE dtypep()
AstBasicDType* basicp = nodep->dtypep()->basicp(); if (!basicp) nodep->v3fatalSrc("Unimplemented: Casting non-simple data type"); AstBasicDType* basicp = nodep->dtypep()->basicp(); if (!basicp) nodep->v3fatalSrc("Unimplemented: Casting non-simple data type");
nodep->widthSignedFrom(basicp); nodep->widthSignedFrom(basicp);
AstNode* newp = nodep->lhsp()->unlinkFrBack(); if (!basicp->isDouble() && !nodep->lhsp()->isDouble()) {
if (!basicp->isDouble() && !newp->isDouble()) { // Note widthCheck might modify nodep->lhsp()
widthCheck(nodep,"Cast",newp,nodep->width(),nodep->width(),true); widthCheck(nodep,"Cast",nodep->lhsp(),nodep->width(),nodep->width(),true);
} }
AstNode* newp = nodep->lhsp()->unlinkFrBack();
if (basicp->numeric() == newp->numeric()) { if (basicp->numeric() == newp->numeric()) {
newp = newp; // Can just remove cast newp = newp; // Can just remove cast
} else if (basicp->isDouble() && !newp->isDouble()) { } else if (basicp->isDouble() && !newp->isDouble()) {

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@ -19,6 +19,8 @@ module t (/*AUTOARG*/
realtime uninit; realtime uninit;
initial if (uninit != 0.0) $stop; initial if (uninit != 0.0) $stop;
sub_cast_bug374 sub (.cyc5(cyc[4:0]), .*);
initial begin initial begin
// rtoi truncates // rtoi truncates
if ($rtoi(36.7) != 36) $stop; if ($rtoi(36.7) != 36) $stop;
@ -132,5 +134,12 @@ module t (/*AUTOARG*/
$finish; $finish;
end end
end end
endmodule
module sub_cast_bug374(input clk, input [4:0] cyc5);
integer i;
always @(posedge clk) begin
i <= integer'(cyc5);
end
endmodule endmodule