Fix internal error on integer casts, bug374.
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@ -3,6 +3,10 @@ Revision history for Verilator
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The contributors that suggested a given feature are shown in []. [by ...]
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The contributors that suggested a given feature are shown in []. [by ...]
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indicates the contributor was also the author of the fix; Thanks!
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indicates the contributor was also the author of the fix; Thanks!
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* Verilator 3.821****
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**** Fix internal error on integer casts, bug374. [Chandan Egbert]
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* Verilator 3.820 2011/07/28
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* Verilator 3.820 2011/07/28
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** Support 'real' numbers and related functions.
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** Support 'real' numbers and related functions.
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@ -642,10 +642,11 @@ private:
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V3Width::widthParamsEdit(nodep->dtypep()); // MAY CHANGE dtypep()
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V3Width::widthParamsEdit(nodep->dtypep()); // MAY CHANGE dtypep()
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AstBasicDType* basicp = nodep->dtypep()->basicp(); if (!basicp) nodep->v3fatalSrc("Unimplemented: Casting non-simple data type");
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AstBasicDType* basicp = nodep->dtypep()->basicp(); if (!basicp) nodep->v3fatalSrc("Unimplemented: Casting non-simple data type");
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nodep->widthSignedFrom(basicp);
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nodep->widthSignedFrom(basicp);
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AstNode* newp = nodep->lhsp()->unlinkFrBack();
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if (!basicp->isDouble() && !nodep->lhsp()->isDouble()) {
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if (!basicp->isDouble() && !newp->isDouble()) {
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// Note widthCheck might modify nodep->lhsp()
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widthCheck(nodep,"Cast",newp,nodep->width(),nodep->width(),true);
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widthCheck(nodep,"Cast",nodep->lhsp(),nodep->width(),nodep->width(),true);
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}
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}
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AstNode* newp = nodep->lhsp()->unlinkFrBack();
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if (basicp->numeric() == newp->numeric()) {
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if (basicp->numeric() == newp->numeric()) {
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newp = newp; // Can just remove cast
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newp = newp; // Can just remove cast
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} else if (basicp->isDouble() && !newp->isDouble()) {
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} else if (basicp->isDouble() && !newp->isDouble()) {
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@ -19,6 +19,8 @@ module t (/*AUTOARG*/
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realtime uninit;
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realtime uninit;
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initial if (uninit != 0.0) $stop;
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initial if (uninit != 0.0) $stop;
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sub_cast_bug374 sub (.cyc5(cyc[4:0]), .*);
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initial begin
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initial begin
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// rtoi truncates
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// rtoi truncates
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if ($rtoi(36.7) != 36) $stop;
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if ($rtoi(36.7) != 36) $stop;
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@ -132,5 +134,12 @@ module t (/*AUTOARG*/
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$finish;
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$finish;
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end
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end
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end
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end
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endmodule
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module sub_cast_bug374(input clk, input [4:0] cyc5);
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integer i;
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always @(posedge clk) begin
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i <= integer'(cyc5);
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end
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endmodule
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endmodule
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