From f9bbf31d6538e73acbfd5a0c77f78b960687e4b6 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 9 Aug 2011 19:56:22 -0400 Subject: [PATCH] Fix internal error on integer casts, bug374. --- Changes | 4 ++++ src/V3Width.cpp | 7 ++++--- test_regress/t/t_math_real.v | 11 ++++++++++- 3 files changed, 18 insertions(+), 4 deletions(-) diff --git a/Changes b/Changes index 8b079ea4d..f1b9b5508 100644 --- a/Changes +++ b/Changes @@ -3,6 +3,10 @@ Revision history for Verilator The contributors that suggested a given feature are shown in []. [by ...] indicates the contributor was also the author of the fix; Thanks! +* Verilator 3.821**** + +**** Fix internal error on integer casts, bug374. [Chandan Egbert] + * Verilator 3.820 2011/07/28 ** Support 'real' numbers and related functions. diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 4b0b8cbff..53bd58bdb 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -642,10 +642,11 @@ private: V3Width::widthParamsEdit(nodep->dtypep()); // MAY CHANGE dtypep() AstBasicDType* basicp = nodep->dtypep()->basicp(); if (!basicp) nodep->v3fatalSrc("Unimplemented: Casting non-simple data type"); nodep->widthSignedFrom(basicp); - AstNode* newp = nodep->lhsp()->unlinkFrBack(); - if (!basicp->isDouble() && !newp->isDouble()) { - widthCheck(nodep,"Cast",newp,nodep->width(),nodep->width(),true); + if (!basicp->isDouble() && !nodep->lhsp()->isDouble()) { + // Note widthCheck might modify nodep->lhsp() + widthCheck(nodep,"Cast",nodep->lhsp(),nodep->width(),nodep->width(),true); } + AstNode* newp = nodep->lhsp()->unlinkFrBack(); if (basicp->numeric() == newp->numeric()) { newp = newp; // Can just remove cast } else if (basicp->isDouble() && !newp->isDouble()) { diff --git a/test_regress/t/t_math_real.v b/test_regress/t/t_math_real.v index e97b46e52..9fc2c7749 100644 --- a/test_regress/t/t_math_real.v +++ b/test_regress/t/t_math_real.v @@ -19,6 +19,8 @@ module t (/*AUTOARG*/ realtime uninit; initial if (uninit != 0.0) $stop; + sub_cast_bug374 sub (.cyc5(cyc[4:0]), .*); + initial begin // rtoi truncates if ($rtoi(36.7) != 36) $stop; @@ -132,5 +134,12 @@ module t (/*AUTOARG*/ $finish; end end - +endmodule + +module sub_cast_bug374(input clk, input [4:0] cyc5); + integer i; + + always @(posedge clk) begin + i <= integer'(cyc5); + end endmodule