Tests: Fix coverage holes from t_dist_docs_options

This commit is contained in:
Wilson Snyder 2025-10-27 19:16:53 -04:00
parent 1a1862352a
commit f9adc3461d
21 changed files with 102 additions and 18 deletions

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@ -934,6 +934,7 @@ class ConstVisitor final : public VNVisitor {
const AstNode* m_scopep = nullptr; // Current scope
const AstAttrOf* m_attrp = nullptr; // Current attribute
VDouble0 m_statBitOpReduction; // Ops reduced in ConstBitOpTreeVisitor
VDouble0 m_statConcatMerge; // Concat merges
VDouble0 m_statCondExprRedundant; // Conditional repeated expressions
VDouble0 m_statIfCondExprRedundant; // Conditional repeated expressions
const bool m_globalPass; // ConstVisitor invoked as a global pass
@ -1625,9 +1626,9 @@ class ConstVisitor final : public VNVisitor {
return (rend == lstart->toSInt());
}
bool ifMergeAdjacent(const AstNodeExpr* lhsp, const AstNodeExpr* rhsp) {
// called by concatmergeable to determine if {lhsp, rhsp} make sense
// Called by concatmergeable to determine if {lhsp, rhsp} make sense
if (!v3Global.opt.fAssemble()) return false; // opt disabled
// two same varref
// Two same varref
if (operandsSame(lhsp, rhsp)) return true;
const AstSel* const lselp = VN_CAST(lhsp, Sel);
const AstSel* const rselp = VN_CAST(rhsp, Sel);
@ -1660,7 +1661,7 @@ class ConstVisitor final : public VNVisitor {
return false;
}
bool concatMergeable(const AstNodeExpr* lhsp, const AstNodeExpr* rhsp, unsigned depth) {
// determine if {a OP b, c OP d} => {a, c} OP {b, d} is advantageous
// Determine if {a OP b, c OP d} => {a, c} OP {b, d} is advantageous
if (!v3Global.opt.fAssemble()) return false; // opt disabled
if (lhsp->type() != rhsp->type()) return false;
if (!ifConcatMergeableBiop(lhsp)) return false;
@ -1967,6 +1968,7 @@ class ConstVisitor final : public VNVisitor {
VL_DO_DANGLING(pushDeletep(lrp), lrp);
lp->dtypeChgWidthSigned(newlp->width(), newlp->width(), VSigning::UNSIGNED);
UINFO(5, "merged " << nodep);
++m_statConcatMerge;
VL_DO_DANGLING(pushDeletep(rp->unlinkFrBack()), rp);
nodep->replaceWithKeepDType(lp->unlinkFrBack());
VL_DO_DANGLING(pushDeletep(nodep), nodep);
@ -4135,6 +4137,7 @@ public:
V3Stats::addStatSum("Optimizations, Cond redundant expressions", m_statCondExprRedundant);
V3Stats::addStatSum("Optimizations, If cond redundant expressions",
m_statIfCondExprRedundant);
V3Stats::addStatSum("Optimizations, Concat merges", m_statConcatMerge);
}
AstNode* mainAcceptEdit(AstNode* nodep) {

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@ -0,0 +1,19 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('vlt_all')
test.top_filename = 't/t_alw_reorder.v'
test.compile(verilator_flags2=["--stats", "-fno-acyc-simp"])
test.execute()
test.passes()

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@ -13,13 +13,14 @@ test.scenarios('simulator')
test.compile(verilator_flags2=["--stats"])
if test.vlt:
test.file_grep(test.stats, r'Optimizations, Tables created\s+(\d+)', 10)
test.file_grep(test.stats, r'Optimizations, Combined CFuncs\s+(\d+)', 8)
elif test.vltmt:
test.file_grep(test.stats, r'Optimizations, Tables created\s+(\d+)', 10)
test.file_grep(test.stats, r'Optimizations, Combined CFuncs\s+(\d+)', 9)
test.execute()
if test.vlt:
test.file_grep(test.stats, r'Optimizations, Cases parallelized\s+(\d+)', 11)
test.file_grep(test.stats, r'Optimizations, Combined CFuncs\s+(\d+)', 8)
test.file_grep(test.stats, r'Optimizations, Tables created\s+(\d+)', 10)
elif test.vltmt:
test.file_grep(test.stats, r'Optimizations, Combined CFuncs\s+(\d+)', 9)
test.file_grep(test.stats, r'Optimizations, Tables created\s+(\d+)', 10)
test.passes()

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@ -0,0 +1,21 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator_st')
test.top_filename = 't/t_case_huge.v'
test.compile(verilator_flags2=["--stats -fno-case"])
test.execute()
test.file_grep(test.stats, r'Optimizations, Cases parallelized\s+(\d+)', 0)
test.passes()

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@ -29,14 +29,9 @@ Test_Waivers = [
'-gdb', # Covered: no way to test, part of --gdbbt
'-rr', # Not testing; not requiring rr installation
# Need testing:
'-facyc-simp', # Need test of -fno-...
'-fassemble', # Need test of -fno-...
'-fcase', # Need test of -fno-...
'-fconst', # Need test of -fno-...
'-fconst', # TODO breaks due to some needed V3Const steps
'-fdfg-peephole', # Need test of -fno-...
'-fdfg-peephole-', # Need test of -fno-...
'-fmerge-cond', # Need test of -fno-...
'-fsubst-const', # Need test of -fno-...
]
Sums = {}

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@ -17,5 +17,6 @@ test.execute()
if test.vlt_all:
test.file_grep(test.stats, r'Optimizations, Gate assign merged\s+(\d+)', 28)
test.file_grep(test.stats, r'Optimizations, Concat merges\s+(\d+)', 42)
test.passes()

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@ -0,0 +1,19 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator_st')
test.top_filename = "t/t_opt_life.v"
test.compile(verilator_flags2=['--stats', '-fno-assemble'])
test.file_grep_not(test.stats, r'Optimizations, Concat merges\s+(\d+)')
test.passes()

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@ -0,0 +1,25 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('vlt_all')
test.top_filename = "t/t_opt_merge_cond.v"
test.compile(verilator_flags2=["-unroll-count 64", "--stats", "-fno-merge-cond"])
test.execute()
if test.vlt:
# Note, with vltmt this might be split differently, so only checking vlt
test.file_grep_not(test.stats, r'Optimizations, MergeCond merges\s+(\d+)')
test.file_grep_not(test.stats, r'Optimizations, MergeCond merged items\s+(\d+)')
test.file_grep_not(test.stats, r'Optimizations, MergeCond longest merge\s+(\d+)')
test.passes()

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@ -10,7 +10,7 @@
import vltest_bootstrap
test.scenarios('vlt_all')
test.top_filename = "t/t_merge_cond.v"
test.top_filename = "t/t_opt_merge_cond.v"
test.compile(verilator_flags2=["-unroll-count 64", "--stats", "-fno-merge-cond-motion"])

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@ -12,7 +12,7 @@ import vltest_bootstrap
test.scenarios('simulator_st')
test.top_filename = "t/t_opt_life.v"
test.compile(verilator_flags2=['--stats', '-fno-subst'])
test.compile(verilator_flags2=['--stats', '-fno-subst', '-fno-subst-const'])
if test.vlt_all:
test.file_grep_not(test.stats, r'Optimizations, Substituted temps\s+(\d+)')