Add AssertOn check for assert

Insert the check AssertOn to allow disabling of asserts.
Asserts can be disabled by not using the `--assert` flag or by calling
`AssertOn(false)`, or passing the "+verilator+noassert" runtime flag.
Add tests for this behavior.
Bad tests check that the assert still causes a stop.
Non bad tests check that asserts are properly disabled and cause no stop
of the simulation.

Fixes #2162.

Signed-off-by: Tobias Wölfel <tobias.woelfel@mailbox.org>
This commit is contained in:
Tobias Wölfel 2020-02-14 08:01:20 +01:00
parent a3a3def400
commit f11b61eb48
7 changed files with 109 additions and 1 deletions

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@ -5,6 +5,7 @@ The contributors that suggested a given feature are shown in []. Thanks!
* Verilator 4.029 devel
*** Add assertOn check for assert. [Tobias Wölfel]
*** Add +verilator+noassert flag to disable assert checking. [Tobias Wölfel]
* Verilator 4.028 2020-02-08

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@ -150,7 +150,7 @@ private:
// It's more LIKELY that we'll take the NULL if clause
// than the sim-killing else clause:
ifp->branchPred(VBranchPred::BP_LIKELY);
bodysp = ifp;
bodysp = newIfAssertOn(ifp);
} else {
nodep->v3fatalSrc("Unknown node type");
}

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@ -0,0 +1,19 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
top_filename("t/t_assert_on.v");
compile();
execute();
ok(1);
1;

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@ -0,0 +1,24 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
top_filename("t/t_assert_on.v");
compile(
verilator_flags2 => ['--assert'],
nc_flags2 => ['+assert'],
);
execute(
fails => 1,
);
ok(1);
1;

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@ -0,0 +1,23 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(vlt => 1);
top_filename("t/t_assert_on.v");
compile(
verilator_flags2 => ["--assert"],
);
execute(
all_run_flags => ["+verilator+noassert"],
);
ok(1);
1;

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@ -0,0 +1,23 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(vlt => 1);
top_filename("t/t_assert_on.v");
compile(
verilator_flags2 => ["--assert"],
);
execute(
fails => 1,
);
ok(1);
1;

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@ -0,0 +1,18 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2007 by Wilson Snyder.
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
always @ (posedge clk) begin
assert (0);
$finish;
end
endmodule