diff --git a/Changes b/Changes index 39f842f77..cf3e97ac0 100644 --- a/Changes +++ b/Changes @@ -5,6 +5,7 @@ The contributors that suggested a given feature are shown in []. Thanks! * Verilator 4.029 devel +*** Add assertOn check for assert. [Tobias Wölfel] *** Add +verilator+noassert flag to disable assert checking. [Tobias Wölfel] * Verilator 4.028 2020-02-08 diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp index 6e593c339..ffd983921 100644 --- a/src/V3Assert.cpp +++ b/src/V3Assert.cpp @@ -150,7 +150,7 @@ private: // It's more LIKELY that we'll take the NULL if clause // than the sim-killing else clause: ifp->branchPred(VBranchPred::BP_LIKELY); - bodysp = ifp; + bodysp = newIfAssertOn(ifp); } else { nodep->v3fatalSrc("Unknown node type"); } diff --git a/test_regress/t/t_assert_disabled.pl b/test_regress/t/t_assert_disabled.pl new file mode 100755 index 000000000..ce40c03ef --- /dev/null +++ b/test_regress/t/t_assert_disabled.pl @@ -0,0 +1,19 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_assert_on.v"); + +compile(); + +execute(); + +ok(1); +1; diff --git a/test_regress/t/t_assert_enabled_bad.pl b/test_regress/t/t_assert_enabled_bad.pl new file mode 100755 index 000000000..e97edee06 --- /dev/null +++ b/test_regress/t/t_assert_enabled_bad.pl @@ -0,0 +1,24 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_assert_on.v"); + +compile( + verilator_flags2 => ['--assert'], + nc_flags2 => ['+assert'], + ); + +execute( + fails => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_assert_enabled_off.pl b/test_regress/t/t_assert_enabled_off.pl new file mode 100755 index 000000000..68476d21b --- /dev/null +++ b/test_regress/t/t_assert_enabled_off.pl @@ -0,0 +1,23 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +top_filename("t/t_assert_on.v"); + +compile( + verilator_flags2 => ["--assert"], + ); + +execute( + all_run_flags => ["+verilator+noassert"], +); + +ok(1); +1; diff --git a/test_regress/t/t_assert_enabled_on_bad.pl b/test_regress/t/t_assert_enabled_on_bad.pl new file mode 100755 index 000000000..b93de98fc --- /dev/null +++ b/test_regress/t/t_assert_enabled_on_bad.pl @@ -0,0 +1,23 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +top_filename("t/t_assert_on.v"); + +compile( + verilator_flags2 => ["--assert"], + ); + +execute( + fails => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_assert_on.v b/test_regress/t/t_assert_on.v new file mode 100644 index 000000000..c6ae564e6 --- /dev/null +++ b/test_regress/t/t_assert_on.v @@ -0,0 +1,18 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2007 by Wilson Snyder. + +module t (/*AUTOARG*/ + // Inputs + clk + ); + + input clk; + + always @ (posedge clk) begin + assert (0); + $finish; + end + +endmodule