Improve class extends error format

This commit is contained in:
Wilson Snyder 2025-11-16 21:00:13 -05:00
parent 84173048d2
commit e61012e30d
9 changed files with 105 additions and 44 deletions

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@ -4769,7 +4769,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
} else {
nodep->v3warn(E_UNSUPPORTED,
"Unsupported: " << foundp->nodep()->prettyTypeName()
<< " in AstClassExtends");
<< " in 'class extends'");
return;
}
} else {

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@ -0,0 +1,5 @@
%Error-UNSUPPORTED: t/t_class_extends_alias.v:24:21: Unsupported: TYPEDEF 'foo_t' in 'class extends'
24 | class bar extends foo_t;
| ^~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

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@ -0,0 +1,40 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2023 by Antmicro Ltd.
// SPDX-License-Identifier: CC0-1.0
package pkg;
endpackage
module t;
class foo;
int x = 1;
function int get_x;
return x;
endfunction
function int get_3;
return 3;
endfunction
endclass
typedef foo foo_t;
class bar extends foo_t;
endclass
bar bar_foo_t_i;
initial begin
bar_foo_t_i = new;
if (bar_foo_t_i.get_x() == 1 && bar_foo_t_i.get_3() == 3) begin
$write("*-* All Finished *-*\n");
$finish;
end
else begin
$stop;
end
end
endmodule

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@ -1,5 +0,0 @@
%Error-UNSUPPORTED: t/t_class_extends_alias_unsup.v:22:22: Unsupported: TYPEDEF 'foo_t' in AstClassExtends
22 | class bar extends foo_t;
| ^~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

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@ -1,38 +0,0 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2023 by Antmicro Ltd.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/
);
class foo;
int x = 1;
function int get_x;
return x;
endfunction
function int get_3;
return 3;
endfunction
endclass
typedef foo foo_t;
class bar extends foo_t;
endclass
bar bar_foo_t_i;
initial begin
bar_foo_t_i = new;
if (bar_foo_t_i.get_x() == 1 && bar_foo_t_i.get_3() == 3) begin
$write("*-* All Finished *-*\n");
$finish;
end
else begin
$stop;
end
end
endmodule

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@ -0,0 +1,5 @@
%Error-UNSUPPORTED: t/t_class_extends_pkg_bad.v:22:21: Unsupported: PACKAGE 'pkg' in 'class extends'
22 | class bar extends pkg;
| ^~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

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@ -0,0 +1,16 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('linter')
test.lint(fails=True, expect_filename=test.golden_filename)
test.passes()

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@ -0,0 +1,38 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2023 by Antmicro Ltd.
// SPDX-License-Identifier: CC0-1.0
package pkg;
endpackage
module t;
class foo;
int x = 1;
function int get_x;
return x;
endfunction
function int get_3;
return 3;
endfunction
endclass
class bar extends pkg;
endclass
bar bar_foo_t_i;
initial begin
bar_foo_t_i = new;
if (bar_foo_t_i.get_x() == 1 && bar_foo_t_i.get_3() == 3) begin
$write("*-* All Finished *-*\n");
$finish;
end
else begin
$stop;
end
end
endmodule