mirror of
https://github.com/verilator/verilator.git
synced 2026-10-06 18:13:50 +02:00
Internals: More const. No functional change intended.
This commit is contained in:
+27
-25
@@ -166,7 +166,7 @@ public:
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class GateLogicVertex final : public GateEitherVertex {
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AstNode* const m_nodep;
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AstActive* const m_activep; // Under what active; nullptr is ok (under cfunc or such)
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bool m_slow; // In slow block
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const bool m_slow; // In slow block
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public:
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GateLogicVertex(V3Graph* graphp, AstScope* scopep, AstNode* nodep, AstActive* activep,
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bool slow)
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@@ -200,7 +200,8 @@ private:
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AstNode* m_substTreep = nullptr; // What to replace the variable with
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// STATE
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bool m_buffersOnly; // Set when we only allow simple buffering, no equations (for clocks)
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AstNodeVarRef* m_lhsVarRef = nullptr; // VarRef on lhs of assignment (what we're replacing)
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const AstNodeVarRef* m_lhsVarRef
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= nullptr; // VarRef on lhs of assignment (what we're replacing)
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bool m_dedupe; // Set when we use isGateDedupable instead of isGateOptimizable
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int m_ops = 0; // Operation count
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@@ -315,7 +316,7 @@ private:
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V3Graph m_graph; // Scoreboard of var usages/dependencies
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GateLogicVertex* m_logicVertexp = nullptr; // Current statement being tracked, nullptr=ignored
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AstScope* m_scopep = nullptr; // Current scope being processed
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AstNodeModule* m_modp = nullptr; // Current module
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const AstNodeModule* m_modp = nullptr; // Current module
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AstActive* m_activep = nullptr; // Current active
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bool m_activeReducible = true; // Is activation block reducible?
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bool m_inSenItem = false; // Underneath AstSenItem; any varrefs are clocks
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@@ -568,7 +569,7 @@ void GateVisitor::optimizeSignals(bool allowMultiIn) {
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AstNode* logicp = logicVertexp->nodep();
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if (logicVertexp->reducible()) {
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// Can we eliminate?
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GateOkVisitor okVisitor{logicp, vvertexp->isClock(), false};
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const GateOkVisitor okVisitor{logicp, vvertexp->isClock(), false};
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const bool multiInputs = okVisitor.rhsVarRefs().size() > 1;
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// Was it ok?
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bool doit = okVisitor.isSimple();
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@@ -651,7 +652,7 @@ void GateVisitor::optimizeSignals(bool allowMultiIn) {
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}
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if (removedAllUsages) {
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// Remove input links
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while (V3GraphEdge* edgep = vvertexp->inBeginp()) {
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while (V3GraphEdge* const edgep = vvertexp->inBeginp()) {
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VL_DO_DANGLING(edgep->unlinkDelete(), edgep);
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}
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// Clone tree so we remember it for tracing, and keep the pointer
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@@ -825,7 +826,7 @@ class GateElimVisitor final : public GateBaseVisitor {
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private:
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// NODE STATE
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// STATE
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AstVarScope* m_elimVarScp; // Variable being eliminated
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const AstVarScope* m_elimVarScp; // Variable being eliminated
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AstNode* m_replaceTreep; // What to replace the variable with
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bool m_didReplace; // Did we do any replacements
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GateDedupeVarVisitor* m_varVisp; // Callback to keep hash up to date
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@@ -881,7 +882,7 @@ public:
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void GateVisitor::optimizeElimVar(AstVarScope* varscp, AstNode* substp, AstNode* consumerp) {
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if (debug() >= 5) consumerp->dumpTree(cout, " elimUsePre: ");
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GateElimVisitor elimVisitor{consumerp, varscp, substp, nullptr};
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const GateElimVisitor elimVisitor{consumerp, varscp, substp, nullptr};
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if (elimVisitor.didReplace()) {
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if (debug() >= 9) consumerp->dumpTree(cout, " elimUseCns: ");
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// Caution: Can't let V3Const change our handle to consumerp, such as by
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@@ -978,7 +979,8 @@ public:
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&& node1p->user2p()->type() == node2p->user2p()->type();
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}
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AstNodeAssign* hashAndFindDupe(AstNodeAssign* assignp, AstNode* extra1p, AstNode* extra2p) {
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const AstNodeAssign* hashAndFindDupe(AstNodeAssign* assignp, AstNode* extra1p,
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AstNode* extra2p) {
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// Legal for extra1p/2p to be nullptr, we'll compare with other assigns with extras also
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// nullptr
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AstNode* const rhsp = assignp->rhsp();
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@@ -1094,7 +1096,7 @@ public:
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m_dedupable = true;
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iterate(nodep);
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if (m_dedupable && m_assignp) {
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AstNode* const lhsp = m_assignp->lhsp();
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const AstNode* const lhsp = m_assignp->lhsp();
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// Possible todo, handle more complex lhs expressions
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if (const AstNodeVarRef* const lhsVarRefp = VN_CAST(lhsp, NodeVarRef)) {
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UASSERT_OBJ(lhsVarRefp->varScopep() == consumerVarScopep, consumerVarScopep,
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@@ -1141,12 +1143,12 @@ private:
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AstNodeVarRef* const dupVarRefp = static_cast<AstNodeVarRef*>(
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vvertexp->iterateInEdges(*this, VNUser(vvertexp)).toNodep());
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if (dupVarRefp) { // visit(GateLogicVertex*...) returned match
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V3GraphEdge* edgep = vvertexp->inBeginp();
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const V3GraphEdge* edgep = vvertexp->inBeginp();
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GateLogicVertex* const lvertexp = static_cast<GateLogicVertex*>(edgep->fromp());
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UASSERT_OBJ(vvertexp->dedupable(), vvertexp->varScp(),
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"GateLogicVertex* visit should have returned nullptr "
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"if consumer var vertex is not dedupable.");
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GateOkVisitor okVisitor{lvertexp->nodep(), false, true};
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const GateOkVisitor okVisitor{lvertexp->nodep(), false, true};
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if (okVisitor.isSimple()) {
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const AstVarScope* const dupVarScopep = dupVarRefp->varScopep();
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GateVarVertex* const dupVvertexp
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@@ -1169,15 +1171,15 @@ private:
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if (lvertexp == consumeVertexp) {
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UINFO(9, "skipping as self-recirculates\n");
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} else {
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GateElimVisitor elimVisitor(consumerp, vvertexp->varScp(), dupVarRefp,
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&m_varVisitor);
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const GateElimVisitor elimVisitor(consumerp, vvertexp->varScp(),
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dupVarRefp, &m_varVisitor);
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}
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outedgep = outedgep->relinkFromp(dupVvertexp);
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}
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// Propagate attributes
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dupVvertexp->propagateAttrClocksFrom(vvertexp);
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// Remove inputs links
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while (V3GraphEdge* inedgep = vvertexp->inBeginp()) {
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while (V3GraphEdge* const inedgep = vvertexp->inBeginp()) {
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VL_DO_DANGLING(inedgep->unlinkDelete(), inedgep);
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}
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// replaceAssigns() does the deleteTree on lvertexNodep in a later step
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@@ -1252,7 +1254,7 @@ class GateMergeAssignsGraphVisitor final : public GateGraphBaseVisitor {
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private:
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// NODE STATE
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AstNodeAssign* m_assignp = nullptr;
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AstActive* m_activep = nullptr;
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const AstActive* m_activep = nullptr;
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GateLogicVertex* m_logicvp = nullptr;
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VDouble0 m_numMergedAssigns; // Statistic tracking
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@@ -1382,7 +1384,7 @@ void GateVisitor::mergeAssigns() {
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class GateConcatVisitor final : public GateBaseVisitor {
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private:
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// STATE
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AstVarScope* m_vscp = nullptr; // Varscope we're trying to find
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const AstVarScope* m_vscp = nullptr; // Varscope we're trying to find
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int m_offset = 0; // Current offset of varscope
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int m_found_offset = 0; // Found offset of varscope
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bool m_found = false; // Offset found
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@@ -1432,7 +1434,7 @@ public:
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class GateClkDecompState final {
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public:
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int m_offset;
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const int m_offset;
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AstVarScope* const m_last_vsp;
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GateClkDecompState(int offset, AstVarScope* vsp)
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: m_offset{offset}
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@@ -1460,7 +1462,7 @@ private:
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m_seen_clk_vectors++;
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m_total_seen_clk_vectors++;
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}
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GateClkDecompState* const currState = reinterpret_cast<GateClkDecompState*>(vu.c());
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const GateClkDecompState* const currState = reinterpret_cast<GateClkDecompState*>(vu.c());
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GateClkDecompState nextState(currState->m_offset, vsp);
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vvertexp->iterateCurrentOutEdges(*this, VNUser(&nextState));
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if (vsp->varp()->width() > 1) --m_seen_clk_vectors;
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@@ -1469,13 +1471,13 @@ private:
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}
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virtual VNUser visit(GateLogicVertex* lvertexp, VNUser vu) override {
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GateClkDecompState* const currState = reinterpret_cast<GateClkDecompState*>(vu.c());
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const GateClkDecompState* const currState = reinterpret_cast<GateClkDecompState*>(vu.c());
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int clk_offset = currState->m_offset;
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if (const AstAssignW* const assignp = VN_CAST(lvertexp->nodep(), AssignW)) {
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UINFO(9, "CLK DECOMP Logic (off = " << clk_offset << ") - " << lvertexp << " : "
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<< m_clk_vsp << endl);
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// RHS
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if (AstSel* const rselp = VN_CAST(assignp->rhsp(), Sel)) {
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if (const AstSel* const rselp = VN_CAST(assignp->rhsp(), Sel)) {
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if (VN_IS(rselp->lsbp(), Const) && VN_IS(rselp->widthp(), Const)) {
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if (clk_offset < rselp->lsbConst() || clk_offset > rselp->msbConst()) {
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UINFO(9, "CLK DECOMP Sel [ " << rselp->msbConst() << " : "
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@@ -1487,7 +1489,7 @@ private:
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} else {
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return VNUser(0);
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}
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} else if (AstConcat* catp = VN_CAST(assignp->rhsp(), Concat)) {
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} else if (AstConcat* const catp = VN_CAST(assignp->rhsp(), Concat)) {
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UINFO(9, "CLK DECOMP Concat searching - " << assignp->lhsp() << endl);
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int concat_offset;
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if (!m_concat_visitor.concatOffset(catp, currState->m_last_vsp,
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@@ -1507,7 +1509,7 @@ private:
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} else {
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return VNUser(0);
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}
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} else if (const AstVarRef* vrp = VN_CAST(assignp->lhsp(), VarRef)) {
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} else if (const AstVarRef* const vrp = VN_CAST(assignp->lhsp(), VarRef)) {
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if (vrp->dtypep()->width() == 1 && m_seen_clk_vectors) {
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if (clk_offset != 0) {
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UINFO(9, "Should only make it here with clk_offset = 0" << endl);
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@@ -1517,7 +1519,7 @@ private:
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UINFO(9, " to - " << m_clk_vsp << endl);
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AstNode* const rhsp = assignp->rhsp();
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rhsp->replaceWith(new AstVarRef(rhsp->fileline(), m_clk_vsp, VAccess::READ));
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while (V3GraphEdge* edgep = lvertexp->inBeginp()) {
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while (V3GraphEdge* const edgep = lvertexp->inBeginp()) {
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VL_DO_DANGLING(edgep->unlinkDelete(), edgep);
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}
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new V3GraphEdge(m_graphp, m_clk_vvertexp, lvertexp, 1);
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@@ -1556,7 +1558,7 @@ void GateVisitor::decomposeClkVectors() {
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GateClkDecompGraphVisitor decomposer{&m_graph};
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for (V3GraphVertex* itp = m_graph.verticesBeginp(); itp; itp = itp->verticesNextp()) {
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if (GateVarVertex* const vertp = dynamic_cast<GateVarVertex*>(itp)) {
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AstVarScope* const vsp = vertp->varScp();
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const AstVarScope* const vsp = vertp->varScp();
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if (vsp->varp()->attrClocker() == VVarAttrClocker::CLOCKER_YES) {
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if (vsp->varp()->width() > 1) {
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UINFO(9, "Clocker > 1 bit, not decomposing: " << vsp << endl);
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@@ -1601,7 +1603,7 @@ public:
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void V3Gate::gateAll(AstNetlist* nodep) {
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UINFO(2, __FUNCTION__ << ": " << endl);
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{
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GateVisitor visitor{nodep};
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const GateVisitor visitor{nodep};
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GateDeassignVisitor{nodep};
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} // Destruct before checking
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V3Global::dumpCheckGlobalTree("gate", 0, v3Global.opt.dumpTreeLevel(__FILE__) >= 3);
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