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https://github.com/verilator/verilator.git
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Internals: More const. No functional change intended.
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+7
-7
@@ -50,8 +50,8 @@ public:
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enum VertexType : uint8_t { VT_BLOCK, VT_BRANCH, VT_OUTPUT };
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private:
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string m_name; // Only used for .dot file generation
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VertexType m_type; // Vertex type (BLOCK/BRANCH/OUTPUT)
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const string m_name; // Only used for .dot file generation
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const VertexType m_type; // Vertex type (BLOCK/BRANCH/OUTPUT)
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string typestr() const { // "
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switch (m_type) {
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@@ -342,8 +342,8 @@ public:
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private:
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const CheckType m_check; // Combo logic or other
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AstNode* const m_alwaysp; // Always we're under
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AstNode* m_assignp = nullptr; // In assign
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const AstNode* const m_alwaysp; // Always we're under
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const AstNode* m_assignp = nullptr; // In assign
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// VISITORS
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virtual void visit(AstAssignDly* nodep) override {
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if (m_check != CT_SEQ) {
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@@ -438,7 +438,7 @@ private:
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virtual void visit(AstInitial* nodep) override {
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// Relink to IACTIVE, unless already under it
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UINFO(4, " INITIAL " << nodep << endl);
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ActiveDlyVisitor dlyvisitor{nodep, ActiveDlyVisitor::CT_INITIAL};
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const ActiveDlyVisitor dlyvisitor{nodep, ActiveDlyVisitor::CT_INITIAL};
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AstActive* const wantactivep = m_namer.getIActive(nodep->fileline());
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nodep->unlinkFrBack();
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wantactivep->addStmtsp(nodep);
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@@ -471,7 +471,7 @@ private:
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VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
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return;
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}
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ActiveDlyVisitor dlyvisitor{nodep, ActiveDlyVisitor::CT_INITIAL};
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const ActiveDlyVisitor dlyvisitor{nodep, ActiveDlyVisitor::CT_INITIAL};
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if (!m_scopeFinalp) {
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m_scopeFinalp = new AstCFunc(
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nodep->fileline(), "_final_" + m_namer.scopep()->nameDotless(), m_namer.scopep());
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@@ -540,7 +540,7 @@ private:
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// Warn and/or convert any delayed assignments
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if (combo && !sequent) {
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ActiveLatchCheckVisitor latchvisitor{nodep, kwd};
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const ActiveLatchCheckVisitor latchvisitor{nodep, kwd};
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if (kwd == VAlwaysKwd::ALWAYS_LATCH) {
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ActiveDlyVisitor{nodep, ActiveDlyVisitor::CT_LATCH};
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} else {
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