From c6a569df4959799ca7e113b61a5ebf0e833ac12d Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 28 Feb 2023 18:38:52 -0500 Subject: [PATCH] Commentary --- test_regress/t/t_incr_void.v | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/test_regress/t/t_incr_void.v b/test_regress/t/t_incr_void.v index eebf410aa..75284fcd7 100644 --- a/test_regress/t/t_incr_void.v +++ b/test_regress/t/t_incr_void.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2023 by Drew Ranck. +// SPDX-License-Identifier: CC0-1.0 + module t (/*AUTOARG*/ // Inputs