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Verilog format

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Veripool API Bot 2026-02-24 21:03:32 -05:00 committed by Wilson Snyder
parent 10eafb9b3f
commit c28200c53a
4 changed files with 27 additions and 27 deletions
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test_regress/t/t_concat_large_bad.out
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%Warning-WIDTHCONCAT: t/t_concat_large_bad.v:10:23: Replication of more that --replication-limit 8192 is suspect: 32768 %Warning-WIDTHCONCAT: t/t_concat_large_bad.v:10:22: Replication of more that --replication-limit 8192 is suspect: 32768
: ... note: In instance 't' : ... note: In instance 't'
10 | wire [32767:0] b = '0; 10 | wire [32767:0] b = '0;
| ^~ | ^~
... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=latest ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=latest
... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message. ... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message.
%Warning-WIDTHCONCAT: t/t_concat_large_bad.v:9:29: Replication of more that --replication-limit 8192 is suspect: 32768 %Warning-WIDTHCONCAT: t/t_concat_large_bad.v:9:28: Replication of more that --replication-limit 8192 is suspect: 32768
: ... note: In instance 't' : ... note: In instance 't'
9 | wire [32767:0] a = {32768{1'b1}}; 9 | wire [32767:0] a = {32768{1'b1}};
| ^ | ^