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Merge branch 'master' into split_var0

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Yutetsu TAKATSUKASA 2020-01-15 08:45:49 +09:00 committed by GitHub
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6
.clang-format
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@ -90,10 +90,6 @@ PenaltyBreakString: 1000
PenaltyExcessCharacter: 1000000
PenaltyReturnTypeOnItsOwnLine: 60
PointerAlignment: Left
RawStringFormats:
- Delimiter: pb
Language: TextProto
BasedOnStyle: google
ReflowComments: true
SortIncludes: false
SortUsingDeclarations: true
@ -108,7 +104,7 @@ SpacesInContainerLiterals: true
SpacesInCStyleCastParentheses: false
SpacesInParentheses: false
SpacesInSquareBrackets: false
Standard: Cpp11
Standard: Cpp03
TabWidth: 8
UseTab: Never
...

1
.codacy.yml
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@ -1,4 +1,5 @@
---
exclude_paths:
- '.github/**'
- 'ci/build_verilator.sh'
- 'include/vltstd/**'

14
.github/ISSUE_TEMPLATE/bug_report.md vendored Normal file
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@ -0,0 +1,14 @@
---
name: Bug report
about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
title: ''
labels: new
assignees: ''
---
Thanks for taking the time to report this.
Can you attach an example that shows the issue? (Must be openly licensed, ideally in test_regress format.)
May we assist you in trying to fix this yourself?

16
.github/ISSUE_TEMPLATE/feature.md vendored Normal file
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@ -0,0 +1,16 @@
---
name: Feature Request
about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
title: ''
labels: new
assignees: ''
---
Thanks for taking the time to report this.
What would you like added/supported?
Can you attach an example that runs on other simulators? (Must be openly licensed, ideally in test_regress format.)
May we assist you in trying to fix this yourself?

10
.github/ISSUE_TEMPLATE/questions.md vendored Normal file
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@ -0,0 +1,10 @@
---
name: Q and A, or Other
about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
title: ''
labels: new
assignees: ''
---
How may we help - what is your question?

1
.github/PULL_REQUEST_TEMPLATE.md vendored Normal file
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@ -0,0 +1 @@
We appreciate your contributing to Verilator. If this is your first commit, please add your name to docs/CONTRIBUTORS, and read our contributing guidelines in docs/CONTRIBUTING.adoc.

5
.github/labels.toml vendored
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@ -103,6 +103,11 @@ color = "008672"
name = "help wanted"
description = "Extra attention is needed"
["new"]
color = "ff4400"
name = "new"
description = "New issue, not yet seen by maintainers"
["resolution: abandoned"]
color = "cfd3d7"
name = "resolution: abandoned"

1
.travis.yml
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@ -16,6 +16,7 @@ env:
- VERILATOR_ROOT=$PWD
- VERILATOR_NUM_JOBS=$(echo `nproc` + 1 | bc)
- VERILATOR_CONFIG_FLAGS="--enable-maintainer-mode --enable-longtests"
- VERILATOR_AUTHOR_SITE=1
- OBJCACHE=ccache
cache:

28
Changes
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@ -2,10 +2,26 @@ Revision history for Verilator
The contributors that suggested a given feature are shown in []. Thanks!
* Verilator 4.025 devel
* Verilator 4.027 devel
** Support attributes (public, isolate_assignments, etc.) in configuration files.
** Add -match to lint_off to waive warnings. [Philipp Wagner]
*** Support $readmem/$writemem with assoc arrarys. Closes #2100. [agrobman]
**** Add error on misused define. [Topa Tota]
* Verilator 4.026 2020-01-11
** Docker images are now available for Verilator releases.
*** Support bounded queues.
*** Support implication operator "|->" in assertions, #2069. [Peter Monsson]
*** Support string compare, ato*, etc methods, #1606. [Yutetsu TAKATSUKASA]
**** Support immediate cover statements.
@ -30,6 +46,14 @@ The contributors that suggested a given feature are shown in []. Thanks!
**** Fix huge case statement performance. Closes #1644. [Julien Margetts]
**** Fix tracing -1 index arrays. Closes #2090. [Yutetsu Takatsukasa]
**** Fix expand optimization slowing --lint-only. Closes #2091. [Thomas Watts]
**** Fix %{number}s with strings. #2093. [agrobman]
**** Fix shebang breaking some shells. Closes #2067. [zdave]
* Verilator 4.024 2019-12-08
@ -3455,7 +3479,7 @@ of input ports exists for tracing.
This uses outline mode in Emacs. See C-h m [M-x describe-mode].
Copyright 2001-2019 by Wilson Snyder. This program is free software; you
Copyright 2001-2020 by Wilson Snyder. This program is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License Version 3 or the Perl Artistic License
Version 2.0.

6
Makefile.in
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@ -7,7 +7,7 @@
#
#*****************************************************************************
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
@ -103,7 +103,7 @@ PACKAGE_VERSION = @PACKAGE_VERSION@
SHELL = /bin/sh
SUBDIRS = src test_regress \
SUBDIRS = docs src test_regress \
examples/cmake_hello_c \
examples/cmake_hello_sc \
examples/cmake_tracing_c \
@ -114,6 +114,7 @@ SUBDIRS = src test_regress \
examples/make_tracing_c \
examples/make_tracing_sc \
examples/make_protect_lib \
examples/xml_py \
INFOS = verilator.txt verilator.html verilator.pdf
@ -513,6 +514,7 @@ clean mostlyclean distclean maintainer-clean::
rm -f *.tex
rm -rf examples/*/obj_dir* examples/*/logs
rm -rf test_*/obj_dir
rm -rf nodist/fuzzer/dictionary
rm -rf nodist/obj_dir
distclean maintainer-clean::

8
README.adoc
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@ -4,7 +4,7 @@
ifdef::env-github[]
image:https://img.shields.io/badge/License-LGPL%20v3-blue.svg[license LGPLv3,link=https://www.gnu.org/licenses/lgpl-3.0]
image:https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg[license Artistic-2.0,link=https://opensource.org/licenses/Artistic-2.0]
image:https://api.codacy.com/project/badge/Grade/ff998fdaa6f64b9a95eb5f342ee6bf4d[Code Quality,link=https://www.codacy.com/manual/wsnyder/verilator]
image:https://api.codacy.com/project/badge/Grade/48478c986f13400682ffe4a5e0939b3a[Code Quality,link=https://www.codacy.com/gh/verilator/verilator]
image:https://travis-ci.com/verilator/verilator.svg?branch=master[Build Status (Travis CI),link=https://travis-ci.com/verilator/verilator]
endif::[]
@ -131,10 +131,10 @@ perhaps Icarus may.
== Open License
Verilator is Copyright 2003-2019 by Wilson Snyder. (Report bugs to
Verilator is Copyright 2003-2020 by Wilson Snyder. (Report bugs to
https://verilator.org/issues[Verilator Issues].)
Verilator is free software; you can redistribute it and/or modify it under
the terms of either the GNU Lesser General Public License Version 3 or the
Perl Artistic License Version 2.0. (See the documentation for more
details.)
Perl Artistic License Version 2.0. See the documentation for more
details.

215
bin/verilator
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@ -1,9 +1,7 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
#!/usr/bin/env perl
######################################################################
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
@ -1078,7 +1076,7 @@ and the remaining files can be compiled on parallel machines. Using
design --output-split 20000 resulted in splitting into approximately
one-minute-compile chunks.
Typically when using this, make with VM_PARALLEL_BUILD=1, and use
Typically when using this, make with VM_PARALLEL_BUILDS=1, and use
I<ccache>.
=item --output-split-cfuncs I<statements>
@ -2114,16 +2112,16 @@ specified, it will come from a default optionally specified at configure
time (before Verilator was compiled), or computed from
SYSTEMC/lib-SYSTEMC_ARCH.
=item VCS_HOME
If set, specifies the directory containing the Synopsys VCS distribution.
When set, a 'make test' in the Verilator distribution will also run VCS
baseline regression tests.
=item VERILATOR_BIN
If set, specifies an alternative name of the Verilator binary. May be used
for debugging and selecting between multiple operating system builds.
If set, specifies an alternative name of the C<verilator> binary. May be
used for debugging and selecting between multiple operating system builds.
=item VERILATOR_COVERAGE_BIN
If set, specifies an alternative name of the C<verilator_coverage binary>.
May be used for debugging and selecting between multiple operating system
builds.
=item VERILATOR_GDB
@ -2737,8 +2735,8 @@ controlled by configuration files, typically named with the .vlt
extension. An example:
`verilator_config
lint_off -msg WIDTH
lint_off -msg CASEX -file "silly_vendor_code.v"
lint_off -rule WIDTH
lint_off -rule CASEX -file "silly_vendor_code.v"
This disables WIDTH warnings globally, and CASEX for a specific file.
@ -2767,9 +2765,11 @@ Enable/disable coverage for the specified filename (or wildcard with '*' or
omitted). Often used to ignore an entire module for coverage analysis
purposes.
=item lint_on [-msg <message>] [-file "<filename>" [-lines <line> [ - <line>]]]
=item lint_on [-rule <message>] [-file "<filename>" [-lines <line> [ - <line>]]]
=item lint_off [-msg <message>] [-file "<filename>" [-lines <line> [ - <line>]]]
=item lint_off [-rule <message>] [-file "<filename>" [-lines <line> [ - <line>]]]
=item lint_off [-rule <message>] [-file "<filename>"] [-match "<string>"]
Enable/disables the specified lint warning, in the specified filename (or
wildcard with '*' or '?', or all files if omitted) and range of line
@ -2778,10 +2778,17 @@ numbers (or all lines if omitted).
With lint_off using '*' will override any lint_on directives in the source,
i.e. the warning will still not be printed.
If the -msg is omitted, all lint warnings (see list in -Wno-lint) are
If the -rule is omitted, all lint warnings (see list in -Wno-lint) are
enabled/disabled. This will override all later lint warning enables for
the specified region.
If -match is set the linter warnings are matched against this (wildcard)
string and are waived in case they match iff rule and file (with wildcard)
also match.
In previous versions -rule was named -msg. The latter is deprecated, but
still works with a deprecation info, it may be removed in future versions.
=item tracing_on [-file "<filename>" [-lines <line> [ - <line> ]]]
=item tracing_off [-file "<filename>" [-lines <line> [ - <line> ]]]
@ -2793,6 +2800,124 @@ and range of line numbers (or all lines if omitted).
For tracing_off, cells below any module in the files/ranges specified will
also not be traced.
=item clock_enable -module "<modulename>" -signal "<signame>"
Indicate the signal is used to gate a clock, and the user takes responsibility
for insuring there are no races related to it.
Same as /*verilator clock_enable*/, see L</"LANGUAGE EXTENSIONS"> for
more information and an example.
=item clocker -module "<modulename>" [-task "<taskname>"] -signal "<signame>"
=item clocker -module "<modulename>" [-function "<funcname>"] -signal "<signame>"
=item no_clocker -module "<modulename>" [-task "<taskname>"] -signal "<signame>"
=item no_clocker -module "<modulename>" [-function "<funcname>"] -signal "<signame>"
Indicate the signal is used as clock or not. This information is used by
Verilator to mark the signal as clocker and propagate the clocker attribute
automatically to derived signals. See C<--clk> for more information.
Same as /*verilator clocker*/, see L</"LANGUAGE EXTENSIONS"> for more
information.
=item coverage_block_off -module "<modulename>" -block "<blockname>"
=item coverage_block_off -file "<filename>" -line <lineno>
Specifies the entire begin/end block should be ignored for coverage
analysis purposes. Can either be specified as a named block or as a
filename and line number.
Same as /*verilator coverage_block_off*/, see L</"LANGUAGE
EXTENSIONS"> for more information.
=item full_case -file "<filename>" -lines <lineno>
=item parallel_case -file "<filename>" -lines <lineno>
Same as "//synopsys full_case" and "//synopsys parallel_case". When
these synthesis directives are discovered, Verilator will either
formally prove the directive to be true, or failing that, will insert
the appropriate code to detect failing cases at simulation runtime and
print an "Assertion failed" error message.
=item inline -module "<modulename>"
Specifies the module may be inlined into any modules that use this
module. This is useful to speed up simulation runtime with some small
loss of trace visibility and modularity. Note signals under inlined
submodules will be named I<submodule>__DOT__I<subsignal> as C++ does
not allow "." in signal names. When tracing such signals the tracing
routines will replace the __DOT__ with the period.
Same as /*verilator inline_module*/, see L</"LANGUAGE EXTENSIONS"> for
more information.
=item isolate_assignments -module "<modulename>" [-task "<taskname>"] -signal "<signame>"
=item isolate_assignments -module "<modulename>" [-function "<funcname>"] -signal "<signame>"
=item isolate_assignments -module "<modulename>" -function "<fname>"
Used to indicate the assignments to this signal in any blocks should be
isolated into new blocks. When there is a large combinatorial block that
is resulting in a UNOPTFLAT warning, attaching this to the signal causing
a false loop may clear up the problem.
Same as /* verilator isolate_assignments */, see L</"LANGUAGE
EXTENSIONS"> for more information.
=item no_inline -module "<modulename>"
Specifies the module should not be inlined into any modules that use
this module. This is useful especially at the top level module to
reduce the size of the interface class, to aid compile time at a small
performance loss.
Same as /*verilator no_inline_module*/, see L</"LANGUAGE EXTENSIONS">
for more information.
=item no_inline [-module "<modulename>"] -task "<taskname>"
=item no_inline [-module "<modulename>"] -function "<funcname>"
Specify the function or task should not be inlined into where it is
used. This may reduce the size of the final executable when a task is
used a very large number of times. For this flag to work, the task
and tasks below it must be pure; they cannot reference any variables
outside the task itself.
Same as /*verilator no_inline_task*/, see L</"LANGUAGE EXTENSIONS">
for more information.
=item sc_bv -module "<modulename>" [-task "<taskname>"] -signal "<signame>"
=item sc_bv -module "<modulename>" [-function "<funcname>"] -signal "<signame>"
Sets the port to be of sc_bv<I<width>> type, instead of bool, vluint32_t or
vluint64_t. This may be useful if the port width is parameterized and
different of such modules interface a templated module (such as a transactor)
or for other reasons. In general you should avoid using this attribute when
not necessary as with increasing usage of sc_bv the performance decreases
significantly.
Same as /*verilator sc_bv*/, see L</"LANGUAGE EXTENSIONS"> for more
information.
=item sformat [-module "<modulename>"] [-task "<taskname>"] -signal "<signame>"
=item sformat [-module "<modulename>"] [-function "<funcname>"] -signal "<signame>"
Final input of a function or task "input string" to indicate the
function or task should pass all remaining arguments through
$sformatf. This allows creation of DPI functions with $display like
behavior. See the test_regress/t/t_dpi_display.v file for an example.
Same as /*verilator sformat*/, see L</"LANGUAGE EXTENSIONS"> for more
information.
=back
@ -2928,7 +3053,8 @@ per the C standard (it's unspecified in Verilog).
Specifies the entire begin/end block should be ignored for coverage
analysis. Must be inside a basic block, e.g. within a begin/end pair.
Same as /* verilator coverage_block_off */.
Same as /* verilator coverage_block_off */ and C<coverage_block_off> in
L</"CONFIGURATION FILES">.
=item `systemc_header
@ -3020,6 +3146,9 @@ scheduling algorithm, sometimes required for correct clock behavior, and
always improving performance. It's also a good idea to enable the
IMPERFECTSCH warning, to insure all clock enables are properly recognized.
Same as C<clock_enable> in configuration files, see L</"CONFIGURATION
FILES"> for more information.
=item /*verilator clocker*/
=item /*verilator no_clocker*/
@ -3029,11 +3158,17 @@ not. This information is used by Verilator to mark the signal as clocker
and propagate the clocker attribute automatically to derived signals. See
C<--clk> for more information.
Same as C<clocker> and C<no_clocker> in configuration files, see
L</"CONFIGURATION FILES"> for more information.
=item /*verilator coverage_block_off*/
Specifies the entire begin/end block should be ignored for coverage
analysis purposes.
Same as C<coverage_block_off> in configuration files, see
L</"CONFIGURATION FILES"> for more information.
=item /*verilator coverage_off*/
Specifies that following lines of code should have coverage disabled.
@ -3054,6 +3189,9 @@ submodules will be named I<submodule>__DOT__I<subsignal> as C++ does not
allow "." in signal names. When tracing such signals the tracing routines
will replace the __DOT__ with the period.
Same as C<inline> in configuration files, see L</"CONFIGURATION FILES">
for more information.
=item /*verilator isolate_assignments*/
Used after a signal declaration to indicate the assignments to this signal
@ -3090,6 +3228,9 @@ It would then internally break it into (sort of):
end
end
Same as C<isolate_assignments> in configuration files, see
L</"CONFIGURATION FILES"> for more information.
=item /*verilator lint_off I<msg>*/
Disable the specified warning message for any warnings following the comment.
@ -3125,6 +3266,9 @@ modules that use this module. This is useful especially at the top level
module to reduce the size of the interface class, to aid compile time at a
small performance loss.
Same as C<no_inline> in configuration files, see L</"CONFIGURATION
FILES"> for more information.
=item /*verilator no_inline_task*/
Used in a function or task variable definition section to specify the
@ -3133,6 +3277,9 @@ reduce the size of the final executable when a task is used a very large
number of times. For this flag to work, the task and tasks below it must
be pure; they cannot reference any variables outside the task itself.
Same as C<no_inline> in configuration files, see L</"CONFIGURATION
FILES"> for more information.
=item /*verilator public*/ (parameter)
Used after a parameter declaration to indicate the emitted C code should
@ -3160,6 +3307,9 @@ Instead of using public variables, consider instead making a DPI or public
function that accesses the variable. This is nicer as it provides an
obvious entry point that is also compatible across simulators.
Same as C<public> in configuration files, see L</"CONFIGURATION FILES">
for more information.
=item /*verilator public*/ (task/function)
Used inside the declaration section of a function or task declaration to
@ -3182,6 +3332,9 @@ the model will NOT notice changes made to variables in these functions.
You may want to use DPI exports instead, as it's compatible with other
simulators.
Same as C<public> in configuration files, see L</"CONFIGURATION FILES">
for more information.
=item /*verilator public_flat*/ (variable)
Used after an input, output, register, or wire declaration to indicate the
@ -3190,11 +3343,17 @@ signal. This will not declare this module public, which means the name of
the signal or path to it may change based upon the module inlining which
takes place.
Same as C<public_flat> in configuration files, see L</"CONFIGURATION
FILES"> for more information.
=item /*verilator public_flat_rd*/ (variable)
Used after an input, output, register, or wire declaration to indicate the
signal should be declared public_flat (see above), but read-only.
Same as C<public_flat_rd> in configuration files, see L</"CONFIGURATION
FILES"> for more information.
=item /*verilator public_flat_rw @(<edge_list>) */ (variable)
Used after an input, output, register, or wire declaration to indicate the
@ -3203,6 +3362,9 @@ where writes should be considered to have the timing specified by the given
sensitivity edge list. Set for all variables, ports and wires using the
--public-flat-rw switch.
Same as C<public_flat_rw> in configuration files, see L</"CONFIGURATION
FILES"> for more information.
=item /*verilator public_module*/
Used after a module statement to indicate the module should not be inlined
@ -3211,9 +3373,12 @@ Verilator automatically sets this attribute when the module contains any
public signals or `systemc_ directives. Also set for all modules when
using the --public switch.
Same as C<public> in configuration files, see L</"CONFIGURATION FILES">
for more information.
=item /*verilator sc_clock*/
Rarely needed. Used after an input declaration to indicate the signal
Deprecated. Used after an input declaration to indicate the signal
should be declared in SystemC as a sc_clock instead of a bool. This was
needed in SystemC 1.1 and 1.2 only; versions 2.0 and later do not require
clock pins to be sc_clocks and this is no longer needed.
@ -3225,7 +3390,10 @@ type, instead of bool, vluint32_t or vluint64_t. This may be useful if
the port width is parameterized and different of such modules interface
a templated module (such as a transactor) or for other reasons. In general
you should avoid using this attribute when not necessary as with increasing
usage of sc_bv the performance increases significantly.
usage of sc_bv the performance decreases significantly.
Same as C<sc_bv> in configuration files, see L</"CONFIGURATION FILES">
for more information.
=item /*verilator sformat*/
@ -3234,6 +3402,9 @@ indicate the function or task should pass all remaining arguments through
$sformatf. This allows creation of DPI functions with $display like
behavior. See the test_regress/t/t_dpi_display.v file for an example.
Same as C<sformat> in configuration files, see L</"CONFIGURATION FILES">
for more information.
=item /*verilator split_var*/
Attached to a variable or a net declaration. It breaks the variable into
@ -5078,7 +5249,7 @@ remain anonymous.
The latest version is available from L<https://verilator.org>.
Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify the Verilator internals under the terms of
either the GNU Lesser General Public License Version 3 or the Perl Artistic
License Version 2.0.

8
bin/verilator_coverage
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@ -1,9 +1,7 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
#!/usr/bin/env perl
######################################################################
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
@ -271,7 +269,7 @@ Specifies a module search directory.
The latest version is available from L<https://verilator.org>.
Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify the Verilator internals under the terms of
either the GNU Lesser General Public License Version 3 or the Perl Artistic
License Version 2.0.

7
bin/verilator_difftree
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@ -1,10 +1,7 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use warnings;
use Getopt::Long;
use IO::File;
@ -236,7 +233,7 @@ Do not show differences in line numbering.
The latest version is available from L<https://verilator.org>.
Copyright 2005-2019 by Wilson Snyder. This package is free software; you can
Copyright 2005-2020 by Wilson Snyder. This package is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

8
bin/verilator_gantt
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@ -1,11 +1,9 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
use strict;
use warnings;
use strict;
use Getopt::Long;
use IO::File;
use Pod::Usage;
@ -540,7 +538,7 @@ verilator_gantt.vcd.
The latest version is available from L<https://verilator.org>.
Copyright 2018-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2018-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

6
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@ -1,9 +1,7 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
#!/usr/bin/env perl
# DESCRIPTION: Print include statements for each ARGV
#
# Copyright 2003-2019 by Wilson Snyder. This package is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This package is free software; you can
# redistribute it and/or modify it under the terms of either the GNU Lesser
# General Public License Version 3 or the Perl Artistic License Version 2.0.
######################################################################

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bin/verilator_profcfunc
View File

@ -1,6 +1,4 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
@ -230,7 +228,7 @@ Displays this message and program version and exits.
The latest version is available from L<https://verilator.org>.
Copyright 2007-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2007-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

8
ci/build_vcddiff.sh Normal file → Executable file
View File

@ -11,8 +11,8 @@ set -e
TMP_DIR=$(mktemp -d)
git -C ${TMP_DIR} clone https://github.com/veripool/vcddiff
git -C "${TMP_DIR}" clone https://github.com/veripool/vcddiff
VCDDIFF_DIR=${TMP_DIR}/vcddiff
git -C ${VCDDIFF_DIR} checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c
make -C ${VCDDIFF_DIR}
sudo cp ${VCDDIFF_DIR}/vcddiff /usr/local/bin
git -C "${VCDDIFF_DIR}" checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c
make -C "${VCDDIFF_DIR}"
sudo cp "${VCDDIFF_DIR}/vcddiff" /usr/local/bin

57
ci/docker/buildenv/Dockerfile Normal file
View File

@ -0,0 +1,57 @@
# DESCRIPTION: Dockerfile for env to build and fully test Verilator
#
# Copyright 2020 by Stefan Wallentowitz. This program is free
# software; you can redistribute it and/or modify it under the terms
# of either the GNU Lesser General Public License Version 3 or the
# Perl Artistic License Version 2.0.
FROM ubuntu:18.04
RUN apt-get update \
&& DEBIAN_FRONTEND=noninteractive \
apt-get install --no-install-recommends -y \
autoconf=2.69-11 \
bc=1.07.1-2 \
bison=2:3.0.4.dfsg-1build1 \
build-essential=12.4ubuntu1 \
ca-certificates=20180409 \
cmake=3.10.2-1ubuntu2.18.04.1 \
flex=2.6.4-6 \
gdb=8.1-0ubuntu3.2 \
gcc-6=6.5.0-2ubuntu1~18.04 \
gcc-5=5.5.0-12ubuntu1 \
gcc-4.8=4.8.5-4ubuntu8 \
git=1:2.17.1-1ubuntu0.5 \
gtkwave=3.3.86-1 \
g++-6=6.5.0-2ubuntu1~18.04 \
g++-5=5.5.0-12ubuntu1 \
g++-4.8=4.8.5-4ubuntu8 \
libfl2=2.6.4-6 \
libfl-dev=2.6.4-6 \
numactl=2.0.11-2.1ubuntu0.1 \
perl=5.26.1-6ubuntu0.3 \
python3=3.6.7-1~18.04 \
wget=1.19.4-1ubuntu2.2 \
zlibc=0.9k-4.3 \
zlib1g=1:1.2.11.dfsg-0ubuntu2 \
zlib1g-dev=1:1.2.11.dfsg-0ubuntu2 \
&& apt-get clean \
&& rm -rf /var/lib/apt/lists/*
WORKDIR /tmp
COPY build-systemc.sh /tmp/
RUN ./build-systemc.sh
RUN cpan install -fi Unix::Processors Parallel::Forker Bit::Vector
RUN git clone https://github.com/veripool/vcddiff.git && \
make -C vcddiff && \
cp -p vcddiff/vcddiff /usr/local/bin/vcddiff && \
rm -rf vcddiff
COPY build.sh /tmp/build.sh
ENV VERILATOR_AUTHOR_SITE=1
ENTRYPOINT [ "/tmp/build.sh" ]

50
ci/docker/buildenv/README.adoc Normal file
View File

@ -0,0 +1,50 @@
= Verilator Build Environment
This container is set up to compile and test a Verilator build based
on the following parameters:
* Source repository (default: https://github.com/verilator/verilator)
* Source revision (default: master)
* GCC version (4.8.5, 5.5.0, 6.5.0, 7.4.0, default: 7.4.0)
The container is published as `verilator/verilator-buildenv` on
https://hub.docker.com/repository/docker/verilator/verilator-buildenv[docker hub].
To run the basic build of current master:
docker run -ti verilator/verilator-buildenv
To also run tests:
docker run -ti verilator/verilator-buildenv test
Change the compiler:
docker run -ti -e CC=gcc-4.8 -e CXX=g++-4.8 verilator/verilator-buildenv test
The tests that involve gdb are not working due to security restrictions.
To run those too:
....
docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` -e CC=gcc-4.8 -e CXX=g++-4.8 --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
....
You may want to avoid pushing your changes to a remote repository and
instead use a local working copy. You can mount the local working copy
path as a volume and use this as repo. Be careful, that it can only
use committed changes, so you may want to use a work-in-progress
commit or so. To build the current HEAD from top of a repository:
....
docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
....
== Under the Hood
To rebuild the image, simply run:
docker build .
It will build SystemC in all supported compiler variants to reduce the
impact on testing cycles. A build script will be the entrypoint to the
container that will perform a standard build and test procedure.

29
ci/docker/buildenv/build-systemc.sh Executable file
View File

@ -0,0 +1,29 @@
#!/bin/bash -e
# DESCRIPTION: Build SystemC in Ubuntu 18.04 with different g++/gcc
#
# Copyright 2020 by Stefan Wallentowitz. This program is free
# software; you can redistribute it and/or modify it under the terms
# of either the GNU Lesser General Public License Version 3 or the
# Perl Artistic License Version 2.0.
build_variant () {
version=$($1 --version | grep gcc | awk '{print $4}')
mkdir "/usr/local/systemc-2.3.3-gcc$version"
mkdir build
cd build
../configure --prefix="/usr/local/systemc-2.3.3-gcc$version" CC="$1" CXX="$2" LD="$2"
make -j
make install
cd ..
rm -r build
}
wget https://www.accellera.org/images/downloads/standards/systemc/systemc-2.3.3.tar.gz
tar -xzf systemc-2.3.3.tar.gz
cd systemc-2.3.3
build_variant gcc g++
build_variant gcc-6 g++-6
build_variant gcc-5 g++-5
build_variant gcc-4.8 g++-4.8
cd ..
rm -r systemc-2.3.3*

30
ci/docker/buildenv/build.sh Executable file
View File

@ -0,0 +1,30 @@
#!/bin/bash -e
# DESCRIPTION: Build Verilator (inside container)
#
# Copyright 2020 by Stefan Wallentowitz. This program is free
# software; you can redistribute it and/or modify it under the terms
# of either the GNU Lesser General Public License Version 3 or the
# Perl Artistic License Version 2.0.
: "${REPO:=https://github.com/verilator/verilator}"
: "${REV:=master}"
: "${CC:=gcc}"
: "${CXX:=g++}"
GCCVERSION=$(${CC} --version | grep gcc | awk '{print $4}')
export SYSTEMC_INCLUDE="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/include"
export SYSTEMC_LIBDIR="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/lib-linux64"
export LD_LIBRARY_PATH=${SYSTEMC_LIBDIR}
SRCS=$PWD/verilator
git clone "$REPO" "$SRCS"
cd "$SRCS"
git checkout "$REV"
autoconf
./configure --enable-longtests
make -j $(nproc)
if [ "${1:-''}" == "test" ]; then
make test
fi

47
ci/docker/run/Dockerfile Normal file
View File

@ -0,0 +1,47 @@
# DESCRIPTION: Dockerfile for image to run Verilator inside
#
# Copyright 2020 by Stefan Wallentowitz. This program is free
# software; you can redistribute it and/or modify it under the terms
# of either the GNU Lesser General Public License Version 3 or the
# Perl Artistic License Version 2.0.
FROM ubuntu:18.04
RUN apt-get update \
&& apt-get install --no-install-recommends -y \
autoconf=2.69-11 \
bc=1.07.1-2 \
bison=2:3.0.4.dfsg-1build1 \
build-essential=12.4ubuntu1 \
ca-certificates=20180409 \
flex=2.6.4-6 \
git=1:2.17.1-1ubuntu0.5 \
libfl-dev=2.6.4-6 \
perl=5.26.1-6ubuntu0.3 \
python3=3.6.7-1~18.04 \
&& apt-get clean \
&& rm -rf /var/lib/apt/lists/*
ARG REPO=https://github.com/verilator/verilator
ARG SOURCE_COMMIT=master
WORKDIR /tmp
# Add an exception for the linter, we want to cd here in one layer
# to reduce the number of layers (and thereby size).
# hadolint ignore=DL3003
RUN git clone "${REPO}" verilator && \
cd verilator && \
git checkout "${SOURCE_COMMIT}" && \
autoconf && \
./configure && \
make -j "$(nproc)" && \
make install && \
cd .. && \
rm -r verilator
COPY verilator-wrap.sh /usr/local/bin/verilator-wrap.sh
WORKDIR /work
ENTRYPOINT [ "/usr/local/bin/verilator-wrap.sh" ]

49
ci/docker/run/README.adoc Normal file
View File

@ -0,0 +1,49 @@
= Docker Container as Verilator executable
This allows you to run Verilator easily as a docker image, e.g.:
docker run -ti verilator/verilator:latest --version
This is in particular useful to compare against older version or to
check when an issue was introduced.
You will need to give it access to your files as a volume and fix the
user rights:
....
docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:latest --cc test.v
....
The caveat is that it can only access files below the current
directory then, a workaround is to adopt the volume and set
`-workdir`.
There is a convenience script in this folder that wraps around the
docker calls:
$ verilator-docker 3.922 --version
Verilator 3.922 2018-03-17 rev UNKNOWN_REV
Finally, you can also work in the container by setting the entrypoint
(don't forget to mount a volume if you want your work persistent):
docker run -ti --entrypoint /bin/bash verilator/verilator:latest
The other files in this folder all for building the containers and to
store in them. You could use it to build Verilator at a specific
commit:
docker build --build-arg SOURCE_COMMIT=<commit> .
== Internals
The Dockerfile is pretty straight-forward, it builds Verilator and
removes the tree after that to reduce the image size. It sets a
wrapper script (`verilator-wrap.sh`) as entrypoint. This script calls
Verilator but also copies the verilated runtime files to the `obj_dir`
or the `-Mdir` respectively. This allows the user to build the C++
output with the matching runtime files. The wrapper patches the
generated Makefile accordingly.
There is also a hook defined that is run by docker hub via automated
builds.

9
ci/docker/run/hooks/build Normal file
View File

@ -0,0 +1,9 @@
#!/bin/bash
# DESCRIPTION: Docker hub hook to pass SOURCE_COMMIT
#
# Copyright 2020 by Stefan Wallentowitz. This program is free
# software; you can redistribute it and/or modify it under the terms
# of either the GNU Lesser General Public License Version 3 or the
# Perl Artistic License Version 2.0.FROM ubuntu:18.04
docker build --build-arg SOURCE_COMMIT=${SOURCE_COMMIT} -f $DOCKERFILE_PATH -t $IMAGE_NAME .

10
ci/docker/run/verilator-docker Executable file
View File

@ -0,0 +1,10 @@
#!/bin/bash
# DESCRIPTION: Wrap a verilator call to run a docker container
#
# Copyright 2020 by Stefan Wallentowitz. This program is free
# software; you can redistribute it and/or modify it under the terms
# of either the GNU Lesser General Public License Version 3 or the
# Perl Artistic License Version 2.0.
docker pull verilator/verilator:$1 >/dev/null
docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:$1 "${@:2}"

26
ci/docker/run/verilator-wrap.sh Executable file
View File

@ -0,0 +1,26 @@
#!/bin/bash -e
# DESCRIPTION: Wrap a Verilator call and copy vlt includes
# (inside docker container)
#
# Copyright 2020 by Stefan Wallentowitz. This program is free
# software; you can redistribute it and/or modify it under the terms
# of either the GNU Lesser General Public License Version 3 or the
# Perl Artistic License Version 2.0.
perl /usr/local/bin/verilator "$@"
# Check if user set an obj_dir
obj_dir=$(echo " $@" | grep -oP '\s--Mdir\s*\K\S+')
if [ "$obj_dir" == "" ]; then
obj_dir="obj_dir"
fi
# If the run was successful: Copy required files to allow build without this container
if [ -e ${obj_dir} ]; then
# Copy files required for the build
mkdir -p ${obj_dir}/vlt
cp -r /usr/local/share/verilator/bin ${obj_dir}/vlt
cp -r /usr/local/share/verilator/include ${obj_dir}/vlt
# Point Makefile to that folder
perl -i -pe 's/VERILATOR_ROOT = \/usr\/local\/share\/verilator/VERILATOR_ROOT = vlt/g' ${obj_dir}/*.mk
fi

4
configure.ac
View File

@ -1,12 +1,12 @@
# DESCRIPTION: Process this file with autoconf to produce a configure script.
#
# Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can
# Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can
# redistribute it and/or modify it under the terms of either the GNU Lesser
# General Public License Version 3 or the Perl Artistic License Version 2.0.
#AC_INIT([Verilator],[#.### YYYY-MM-DD])
#AC_INIT([Verilator],[#.### devel])
AC_INIT([Verilator],[4.025 devel],
AC_INIT([Verilator],[4.027 devel],
[https://verilator.org],
[verilator],[https://verilator.org])
# When releasing, also update header of Changes file

4
docs/CONTRIBUTING.adoc
View File

@ -24,8 +24,8 @@ contributions flow more efficiently.
* Please https://verilator.org/issues/new[Open a new issue].
* You may attach a patch to the issue, or (preferred) may point to a GitHub
repository branch within your GitHub account.
* You may attach a patch to the issue, or (preferred) may request a GitHub
pull request.
** Verilator uses Travis CI to provide continuous integration. You may
want to setup Travis CI on your GitHub branch to ensure your changes

2
docs/Makefile.in
View File

@ -7,7 +7,7 @@
#
#*****************************************************************************
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
docs/TODO
View File

@ -1,6 +1,6 @@
// DESCRIPTION: Verilator: List of To Do issues.
//
// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License
// Version 2.0.

2
docs/doxygen-mainpage
View File

@ -3,4 +3,4 @@
* \section intro_sec Introduction
*
* This is a full doxygen analysis of the Verilator source tree.
*/
*/

19
docs/install.adoc
View File

@ -21,9 +21,14 @@ Git, below, maybe a better alternative.) To install as a package:
If this works, skip down to <<Running Verilator>>.
=== Docker
Verilator is available in pre-built Docker containers. See
https://github.com/verilator/verilator/blob/master/ci/docker/run/README.adoc
=== Git
Alternatively, installing Verilator with Git provides the most flexibility.
Installing Verilator with Git provides the most flexibility.
For additional options and details see the additional sections below. In
brief:
@ -96,11 +101,11 @@ Those developing Verilator may also want these (see internals.adoc):
==== Install SystemC
If you will be using SystemC (vs straight C++ output), download
http://www.systemc.org[SystemC]. Follow their installation instructions.
You will need to set `SYSTEMC_INCLUDE` to point to the include directory
with systemc.h in it, and `SYSTEMC_LIBDIR` to points to the directory with
libsystemc.a in it. (Older installations may set `SYSTEMC` and
`SYSTEMC_ARCH` instead.)
https://www.accellera.org/downloads/standards/systemc[SystemC].
Follow their installation instructions. You will need to set `SYSTEMC_INCLUDE`
to point to the include directory with `systemc.h` in it, and `SYSTEMC_LIBDIR`
to points to the directory with `libsystemc.a` in it. (Older installations
may set `SYSTEMC` and `SYSTEMC_ARCH` instead.)
==== Install GTKWave
@ -289,6 +294,6 @@ or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
== License
Copyright 2008-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2008-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

9
docs/internals.adoc
View File

@ -382,6 +382,13 @@ changed; if clear, checking those signals for changes may be skipped.
== Coding Conventions
=== Compiler Version and C++11
Verilator supports GCC 4.4.7 and newer. GCC 4.4.7 does not support C++11,
therefore C++11 is generally not required. Exceptions may be made to
require C++11 for features that are only practical with C++11,
e.g. threads.
=== Indentation and Naming Style
We will work with contributors to fix up indentation style issues, but it
@ -973,6 +980,6 @@ list in `src/Makefile_obj.in` and reconfigure.
== Distribution
Copyright 2008-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2008-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

2
examples/cmake_hello_c/CMakeLists.txt
View File

@ -5,7 +5,7 @@
# This is an example cmake script to build a verilog to systemc project
# using cmake and verilator.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_hello_c/Makefile
View File

@ -6,7 +6,7 @@
# This makefile is here for testing the examples and should
# generally not be added to a CMake project.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_hello_sc/CMakeLists.txt
View File

@ -5,7 +5,7 @@
# This is an example cmake script to build a verilog to SystemC project
# using CMake and Verilator.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_hello_sc/Makefile
View File

@ -6,7 +6,7 @@
# This makefile is here for testing the examples and should
# generally not be added to a CMake project.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_protect_lib/CMakeLists.txt
View File

@ -5,7 +5,7 @@
# This is an example cmake script to build a verilog to systemc project
# using cmake and verilator.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_protect_lib/Makefile
View File

@ -6,7 +6,7 @@
# This makefile is here for testing the examples and should
# generally not be added to a CMake project.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_tracing_c/CMakeLists.txt
View File

@ -5,7 +5,7 @@
# This is an example cmake script to build a verilog to systemc project
# using cmake and verilator.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_tracing_c/Makefile
View File

@ -6,7 +6,7 @@
# This makefile is here for testing the examples and should
# generally not be added to a CMake project.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_tracing_sc/CMakeLists.txt
View File

@ -5,7 +5,7 @@
# This is an example cmake script to build a verilog to SystemC project
# using CMake and Verilator.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/cmake_tracing_sc/Makefile
View File

@ -6,7 +6,7 @@
# This makefile is here for testing the examples and should
# generally not be added to a CMake project.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/make_hello_c/Makefile
View File

@ -5,7 +5,7 @@
# This calls the object directory makefile. That allows the objects to
# be placed in the "current directory" which simplifies the Makefile.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/make_hello_sc/Makefile
View File

@ -5,7 +5,7 @@
# This calls the object directory makefile. That allows the objects to
# be placed in the "current directory" which simplifies the Makefile.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/make_tracing_c/Makefile
View File

@ -5,7 +5,7 @@
# This calls the object directory makefile. That allows the objects to
# be placed in the "current directory" which simplifies the Makefile.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/make_tracing_c/Makefile_obj
View File

@ -5,7 +5,7 @@
#
# This is executed in the object directory, and called by ../Makefile
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/make_tracing_sc/Makefile
View File

@ -5,7 +5,7 @@
# This calls the object directory makefile. That allows the objects to
# be placed in the "current directory" which simplifies the Makefile.
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/make_tracing_sc/Makefile_obj
View File

@ -5,7 +5,7 @@
#
# This is executed in the object directory, and called by ../Makefile
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
examples/xml_py/Makefile
View File

@ -2,7 +2,7 @@
#
# DESCRIPTION: Verilator Example: XML tests
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

4
include/gtkwave/fstapi.c
View File

@ -3010,7 +3010,7 @@ void fstWriterEmitValueChange32(void *ctx, fstHandle handle,
uint32_t bits, uint32_t val) {
char buf[32];
char *s = buf;
int i;
uint32_t i;
for (i = 0; i < bits; ++i)
{
*s++ = '0' + ((val >> (bits - i - 1)) & 1);
@ -3021,7 +3021,7 @@ void fstWriterEmitValueChange64(void *ctx, fstHandle handle,
uint32_t bits, uint64_t val) {
char buf[64];
char *s = buf;
int i;
uint32_t i;
for (i = 0; i < bits; ++i)
{
*s++ = '0' + ((val >> (bits - i - 1)) & 1);

607
include/verilated.cpp
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.
@ -662,6 +662,7 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA
case '@': { // Verilog/C++ string
va_arg(ap, int); // # bits is ignored
const std::string* cstrp = va_arg(ap, const std::string*);
if (width > cstrp->size()) output += std::string(width - cstrp->size(), ' ');
output += *cstrp;
break;
}
@ -713,13 +714,17 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA
output += charval;
break;
}
case 's':
case 's': {
std::string field;
for (; lsb>=0; --lsb) {
lsb = (lsb / 8) * 8; // Next digit
IData charval = VL_BITRSHIFT_W(lwp, lsb) & 0xff;
output += (charval==0)?' ':charval;
field += (charval==0)?' ':charval;
}
if (width > field.size()) output += std::string(width - field.size(), ' ');
output += field;
break;
}
case 'd': { // Signed decimal
int digits;
std::string append;
@ -1315,146 +1320,6 @@ IData VL_SSCANF_INX(int, const std::string& ld, const char* formatp, ...) VL_MT_
return got;
}
void VL_WRITEMEM_Q(bool hex, int width, int depth, int array_lsb, int,
QData filename, const void* memp, IData start,
IData end) VL_MT_SAFE {
WData fnw[VL_WQ_WORDS_E]; VL_SET_WQ(fnw, filename);
return VL_WRITEMEM_W(hex, width, depth, array_lsb, VL_WQ_WORDS_E, fnw, memp, start, end);
}
void VL_WRITEMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords,
WDataInP filenamep, const void* memp, IData start,
IData end) VL_MT_SAFE {
char filenamez[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1];
_VL_VINT_TO_STRING(fnwords * VL_EDATASIZE, filenamez, filenamep);
std::string filenames(filenamez);
return VL_WRITEMEM_N(hex, width, depth, array_lsb, filenames, memp, start, end);
}
const char* memhFormat(int nBits) {
assert((nBits >= 1) && (nBits <= 32));
static char buf[32];
switch ((nBits - 1) / 4) {
case 0: VL_SNPRINTF(buf, 32, "%%01x"); break;
case 1: VL_SNPRINTF(buf, 32, "%%02x"); break;
case 2: VL_SNPRINTF(buf, 32, "%%03x"); break;
case 3: VL_SNPRINTF(buf, 32, "%%04x"); break;
case 4: VL_SNPRINTF(buf, 32, "%%05x"); break;
case 5: VL_SNPRINTF(buf, 32, "%%06x"); break;
case 6: VL_SNPRINTF(buf, 32, "%%07x"); break;
case 7: VL_SNPRINTF(buf, 32, "%%08x"); break;
default: assert(false); break; // LCOV_EXCL_LINE
}
return buf;
}
void VL_WRITEMEM_N(
bool hex, // Hex format, else binary
int width, // Width of each array row
int depth, // Number of rows
int array_lsb, // Index of first row. Valid row addresses
// // range from array_lsb up to (array_lsb + depth - 1)
const std::string& filename, // Output file name
const void* memp, // Array state
IData start, // First array row address to write
IData end // Last address to write, or ~0 when not specified
) VL_MT_SAFE {
if (VL_UNLIKELY(!hex)) {
VL_FATAL_MT(filename.c_str(), 0, "",
"VL_WRITEMEM_N only supports hex format for now, sorry!");
return;
}
// Calculate row address limits
size_t row_min = array_lsb;
size_t row_max = row_min + depth - 1;
// Normalize the last address argument: ~0 => row_max
size_t nend = (end == ~0u) ? row_max : end;
// Bounds check the write address range
if (VL_UNLIKELY((start < row_min) || (start > row_max)
|| (nend < row_min) || (nend > row_max))) {
VL_FATAL_MT(filename.c_str(), 0, "",
"$writemem specified address out-of-bounds");
return;
}
if (VL_UNLIKELY(start > nend)) {
VL_FATAL_MT(filename.c_str(), 0, "",
"$writemem invalid address range");
return;
}
// Calculate row offset range
size_t row_start = start - row_min;
size_t row_end = nend - row_min;
// Bail out on possible 32-bit size_t overflow
if (VL_UNLIKELY(row_end + 1 == 0)) {
VL_FATAL_MT(filename.c_str(), 0, "", "$writemem address is too large");
return;
}
FILE* fp = fopen(filename.c_str(), "w");
if (VL_UNLIKELY(!fp)) {
VL_FATAL_MT(filename.c_str(), 0, "", "$writemem file not found");
// cppcheck-suppress resourceLeak // fp is NULL - bug in cppcheck
return;
}
for (size_t row_offset = row_start; row_offset <= row_end; ++row_offset) {
if (width <= 8) {
const CData* datap
= &(reinterpret_cast<const CData*>(memp))[row_offset];
fprintf(fp, memhFormat(width), VL_MASK_I(width) & *datap);
fprintf(fp, "\n");
} else if (width <= 16) {
const SData* datap
= &(reinterpret_cast<const SData*>(memp))[row_offset];
fprintf(fp, memhFormat(width), VL_MASK_I(width) & *datap);
fprintf(fp, "\n");
} else if (width <= 32) {
const IData* datap
= &(reinterpret_cast<const IData*>(memp))[row_offset];
fprintf(fp, memhFormat(width), VL_MASK_I(width) & *datap);
fprintf(fp, "\n");
} else if (width <= 64) {
const QData* datap
= &(reinterpret_cast<const QData*>(memp))[row_offset];
vluint64_t value = VL_MASK_Q(width) & *datap;
vluint32_t lo = value & 0xffffffff;
vluint32_t hi = value >> 32;
fprintf(fp, memhFormat(width - 32), hi);
fprintf(fp, "%08x\n", lo);
} else {
WDataInP memDatap = reinterpret_cast<WDataInP>(memp);
WDataInP datap = &memDatap[row_offset * VL_WORDS_I(width)];
// output as a sequence of VL_EDATASIZE'd words
// from MSB to LSB. Mask off the MSB word which could
// contain junk above the top of valid data.
int word_idx = ((width - 1) / VL_EDATASIZE);
bool first = true;
while (word_idx >= 0) {
EData data = datap[word_idx];
if (first) {
data &= VL_MASK_E(width);
int top_word_nbits = ((width - 1) & (VL_EDATASIZE - 1)) + 1;
fprintf(fp, memhFormat(top_word_nbits), data);
} else {
fprintf(fp, "%08x", data);
}
word_idx--;
first = false;
}
fprintf(fp, "\n");
}
}
fclose(fp);
}
IData VL_FREAD_I(int width, int array_lsb, int array_size,
void* memp, IData fpi, IData start, IData count) VL_MT_SAFE {
// While threadsafe, each thread can only access different file handles
@ -1464,14 +1329,14 @@ IData VL_FREAD_I(int width, int array_lsb, int array_size,
// Prep for reading
IData read_count = 0;
IData read_elements = 0;
int start_shift = (width-1) & ~7; // bit+7:bit gets first character
int start_shift = (width - 1) & ~7; // bit+7:bit gets first character
int shift = start_shift;
// Read the data
// We process a character at a time, as then we don't need to deal
// with changing buffer sizes dynamically, etc.
while (1) {
int c = fgetc(fp);
if (VL_UNLIKELY(c==EOF)) break;
if (VL_UNLIKELY(c == EOF)) break;
// Shift value in
IData entry = read_elements + start - array_lsb;
if (width <= 8) {
@ -1508,144 +1373,6 @@ IData VL_FREAD_I(int width, int array_lsb, int array_size,
return read_count;
}
void VL_READMEM_Q(bool hex, int width, int depth, int array_lsb, int,
QData filename, void* memp, IData start, IData end) VL_MT_SAFE {
WData fnw[VL_WQ_WORDS_E]; VL_SET_WQ(fnw, filename);
return VL_READMEM_W(hex, width, depth, array_lsb, VL_WQ_WORDS_E, fnw, memp, start, end);
}
void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords,
WDataInP filenamep, void* memp, IData start, IData end) VL_MT_SAFE {
char filenamez[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1];
_VL_VINT_TO_STRING(fnwords * VL_EDATASIZE, filenamez, filenamep);
std::string filenames(filenamez);
return VL_READMEM_N(hex, width, depth, array_lsb, filenames, memp, start, end);
}
void VL_READMEM_N(
bool hex, // Hex format, else binary
int width, // Width of each array row
int depth, // Number of rows
int array_lsb, // Index of first row. Valid row addresses
// // range from array_lsb up to (array_lsb + depth - 1)
const std::string& filename, // Input file name
void* memp, // Array state
IData start, // First array row address to read
IData end // Last row address to read
) VL_MT_SAFE {
FILE* fp = fopen(filename.c_str(), "r");
if (VL_UNLIKELY(!fp)) {
// We don't report the Verilog source filename as it slow to have to pass it down
VL_FATAL_MT(filename.c_str(), 0, "", "$readmem file not found");
// cppcheck-suppress resourceLeak // fp is NULL - bug in cppcheck
return;
}
// Prep for reading
IData addr = start;
int linenum = 1;
bool innum = false;
bool ignore_to_eol = false;
bool ignore_to_cmt = false;
bool needinc = false;
bool reading_addr = false;
int lastc = ' ';
// Read the data
// We process a character at a time, as then we don't need to deal
// with changing buffer sizes dynamically, etc.
while (1) {
int c = fgetc(fp);
if (VL_UNLIKELY(c==EOF)) break;
//printf("%d: Got '%c' Addr%x IN%d IgE%d IgC%d ninc%d\n",
// linenum, c, addr, innum, ignore_to_eol, ignore_to_cmt, needinc);
if (c=='\n') {
linenum++; ignore_to_eol = false;
if (innum) reading_addr = false;
innum = false;
}
else if (c=='\t' || c==' ' || c=='\r' || c=='\f') {
if (innum) reading_addr = false;
innum = false;
}
// Skip // comments and detect /* comments
else if (ignore_to_cmt && lastc=='*' && c=='/') {
ignore_to_cmt = false; if (innum) reading_addr=false; innum=false;
} else if (!ignore_to_eol && !ignore_to_cmt) {
if (lastc=='/' && c=='*') { ignore_to_cmt = true; }
else if (lastc=='/' && c=='/') { ignore_to_eol = true; }
else if (c=='/') {} // Part of /* or //
else if (c=='#') { ignore_to_eol = true; }
else if (c=='_') {}
else if (c=='@') { reading_addr = true; innum=false; needinc=false; }
// Check for hex or binary digits as file format requests
else if (isxdigit(c) || (!reading_addr && (c=='x' || c=='X'))) {
c = tolower(c);
int value = (c >= 'a' ? (c=='x' ? VL_RAND_RESET_I(4) : (c-'a'+10)) : (c-'0'));
if (!innum) { // Prep for next number
if (needinc) { addr++; needinc=false; }
}
if (reading_addr) {
// Decode @ addresses
if (!innum) addr=0;
addr = (addr<<4) + value;
} else {
needinc = true;
//printf(" Value width=%d @%x = %c\n", width, addr, c);
if (VL_UNLIKELY(addr >= static_cast<IData>(depth+array_lsb)
|| addr < static_cast<IData>(array_lsb))) {
VL_FATAL_MT(filename.c_str(), linenum, "",
"$readmem file address beyond bounds of array");
} else {
int entry = addr - array_lsb;
QData shift = hex ? VL_ULL(4) : VL_ULL(1);
// Shift value in
if (width<=8) {
CData* datap = &(reinterpret_cast<CData*>(memp))[entry];
if (!innum) { *datap = 0; }
*datap = ((*datap << shift) + value) & VL_MASK_I(width);
} else if (width<=16) {
SData* datap = &(reinterpret_cast<SData*>(memp))[entry];
if (!innum) { *datap = 0; }
*datap = ((*datap << shift) + value) & VL_MASK_I(width);
} else if (width <= VL_IDATASIZE) {
IData* datap = &(reinterpret_cast<IData*>(memp))[entry];
if (!innum) { *datap = 0; }
*datap = ((*datap << shift) + value) & VL_MASK_I(width);
} else if (width<=VL_QUADSIZE) {
QData* datap = &(reinterpret_cast<QData*>(memp))[entry];
if (!innum) { *datap = 0; }
*datap = ((*datap << static_cast<QData>(shift))
+ static_cast<QData>(value)) & VL_MASK_Q(width);
} else {
WDataOutP datap = &(reinterpret_cast<WDataOutP>(memp))
[ entry*VL_WORDS_I(width) ];
if (!innum) { VL_ZERO_RESET_W(width, datap); }
_VL_SHIFTL_INPLACE_W(width, datap, static_cast<IData>(shift));
datap[0] |= value;
}
if (VL_UNLIKELY(value>=(1<<shift))) {
VL_FATAL_MT(filename.c_str(), linenum, "",
"$readmemb (binary) file contains hex characters");
}
}
}
innum = true;
}
else {
VL_FATAL_MT(filename.c_str(), linenum, "", "$readmem file syntax error");
}
}
lastc = c;
}
if (needinc) { addr++; }
// Final checks
fclose(fp);
if (VL_UNLIKELY(end != VL_UL(0xffffffff) && addr != (end+1))) {
VL_FATAL_MT(filename.c_str(), linenum, "",
"$readmem file ended before specified ending-address");
}
}
IData VL_SYSTEM_IQ(QData lhs) VL_MT_SAFE {
WData lhsw[VL_WQ_WORDS_E]; VL_SET_WQ(lhsw, lhs);
return VL_SYSTEM_IW(VL_WQ_WORDS_E, lhsw);
@ -1790,6 +1517,9 @@ std::string VL_TO_STRING(IData lhs) {
std::string VL_TO_STRING(QData lhs) {
return VL_SFORMATF_NX("'h%0x", 64, lhs);
}
std::string VL_TO_STRING_W(int words, WDataInP obj) {
return VL_SFORMATF_NX("'h%0x", words * VL_EDATASIZE, obj);
}
std::string VL_TOLOWER_NN(const std::string& ld) VL_MT_SAFE {
std::string out = ld;
@ -1862,6 +1592,317 @@ IData VL_ATOI_N(const std::string& str, int base) VL_PURE {
return static_cast<IData>(v);
}
//===========================================================================
// Readmem/writemem
static const char* memhFormat(int nBits) {
assert((nBits >= 1) && (nBits <= 32));
static char buf[32];
switch ((nBits - 1) / 4) {
case 0: VL_SNPRINTF(buf, 32, "%%01x"); break;
case 1: VL_SNPRINTF(buf, 32, "%%02x"); break;
case 2: VL_SNPRINTF(buf, 32, "%%03x"); break;
case 3: VL_SNPRINTF(buf, 32, "%%04x"); break;
case 4: VL_SNPRINTF(buf, 32, "%%05x"); break;
case 5: VL_SNPRINTF(buf, 32, "%%06x"); break;
case 6: VL_SNPRINTF(buf, 32, "%%07x"); break;
case 7: VL_SNPRINTF(buf, 32, "%%08x"); break;
default: assert(false); break; // LCOV_EXCL_LINE
}
return buf;
}
VlReadMem::VlReadMem(bool hex, int bits, const std::string& filename, QData start, QData end)
: m_hex(hex)
, m_bits(bits)
, m_filename(filename)
, m_end(end)
, m_addr(start)
, m_linenum(0) {
m_fp = fopen(filename.c_str(), "r");
if (VL_UNLIKELY(!m_fp)) {
// We don't report the Verilog source filename as it slow to have to pass it down
VL_FATAL_MT(filename.c_str(), 0, "", "$readmem file not found");
// cppcheck-suppress resourceLeak // m_fp is NULL - bug in cppcheck
return;
}
}
VlReadMem::~VlReadMem() {
if (m_fp) { fclose(m_fp); m_fp = NULL; }
}
bool VlReadMem::get(QData& addrr, std::string& valuer) {
if (VL_UNLIKELY(!m_fp)) return false;
valuer = "";
// Prep for reading
bool indata = false;
bool ignore_to_eol = false;
bool ignore_to_cmt = false;
bool reading_addr = false;
int lastc = ' ';
// Read the data
// We process a character at a time, as then we don't need to deal
// with changing buffer sizes dynamically, etc.
while (1) {
int c = fgetc(m_fp);
if (VL_UNLIKELY(c == EOF)) break;
// printf("%d: Got '%c' Addr%lx IN%d IgE%d IgC%d\n",
// m_linenum, c, m_addr, indata, ignore_to_eol, ignore_to_cmt);
// See if previous data value has completed, and if so return
if (c == '_') continue; // Ignore _ e.g. inside a number
if (indata && !isxdigit(c) && c != 'x' && c != 'X') {
// printf("Got data @%lx = %s\n", m_addr, valuer.c_str());
indata = false;
ungetc(c, m_fp);
addrr = m_addr;
++m_addr;
return true;
}
// Parse line
if (c == '\n') {
++m_linenum; ignore_to_eol = false;
reading_addr = false;
} else if (c == '\t' || c == ' ' || c == '\r' || c == '\f') {
reading_addr = false;
}
// Skip // comments and detect /* comments
else if (ignore_to_cmt && lastc == '*' && c == '/') {
ignore_to_cmt = false;
reading_addr = false;
} else if (!ignore_to_eol && !ignore_to_cmt) {
if (lastc == '/' && c == '*') { ignore_to_cmt = true; }
else if (lastc == '/' && c == '/') { ignore_to_eol = true; }
else if (c == '/') {} // Part of /* or //
else if (c == '#') { ignore_to_eol = true; }
else if (c == '@') { reading_addr = true; m_addr = 0; }
// Check for hex or binary digits as file format requests
else if (isxdigit(c) || (!reading_addr && (c == 'x' || c == 'X'))) {
c = tolower(c);
int value = (c >= 'a' ? (c == 'x' ? VL_RAND_RESET_I(4) : (c-'a'+10)) : (c-'0'));
if (reading_addr) {
// Decode @ addresses
m_addr = (m_addr << 4) + value;
} else {
indata = true;
valuer += c;
// printf(" Value width=%d @%x = %c\n", width, m_addr, c);
if (VL_UNLIKELY(value > 1 && !m_hex)) {
VL_FATAL_MT(m_filename.c_str(), m_linenum, "",
"$readmemb (binary) file contains hex characters");
}
}
} else {
VL_FATAL_MT(m_filename.c_str(), m_linenum, "", "$readmem file syntax error");
}
}
lastc = c;
}
if (VL_UNLIKELY(m_end != ~VL_ULL(0) && m_addr <= m_end)) {
VL_FATAL_MT(m_filename.c_str(), m_linenum, "",
"$readmem file ended before specified final address (IEEE 2017 21.4)");
}
return false; // EOF
}
void VlReadMem::setData(void* valuep, const std::string& rhs) {
QData shift = m_hex ? VL_ULL(4) : VL_ULL(1);
bool innum = false;
// Shift value in
for (std::string::const_iterator it = rhs.begin(); it != rhs.end(); ++it) {
char c = tolower(*it);
int value = (c >= 'a' ? (c == 'x' ? VL_RAND_RESET_I(4) : (c - 'a' + 10)) : (c - '0'));
if (m_bits <= 8) {
CData* datap = reinterpret_cast<CData*>(valuep);
if (!innum) { *datap = 0; }
*datap = ((*datap << shift) + value) & VL_MASK_I(m_bits);
} else if (m_bits <= 16) {
SData* datap = reinterpret_cast<SData*>(valuep);
if (!innum) { *datap = 0; }
*datap = ((*datap << shift) + value) & VL_MASK_I(m_bits);
} else if (m_bits <= VL_IDATASIZE) {
IData* datap = reinterpret_cast<IData*>(valuep);
if (!innum) { *datap = 0; }
*datap = ((*datap << shift) + value) & VL_MASK_I(m_bits);
} else if (m_bits <= VL_QUADSIZE) {
QData* datap = reinterpret_cast<QData*>(valuep);
if (!innum) { *datap = 0; }
*datap = ((*datap << static_cast<QData>(shift)) + static_cast<QData>(value))
& VL_MASK_Q(m_bits);
} else {
WDataOutP datap = reinterpret_cast<WDataOutP>(valuep);
if (!innum) { VL_ZERO_RESET_W(m_bits, datap); }
_VL_SHIFTL_INPLACE_W(m_bits, datap, static_cast<IData>(shift));
datap[0] |= value;
}
innum = true;
}
}
VlWriteMem::VlWriteMem(bool hex, int bits, const std::string& filename, QData start, QData end)
: m_hex(hex)
, m_bits(bits)
, m_filename(filename)
, m_addr(0) {
if (VL_UNLIKELY(!hex)) {
VL_FATAL_MT(filename.c_str(), 0, "",
"Unsupported: $writemem binary format (suggest hex format)");
return;
}
if (VL_UNLIKELY(start > end)) {
VL_FATAL_MT(filename.c_str(), 0, "", "$writemem invalid address range");
return;
}
m_fp = fopen(filename.c_str(), "w");
if (VL_UNLIKELY(!m_fp)) {
VL_FATAL_MT(filename.c_str(), 0, "", "$writemem file not found");
// cppcheck-suppress resourceLeak // m_fp is NULL - bug in cppcheck
return;
}
}
VlWriteMem::~VlWriteMem() {
if (m_fp) { fclose(m_fp); m_fp = NULL; }
}
void VlWriteMem::print(QData addr, bool addrstamp, const void* valuep) {
if (VL_UNLIKELY(!m_fp)) return;
if (addr != m_addr && addrstamp) { // Only assoc has time stamps
fprintf(m_fp, "@%" VL_PRI64 "x\n", addr);
}
m_addr = addr + 1;
if (m_bits <= 8) {
const CData* datap = reinterpret_cast<const CData*>(valuep);
fprintf(m_fp, memhFormat(m_bits), VL_MASK_I(m_bits) & *datap);
fprintf(m_fp, "\n");
} else if (m_bits <= 16) {
const SData* datap = reinterpret_cast<const SData*>(valuep);
fprintf(m_fp, memhFormat(m_bits), VL_MASK_I(m_bits) & *datap);
fprintf(m_fp, "\n");
} else if (m_bits <= 32) {
const IData* datap = reinterpret_cast<const IData*>(valuep);
fprintf(m_fp, memhFormat(m_bits), VL_MASK_I(m_bits) & *datap);
fprintf(m_fp, "\n");
} else if (m_bits <= 64) {
const QData* datap = reinterpret_cast<const QData*>(valuep);
vluint64_t value = VL_MASK_Q(m_bits) & *datap;
vluint32_t lo = value & 0xffffffff;
vluint32_t hi = value >> 32;
fprintf(m_fp, memhFormat(m_bits - 32), hi);
fprintf(m_fp, "%08x\n", lo);
} else {
WDataInP datap = reinterpret_cast<WDataInP>(valuep);
// output as a sequence of VL_EDATASIZE'd words
// from MSB to LSB. Mask off the MSB word which could
// contain junk above the top of valid data.
int word_idx = ((m_bits - 1) / VL_EDATASIZE);
bool first = true;
while (word_idx >= 0) {
EData data = datap[word_idx];
if (first) {
data &= VL_MASK_E(m_bits);
int top_word_nbits = VL_BITBIT_E(m_bits - 1) + 1;
fprintf(m_fp, memhFormat(top_word_nbits), data);
} else {
fprintf(m_fp, "%08x", data);
}
word_idx--;
first = false;
}
fprintf(m_fp, "\n");
}
}
void VL_READMEM_N(bool hex, // Hex format, else binary
int bits, // M_Bits of each array row
QData depth, // Number of rows
int array_lsb, // Index of first row. Valid row addresses
// // range from array_lsb up to (array_lsb + depth - 1)
const std::string& filename, // Input file name
void* memp, // Array state
QData start, // First array row address to read
QData end // Last row address to read
) VL_MT_SAFE {
QData addr_max = array_lsb + depth - 1;
if (start < array_lsb) start = array_lsb;
QData addr_end = end;
if (addr_end > addr_max) addr_end = addr_max;
VlReadMem rmem(hex, bits, filename, start, end);
if (VL_UNLIKELY(!rmem.isOpen())) return;
while (1) {
QData addr;
std::string value;
if (rmem.get(addr /*ref*/, value/*ref*/)) {
if (VL_UNLIKELY(addr < static_cast<QData>(array_lsb)
|| addr >= static_cast<QData>(array_lsb + depth))) {
VL_FATAL_MT(filename.c_str(), rmem.linenum(), "",
"$readmem file address beyond bounds of array");
} else {
QData entry = addr - array_lsb;
if (bits <= 8) {
CData* datap = &(reinterpret_cast<CData*>(memp))[entry];
rmem.setData(datap, value);
} else if (bits <= 16) {
SData* datap = &(reinterpret_cast<SData*>(memp))[entry];
rmem.setData(datap, value);
} else if (bits <= VL_IDATASIZE) {
IData* datap = &(reinterpret_cast<IData*>(memp))[entry];
rmem.setData(datap, value);
} else if (bits <= VL_QUADSIZE) {
QData* datap = &(reinterpret_cast<QData*>(memp))[entry];
rmem.setData(datap, value);
} else {
WDataOutP datap = &(reinterpret_cast<WDataOutP>(memp))
[ entry*VL_WORDS_I(bits) ];
rmem.setData(datap, value);
}
}
} else {
break;
}
}
}
void VL_WRITEMEM_N(bool hex, // Hex format, else binary
int bits, // Width of each array row
QData depth, // Number of rows
int array_lsb, // Index of first row. Valid row addresses
// // range from array_lsb up to (array_lsb + depth - 1)
const std::string& filename, // Output file name
const void* memp, // Array state
QData start, // First array row address to write
QData end // Last address to write, or ~0 when not specified
) VL_MT_SAFE {
QData addr_max = array_lsb + depth - 1;
if (start < array_lsb) start = array_lsb;
if (end > addr_max) end = addr_max;
VlWriteMem wmem(hex, bits, filename, start, end);
if (VL_UNLIKELY(!wmem.isOpen())) return;
for (QData addr = start; addr <= end; ++addr) {
QData row_offset = addr - array_lsb;
if (bits <= 8) {
const CData* datap = &(reinterpret_cast<const CData*>(memp))[row_offset];
wmem.print(addr, false, datap);
} else if (bits <= 16) {
const SData* datap = &(reinterpret_cast<const SData*>(memp))[row_offset];
wmem.print(addr, false, datap);
} else if (bits <= 32) {
const IData* datap = &(reinterpret_cast<const IData*>(memp))[row_offset];
wmem.print(addr, false, datap);
} else if (bits <= 64) {
const QData* datap = &(reinterpret_cast<const QData*>(memp))[row_offset];
wmem.print(addr, false, datap);
} else {
WDataInP memDatap = reinterpret_cast<WDataInP>(memp);
WDataInP datap = &memDatap[row_offset * VL_WORDS_I(bits)];
wmem.print(addr, false, datap);
}
}
}
//===========================================================================
// Timescale conversion

18
include/verilated.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.
@ -630,22 +630,6 @@ extern void VL_FCLOSE_I(IData fdi);
extern IData VL_FREAD_I(int width, int array_lsb, int array_size,
void* memp, IData fpi, IData start, IData count);
extern void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords,
WDataInP filenamep, void* memp, IData start, IData end);
extern void VL_READMEM_Q(bool hex, int width, int depth, int array_lsb, int fnwords,
QData filename, void* memp, IData start, IData end);
inline void VL_READMEM_I(bool hex, int width, int depth, int array_lsb, int fnwords,
IData filename, void* memp, IData start, IData end) VL_MT_SAFE {
VL_READMEM_Q(hex, width, depth, array_lsb, fnwords, filename, memp, start, end); }
extern void VL_WRITEMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords,
WDataInP filenamep, const void* memp, IData start, IData end);
extern void VL_WRITEMEM_Q(bool hex, int width, int depth, int array_lsb, int fnwords,
QData filename, const void* memp, IData start, IData end);
inline void VL_WRITEMEM_I(bool hex, int width, int depth, int array_lsb, int fnwords,
IData filename, const void* memp, IData start, IData end) VL_MT_SAFE {
VL_WRITEMEM_Q(hex, width, depth, array_lsb, fnwords, filename, memp, start, end); }
extern void VL_WRITEF(const char* formatp, ...);
extern void VL_FWRITEF(IData fpi, const char* formatp, ...);

2
include/verilated.mk.in
View File

@ -2,7 +2,7 @@
######################################################################
# DESCRIPTION: Makefile commands for all verilated target files
#
# Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can
# Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can
# redistribute it and/or modify it under the terms of either the GNU Lesser
# General Public License Version 3 or the Perl Artistic License Version 2.0.
######################################################################

2
include/verilated.v
View File

@ -4,7 +4,7 @@
//
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilated_config.h.in
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilated_cov.cpp
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_cov.h
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_cov_key.h
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_dpi.cpp
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilated_dpi.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

7
include/verilated_fst_c.cpp
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//
@ -118,7 +118,7 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, vluint32_t elem
void VerilatedFst::declSymbol(vluint32_t code, const char* name,
int dtypenum, fstVarDir vardir, fstVarType vartype,
int arraynum, vluint32_t len) {
bool array, int arraynum, vluint32_t len) {
std::pair<Code2SymbolType::iterator, bool> p
= m_code2symbol.insert(std::make_pair(code, static_cast<fstHandle>(NULL)));
std::istringstream nameiss(name);
@ -153,8 +153,7 @@ void VerilatedFst::declSymbol(vluint32_t code, const char* name,
std::stringstream name_ss;
name_ss << symbol_name;
if (arraynum >= 0)
name_ss << "(" << arraynum << ")";
if (array) name_ss << "(" << arraynum << ")";
std::string name_str = name_ss.str();
if (dtypenum > 0) {

28
include/verilated_fst_c.h
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//
@ -60,7 +60,7 @@ private:
VL_UNCOPYABLE(VerilatedFst);
void declSymbol(vluint32_t code, const char* name,
int dtypenum, fstVarDir vardir, fstVarType vartype,
int arraynum, vluint32_t len);
bool array, int arraynum, vluint32_t len);
// helpers
std::vector<char> m_valueStrBuffer;
public:
@ -103,33 +103,33 @@ public:
/// Inside dumping routines, declare a signal
void declBit(vluint32_t code, const char* name,
int dtypenum, fstVarDir vardir, fstVarType vartype,
int arraynum) {
declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 1);
bool array, int arraynum) {
declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 1);
}
void declBus(vluint32_t code, const char* name,
int dtypenum, fstVarDir vardir, fstVarType vartype,
int arraynum, int msb, int lsb) {
declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1);
bool array, int arraynum, int msb, int lsb) {
declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1);
}
void declDouble(vluint32_t code, const char* name,
int dtypenum, fstVarDir vardir, fstVarType vartype,
int arraynum) {
declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 2);
bool array, int arraynum) {
declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 2);
}
void declFloat(vluint32_t code, const char* name,
int dtypenum, fstVarDir vardir, fstVarType vartype,
int arraynum) {
declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 1);
bool array, int arraynum) {
declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 1);
}
void declQuad(vluint32_t code, const char* name,
int dtypenum, fstVarDir vardir, fstVarType vartype,
int arraynum, int msb, int lsb) {
declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1);
bool array, int arraynum, int msb, int lsb) {
declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1);
}
void declArray(vluint32_t code, const char* name,
int dtypenum, fstVarDir vardir, fstVarType vartype,
int arraynum, int msb, int lsb) {
declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1);
bool array, int arraynum, int msb, int lsb) {
declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1);
}
/// Inside dumping routines, dump one signal if it has changed

80
include/verilated_heavy.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2010-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2010-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.
@ -42,6 +42,40 @@ extern std::string VL_TO_STRING(SData obj);
extern std::string VL_TO_STRING(IData obj);
extern std::string VL_TO_STRING(QData obj);
inline std::string VL_TO_STRING(const std::string& obj) { return "\"" + obj + "\""; }
extern std::string VL_TO_STRING_W(int words, WDataInP obj);
//===================================================================
// Readmem/Writemem operation classes
class VlReadMem {
bool m_hex; // Hex format
int m_bits; // Bit width of values
const std::string& m_filename; // Filename
QData m_end; // End address (as specified by user)
FILE* m_fp; // File handle for filename
QData m_addr; // Next address to read
int m_linenum; // Line number last read from file
public:
VlReadMem(bool hex, int bits, const std::string& filename, QData start, QData end);
~VlReadMem();
bool isOpen() const { return m_fp != NULL; }
int linenum() const { return m_linenum; }
bool get(QData& addrr, std::string& valuer);
void setData(void* valuep, const std::string& rhs);
};
class VlWriteMem {
bool m_hex; // Hex format
int m_bits; // Bit width of values
const std::string& m_filename; // Filename
FILE* m_fp; // File handle for filename
QData m_addr; // Next address to write
public:
VlWriteMem(bool hex, int bits, const std::string& filename, QData start, QData end);
~VlWriteMem();
bool isOpen() const { return m_fp != NULL; }
void print(QData addr, bool addrstamp, const void* valuep);
};
//===================================================================
// Verilog array container
@ -72,6 +106,10 @@ VlWide<T_Words>& VL_CVT_W_A(WDataInP inp, const VlWide<T_Words>&) {
return *((VlWide<T_Words>*)inp);
}
template <std::size_t T_Words>
std::string VL_TO_STRING(const VlWide<T_Words>& obj) {
return VL_TO_STRING_W(T_Words, obj.data());
}
//===================================================================
// Verilog associative array container
@ -180,6 +218,34 @@ std::string VL_TO_STRING(const VlAssocArray<T_Key, T_Value>& obj) {
return obj.to_string();
}
template <class T_Key, class T_Value>
void VL_READMEM_N(bool hex, int bits, const std::string& filename,
VlAssocArray<T_Key, T_Value>& obj, QData start, QData end) VL_MT_SAFE {
VlReadMem rmem(hex, bits, filename, start, end);
if (VL_UNLIKELY(!rmem.isOpen())) return;
while (1) {
QData addr;
std::string data;
if (rmem.get(addr /*ref*/, data /*ref*/)) {
rmem.setData(&(obj.at(addr)), data);
} else {
break;
}
}
}
template <class T_Key, class T_Value>
void VL_WRITEMEM_N(bool hex, int bits, const std::string& filename,
const VlAssocArray<T_Key, T_Value>& obj, QData start, QData end) VL_MT_SAFE {
VlWriteMem wmem(hex, bits, filename, start, end);
if (VL_UNLIKELY(!wmem.isOpen())) return;
for (typename VlAssocArray<T_Key, T_Value>::const_iterator it = obj.begin(); it != obj.end();
++it) {
QData addr = it->first;
if (addr >= start && addr <= end) wmem.print(addr, true, &(it->second));
}
}
//===================================================================
// Verilog queue container
// There are no multithreaded locks on this; the base variable must
@ -312,12 +378,12 @@ extern std::string VL_TOLOWER_NN(const std::string& ld);
extern std::string VL_TOUPPER_NN(const std::string& ld);
extern IData VL_FOPEN_NI(const std::string& filename, IData mode) VL_MT_SAFE;
extern void VL_READMEM_N(bool hex, int width, int depth, int array_lsb,
const std::string& filename,
void* memp, IData start, IData end) VL_MT_SAFE;
extern void VL_WRITEMEM_N(bool hex, int width, int depth, int array_lsb,
const std::string& filename,
const void* memp, IData start, IData end) VL_MT_SAFE;
extern void VL_READMEM_N(bool hex, int bits, QData depth, int array_lsb,
const std::string& filename, void* memp, QData start,
QData end) VL_MT_SAFE;
extern void VL_WRITEMEM_N(bool hex, int bits, QData depth, int array_lsb,
const std::string& filename, const void* memp, QData start,
QData end) VL_MT_SAFE;
extern IData VL_SSCANF_INX(int lbits, const std::string& ld,
const char* formatp, ...) VL_MT_SAFE;
extern void VL_SFORMAT_X(int obits_ignored, std::string& output,

2
include/verilated_imp.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilated_save.cpp
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_save.h
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2012-2019 by Wilson Snyder. This program is free software;
// Copyright 2012-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_sc.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilated_sym_props.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilated_syms.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilated_threads.cpp
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2012-2019 by Wilson Snyder. This program is free software;
// Copyright 2012-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_threads.h
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2012-2019 by Wilson Snyder. This program is free software;
// Copyright 2012-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_unordered_set_map.h
View File

@ -7,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License
// Version 2.0.

62
include/verilated_vcd_c.cpp
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//
@ -525,7 +525,7 @@ void VerilatedVcd::module(const std::string& name) {
}
void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
int arraynum, bool tri, bool bussed, int msb, int lsb) {
bool array, int arraynum, bool tri, bool bussed, int msb, int lsb) {
if (!code) { VL_FATAL_MT(__FILE__, __LINE__, "",
"Internal: internal trace problem, code 0 is illegal"); }
@ -584,7 +584,7 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
}
decl += " ";
decl += basename;
if (arraynum>=0) {
if (array) {
sprintf(buf, "(%d)", arraynum);
decl += buf;
hiername += buf;
@ -597,26 +597,42 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
m_namemapp->insert(std::make_pair(hiername,decl));
}
void VerilatedVcd::declBit (vluint32_t code, const char* name, int arraynum)
{ declare(code, name, "wire", arraynum, false, false, 0, 0); }
void VerilatedVcd::declBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
{ declare(code, name, "wire", arraynum, false, true, msb, lsb); }
void VerilatedVcd::declQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
{ declare(code, name, "wire", arraynum, false, true, msb, lsb); }
void VerilatedVcd::declArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
{ declare(code, name, "wire", arraynum, false, true, msb, lsb); }
void VerilatedVcd::declTriBit (vluint32_t code, const char* name, int arraynum)
{ declare(code, name, "wire", arraynum, true, false, 0, 0); }
void VerilatedVcd::declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
{ declare(code, name, "wire", arraynum, true, true, msb, lsb); }
void VerilatedVcd::declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
{ declare(code, name, "wire", arraynum, true, true, msb, lsb); }
void VerilatedVcd::declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
{ declare(code, name, "wire", arraynum, true, true, msb, lsb); }
void VerilatedVcd::declFloat (vluint32_t code, const char* name, int arraynum)
{ declare(code, name, "real", arraynum, false, false, 31, 0); }
void VerilatedVcd::declDouble (vluint32_t code, const char* name, int arraynum)
{ declare(code, name, "real", arraynum, false, false, 63, 0); }
void VerilatedVcd::declBit(vluint32_t code, const char* name, bool array, int arraynum) {
declare(code, name, "wire", array, arraynum, false, false, 0, 0);
}
void VerilatedVcd::declBus(vluint32_t code, const char* name, bool array, int arraynum, int msb,
int lsb) {
declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
}
void VerilatedVcd::declQuad(vluint32_t code, const char* name, bool array, int arraynum, int msb,
int lsb) {
declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
}
void VerilatedVcd::declArray(vluint32_t code, const char* name, bool array, int arraynum, int msb,
int lsb) {
declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
}
void VerilatedVcd::declTriBit(vluint32_t code, const char* name, bool array, int arraynum) {
declare(code, name, "wire", array, arraynum, true, false, 0, 0);
}
void VerilatedVcd::declTriBus(vluint32_t code, const char* name, bool array, int arraynum, int msb,
int lsb) {
declare(code, name, "wire", array, arraynum, true, true, msb, lsb);
}
void VerilatedVcd::declTriQuad(vluint32_t code, const char* name, bool array, int arraynum,
int msb, int lsb) {
declare(code, name, "wire", array, arraynum, true, true, msb, lsb);
}
void VerilatedVcd::declTriArray(vluint32_t code, const char* name, bool array, int arraynum,
int msb, int lsb) {
declare(code, name, "wire", array, arraynum, true, true, msb, lsb);
}
void VerilatedVcd::declFloat(vluint32_t code, const char* name, bool array, int arraynum) {
declare(code, name, "real", array, arraynum, false, false, 31, 0);
}
void VerilatedVcd::declDouble(vluint32_t code, const char* name, bool array, int arraynum) {
declare(code, name, "real", array, arraynum, false, false, 63, 0);
}
//=============================================================================

26
include/verilated_vcd_c.h
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//
@ -125,8 +125,8 @@ private:
void printStr(const char* str);
void printQuad(vluint64_t n);
void printTime(vluint64_t timeui);
void declare(vluint32_t code, const char* name, const char* wirep,
int arraynum, bool tri, bool bussed, int msb, int lsb);
void declare(vluint32_t code, const char* name, const char* wirep, bool array, int arraynum,
bool tri, bool bussed, int msb, int lsb);
void dumpHeader();
void dumpPrep(vluint64_t timeui);
@ -201,16 +201,16 @@ public:
/// Inside dumping routines, declare a module
void module(const std::string& name);
/// Inside dumping routines, declare a signal
void declBit (vluint32_t code, const char* name, int arraynum);
void declBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void declQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void declArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void declTriBit (vluint32_t code, const char* name, int arraynum);
void declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void declDouble (vluint32_t code, const char* name, int arraynum);
void declFloat (vluint32_t code, const char* name, int arraynum);
void declBit( vluint32_t code, const char* name, bool array, int arraynum);
void declBus( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
void declQuad( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
void declArray( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
void declTriBit( vluint32_t code, const char* name, bool array, int arraynum);
void declTriBus( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
void declTriQuad( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
void declTriArray(vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
void declDouble( vluint32_t code, const char* name, bool array, int arraynum);
void declFloat( vluint32_t code, const char* name, bool array, int arraynum);
// ... other module_start for submodules (based on cell name)
/// Inside dumping routines, dump one signal

2
include/verilated_vcd_sc.cpp
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_vcd_sc.h
View File

@ -3,7 +3,7 @@
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2019 by Wilson Snyder. This program is free software;
// Copyright 2001-2020 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//

2
include/verilated_vpi.cpp
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilated_vpi.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

2
include/verilatedos.h
View File

@ -1,7 +1,7 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License.
// Version 2.0.

5
nodist/bisondiff
View File

@ -1,7 +1,7 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
######################################################################
#
# Copyright 2007-2019 by Wilson Snyder. This package is free software; you
# Copyright 2007-2020 by Wilson Snyder. This package is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
@ -15,6 +15,7 @@
# DESCRIPTION: Diff bison files
use warnings;
use Getopt::Long;
use IO::File;
use strict;

5
nodist/bisonreader
View File

@ -1,7 +1,7 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
######################################################################
#
# Copyright 2007-2019 by Wilson Snyder. This package is free software; you
# Copyright 2007-2020 by Wilson Snyder. This package is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
@ -15,6 +15,7 @@
# DESCRIPTION: Debugging of bison output
use warnings;
use strict;
my $Debug;

5
nodist/code_coverage
View File

@ -1,7 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
use warnings;
use Cwd;
use File::Copy qw(cp);
use File::Path qw(mkpath);
@ -242,7 +243,7 @@ Runs a specific stage (see the script).
=head1 DISTRIBUTION
Copyright 2019-2019 by Wilson Snyder. This package is free software; you
Copyright 2019-2020 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License Version 3 or the Perl Artistic License
Version 2.0.

2
nodist/code_coverage.dat
View File

@ -1,7 +1,7 @@
# -*- Perl -*-
# DESCRIPTION: Verilator: Internal C++ code lcov control file
#
# Copyright 2019-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2019-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

6
nodist/dot_importer
View File

@ -1,8 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use warnings;
use Getopt::Long;
use IO::File;
use Pod::Usage;
@ -143,7 +143,7 @@ Displays this message and program version and exits.
=head1 DISTRIBUTION
Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

6
nodist/dot_pruner
View File

@ -1,8 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use warnings;
use Getopt::Long;
use IO::File;
use Pod::Usage;
@ -184,7 +184,7 @@ Displays this message and program version and exits.
=head1 DISTRIBUTION
Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

5
nodist/flexdiff
View File

@ -1,7 +1,7 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
######################################################################
#
# Copyright 2007-2019 by Wilson Snyder. This package is free software; you
# Copyright 2007-2020 by Wilson Snyder. This package is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
@ -15,6 +15,7 @@
# DESCRIPTION: Diff flex files
use warnings;
use IO::File;
use strict;

5
nodist/git_untabify
View File

@ -1,7 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
use warnings;
use Getopt::Long;
#use Data::Dumper; $Data::Dumper::Indent=1; $Data::Dumper::Sortkeys=1; #Debug
use IO::File;
@ -235,7 +236,7 @@ Displays program version and exits.
=head1 DISTRIBUTION
Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

5
nodist/install_test
View File

@ -1,7 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
use warnings;
use Getopt::Long;
use Cwd;
use IO::File;
@ -189,7 +190,7 @@ Runs a specific test stage (see the script).
=head1 DISTRIBUTION
Copyright 2009-2019 by Wilson Snyder. This package is free software; you
Copyright 2009-2020 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License Version 3 or the Perl Artistic License
Version 2.0.

6
nodist/invoke_atsim
View File

@ -1,8 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use warnings;
use strict;
#======================================================================
@ -28,7 +28,7 @@ invoke_atsim - Invoke tool under "modules" command
=head1 DISTRIBUTION
Copyright 2005-2019 by Wilson Snyder. This package is free software; you
Copyright 2005-2020 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License Version 3 or the Perl Artistic License
Version 2.0.

6
nodist/invoke_iccr
View File

@ -1,8 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use warnings;
use strict;
#======================================================================
@ -28,7 +28,7 @@ invoke_iccr - Invoke tool under "modules" command
=head1 DISTRIBUTION
Copyright 2007-2019 by Wilson Snyder. This package is free software; you
Copyright 2007-2020 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License Version 3 or the Perl Artistic License
Version 2.0.

6
nodist/invoke_ncverilog
View File

@ -1,8 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use warnings;
use strict;
#======================================================================
@ -28,7 +28,7 @@ invoke_ncverilog - Invoke tool under "modules" command
=head1 DISTRIBUTION
Copyright 2005-2019 by Wilson Snyder. This package is free software; you
Copyright 2005-2020 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License Version 3 or the Perl Artistic License
Version 2.0.

6
nodist/invoke_vcs
View File

@ -1,8 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use warnings;
use strict;
#======================================================================
@ -28,7 +28,7 @@ invoke_vcs - Invoke tool under "modules" command
=head1 DISTRIBUTION
Copyright 2005-2019 by Wilson Snyder. This package is free software; you
Copyright 2005-2020 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License Version 3 or the Perl Artistic License
Version 2.0.

6
nodist/vtree_importer
View File

@ -1,8 +1,8 @@
#!/usr/bin/perl -w
#!/usr/bin/env perl
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use warnings;
use Getopt::Long;
use IO::File;
use Pod::Usage;
@ -331,7 +331,7 @@ Displays this message and program version and exits.
=head1 DISTRIBUTION
Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can
Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License Version 3 or the Perl Artistic License Version 2.0.

2
src/.gdbinit
View File

@ -1,6 +1,6 @@
# DESCRIPTION: Verilator: GDB startup file with useful defines
#
# Copyright 2012-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2012-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
src/Makefile.in
View File

@ -7,7 +7,7 @@
#
#*****************************************************************************
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
src/Makefile_obj.in
View File

@ -7,7 +7,7 @@
#
#*****************************************************************************
#
# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

2
src/V3Active.cpp
View File

@ -6,7 +6,7 @@
//
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License
// Version 2.0.

2
src/V3Active.h
View File

@ -6,7 +6,7 @@
//
//*************************************************************************
//
// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License
// Version 2.0.

Some files were not shown because too many files have changed in this diff Show More