diff --git a/.clang-format b/.clang-format index d336fa9ed..0fd60f7dd 100644 --- a/.clang-format +++ b/.clang-format @@ -90,10 +90,6 @@ PenaltyBreakString: 1000 PenaltyExcessCharacter: 1000000 PenaltyReturnTypeOnItsOwnLine: 60 PointerAlignment: Left -RawStringFormats: - - Delimiter: pb - Language: TextProto - BasedOnStyle: google ReflowComments: true SortIncludes: false SortUsingDeclarations: true @@ -108,7 +104,7 @@ SpacesInContainerLiterals: true SpacesInCStyleCastParentheses: false SpacesInParentheses: false SpacesInSquareBrackets: false -Standard: Cpp11 +Standard: Cpp03 TabWidth: 8 UseTab: Never ... diff --git a/.codacy.yml b/.codacy.yml index b3a99af01..31a95b117 100644 --- a/.codacy.yml +++ b/.codacy.yml @@ -1,4 +1,5 @@ --- exclude_paths: + - '.github/**' - 'ci/build_verilator.sh' - 'include/vltstd/**' diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md new file mode 100644 index 000000000..3e438348e --- /dev/null +++ b/.github/ISSUE_TEMPLATE/bug_report.md @@ -0,0 +1,14 @@ +--- +name: Bug report +about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) +title: '' +labels: new +assignees: '' + +--- + +Thanks for taking the time to report this. + +Can you attach an example that shows the issue? (Must be openly licensed, ideally in test_regress format.) + +May we assist you in trying to fix this yourself? diff --git a/.github/ISSUE_TEMPLATE/feature.md b/.github/ISSUE_TEMPLATE/feature.md new file mode 100644 index 000000000..b36225b94 --- /dev/null +++ b/.github/ISSUE_TEMPLATE/feature.md @@ -0,0 +1,16 @@ +--- +name: Feature Request +about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) +title: '' +labels: new +assignees: '' + +--- + +Thanks for taking the time to report this. + +What would you like added/supported? + +Can you attach an example that runs on other simulators? (Must be openly licensed, ideally in test_regress format.) + +May we assist you in trying to fix this yourself? diff --git a/.github/ISSUE_TEMPLATE/questions.md b/.github/ISSUE_TEMPLATE/questions.md new file mode 100644 index 000000000..b634a5513 --- /dev/null +++ b/.github/ISSUE_TEMPLATE/questions.md @@ -0,0 +1,10 @@ +--- +name: Q and A, or Other +about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) +title: '' +labels: new +assignees: '' + +--- + +How may we help - what is your question? diff --git a/.github/PULL_REQUEST_TEMPLATE.md b/.github/PULL_REQUEST_TEMPLATE.md new file mode 100644 index 000000000..a05a08e94 --- /dev/null +++ b/.github/PULL_REQUEST_TEMPLATE.md @@ -0,0 +1 @@ +We appreciate your contributing to Verilator. If this is your first commit, please add your name to docs/CONTRIBUTORS, and read our contributing guidelines in docs/CONTRIBUTING.adoc. diff --git a/.github/labels.toml b/.github/labels.toml index 0c9958522..ec50f3c63 100644 --- a/.github/labels.toml +++ b/.github/labels.toml @@ -103,6 +103,11 @@ color = "008672" name = "help wanted" description = "Extra attention is needed" +["new"] +color = "ff4400" +name = "new" +description = "New issue, not yet seen by maintainers" + ["resolution: abandoned"] color = "cfd3d7" name = "resolution: abandoned" diff --git a/.travis.yml b/.travis.yml index 9bdca4d68..0307d98ac 100644 --- a/.travis.yml +++ b/.travis.yml @@ -16,6 +16,7 @@ env: - VERILATOR_ROOT=$PWD - VERILATOR_NUM_JOBS=$(echo `nproc` + 1 | bc) - VERILATOR_CONFIG_FLAGS="--enable-maintainer-mode --enable-longtests" + - VERILATOR_AUTHOR_SITE=1 - OBJCACHE=ccache cache: diff --git a/Changes b/Changes index ef975dbac..dbccd7377 100644 --- a/Changes +++ b/Changes @@ -2,10 +2,26 @@ Revision history for Verilator The contributors that suggested a given feature are shown in []. Thanks! -* Verilator 4.025 devel + +* Verilator 4.027 devel + +** Support attributes (public, isolate_assignments, etc.) in configuration files. + +** Add -match to lint_off to waive warnings. [Philipp Wagner] + +*** Support $readmem/$writemem with assoc arrarys. Closes #2100. [agrobman] + +**** Add error on misused define. [Topa Tota] + + +* Verilator 4.026 2020-01-11 + +** Docker images are now available for Verilator releases. *** Support bounded queues. +*** Support implication operator "|->" in assertions, #2069. [Peter Monsson] + *** Support string compare, ato*, etc methods, #1606. [Yutetsu TAKATSUKASA] **** Support immediate cover statements. @@ -30,6 +46,14 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix huge case statement performance. Closes #1644. [Julien Margetts] +**** Fix tracing -1 index arrays. Closes #2090. [Yutetsu Takatsukasa] + +**** Fix expand optimization slowing --lint-only. Closes #2091. [Thomas Watts] + +**** Fix %{number}s with strings. #2093. [agrobman] + +**** Fix shebang breaking some shells. Closes #2067. [zdave] + * Verilator 4.024 2019-12-08 @@ -3455,7 +3479,7 @@ of input ports exists for tracing. This uses outline mode in Emacs. See C-h m [M-x describe-mode]. -Copyright 2001-2019 by Wilson Snyder. This program is free software; you +Copyright 2001-2020 by Wilson Snyder. This program is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/Makefile.in b/Makefile.in index 2016fdbac..d0ffe3c93 100644 --- a/Makefile.in +++ b/Makefile.in @@ -7,7 +7,7 @@ # #***************************************************************************** # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -103,7 +103,7 @@ PACKAGE_VERSION = @PACKAGE_VERSION@ SHELL = /bin/sh -SUBDIRS = src test_regress \ +SUBDIRS = docs src test_regress \ examples/cmake_hello_c \ examples/cmake_hello_sc \ examples/cmake_tracing_c \ @@ -114,6 +114,7 @@ SUBDIRS = src test_regress \ examples/make_tracing_c \ examples/make_tracing_sc \ examples/make_protect_lib \ + examples/xml_py \ INFOS = verilator.txt verilator.html verilator.pdf @@ -513,6 +514,7 @@ clean mostlyclean distclean maintainer-clean:: rm -f *.tex rm -rf examples/*/obj_dir* examples/*/logs rm -rf test_*/obj_dir + rm -rf nodist/fuzzer/dictionary rm -rf nodist/obj_dir distclean maintainer-clean:: diff --git a/README.adoc b/README.adoc index 6cdc9b20d..8d8f17814 100644 --- a/README.adoc +++ b/README.adoc @@ -4,7 +4,7 @@ ifdef::env-github[] image:https://img.shields.io/badge/License-LGPL%20v3-blue.svg[license LGPLv3,link=https://www.gnu.org/licenses/lgpl-3.0] image:https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg[license Artistic-2.0,link=https://opensource.org/licenses/Artistic-2.0] -image:https://api.codacy.com/project/badge/Grade/ff998fdaa6f64b9a95eb5f342ee6bf4d[Code Quality,link=https://www.codacy.com/manual/wsnyder/verilator] +image:https://api.codacy.com/project/badge/Grade/48478c986f13400682ffe4a5e0939b3a[Code Quality,link=https://www.codacy.com/gh/verilator/verilator] image:https://travis-ci.com/verilator/verilator.svg?branch=master[Build Status (Travis CI),link=https://travis-ci.com/verilator/verilator] endif::[] @@ -131,10 +131,10 @@ perhaps Icarus may. == Open License -Verilator is Copyright 2003-2019 by Wilson Snyder. (Report bugs to +Verilator is Copyright 2003-2020 by Wilson Snyder. (Report bugs to https://verilator.org/issues[Verilator Issues].) Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the -Perl Artistic License Version 2.0. (See the documentation for more -details.) +Perl Artistic License Version 2.0. See the documentation for more +details. diff --git a/bin/verilator b/bin/verilator index 7b7a54556..ee0d66631 100755 --- a/bin/verilator +++ b/bin/verilator @@ -1,9 +1,7 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl ###################################################################### # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -1078,7 +1076,7 @@ and the remaining files can be compiled on parallel machines. Using design --output-split 20000 resulted in splitting into approximately one-minute-compile chunks. -Typically when using this, make with VM_PARALLEL_BUILD=1, and use +Typically when using this, make with VM_PARALLEL_BUILDS=1, and use I. =item --output-split-cfuncs I @@ -2114,16 +2112,16 @@ specified, it will come from a default optionally specified at configure time (before Verilator was compiled), or computed from SYSTEMC/lib-SYSTEMC_ARCH. -=item VCS_HOME - -If set, specifies the directory containing the Synopsys VCS distribution. -When set, a 'make test' in the Verilator distribution will also run VCS -baseline regression tests. - =item VERILATOR_BIN -If set, specifies an alternative name of the Verilator binary. May be used -for debugging and selecting between multiple operating system builds. +If set, specifies an alternative name of the C binary. May be +used for debugging and selecting between multiple operating system builds. + +=item VERILATOR_COVERAGE_BIN + +If set, specifies an alternative name of the C. +May be used for debugging and selecting between multiple operating system +builds. =item VERILATOR_GDB @@ -2737,8 +2735,8 @@ controlled by configuration files, typically named with the .vlt extension. An example: `verilator_config - lint_off -msg WIDTH - lint_off -msg CASEX -file "silly_vendor_code.v" + lint_off -rule WIDTH + lint_off -rule CASEX -file "silly_vendor_code.v" This disables WIDTH warnings globally, and CASEX for a specific file. @@ -2767,9 +2765,11 @@ Enable/disable coverage for the specified filename (or wildcard with '*' or omitted). Often used to ignore an entire module for coverage analysis purposes. -=item lint_on [-msg ] [-file "" [-lines [ - ]]] +=item lint_on [-rule ] [-file "" [-lines [ - ]]] -=item lint_off [-msg ] [-file "" [-lines [ - ]]] +=item lint_off [-rule ] [-file "" [-lines [ - ]]] + +=item lint_off [-rule ] [-file ""] [-match ""] Enable/disables the specified lint warning, in the specified filename (or wildcard with '*' or '?', or all files if omitted) and range of line @@ -2778,10 +2778,17 @@ numbers (or all lines if omitted). With lint_off using '*' will override any lint_on directives in the source, i.e. the warning will still not be printed. -If the -msg is omitted, all lint warnings (see list in -Wno-lint) are +If the -rule is omitted, all lint warnings (see list in -Wno-lint) are enabled/disabled. This will override all later lint warning enables for the specified region. +If -match is set the linter warnings are matched against this (wildcard) +string and are waived in case they match iff rule and file (with wildcard) +also match. + +In previous versions -rule was named -msg. The latter is deprecated, but +still works with a deprecation info, it may be removed in future versions. + =item tracing_on [-file "" [-lines [ - ]]] =item tracing_off [-file "" [-lines [ - ]]] @@ -2793,6 +2800,124 @@ and range of line numbers (or all lines if omitted). For tracing_off, cells below any module in the files/ranges specified will also not be traced. +=item clock_enable -module "" -signal "" + +Indicate the signal is used to gate a clock, and the user takes responsibility +for insuring there are no races related to it. + +Same as /*verilator clock_enable*/, see L for +more information and an example. + +=item clocker -module "" [-task ""] -signal "" + +=item clocker -module "" [-function ""] -signal "" + +=item no_clocker -module "" [-task ""] -signal "" + +=item no_clocker -module "" [-function ""] -signal "" + +Indicate the signal is used as clock or not. This information is used by +Verilator to mark the signal as clocker and propagate the clocker attribute +automatically to derived signals. See C<--clk> for more information. + +Same as /*verilator clocker*/, see L for more +information. + +=item coverage_block_off -module "" -block "" + +=item coverage_block_off -file "" -line + +Specifies the entire begin/end block should be ignored for coverage +analysis purposes. Can either be specified as a named block or as a +filename and line number. + +Same as /*verilator coverage_block_off*/, see L for more information. + +=item full_case -file "" -lines + +=item parallel_case -file "" -lines + +Same as "//synopsys full_case" and "//synopsys parallel_case". When +these synthesis directives are discovered, Verilator will either +formally prove the directive to be true, or failing that, will insert +the appropriate code to detect failing cases at simulation runtime and +print an "Assertion failed" error message. + +=item inline -module "" + +Specifies the module may be inlined into any modules that use this +module. This is useful to speed up simulation runtime with some small +loss of trace visibility and modularity. Note signals under inlined +submodules will be named I__DOT__I as C++ does +not allow "." in signal names. When tracing such signals the tracing +routines will replace the __DOT__ with the period. + +Same as /*verilator inline_module*/, see L for +more information. + +=item isolate_assignments -module "" [-task ""] -signal "" + +=item isolate_assignments -module "" [-function ""] -signal "" + +=item isolate_assignments -module "" -function "" + +Used to indicate the assignments to this signal in any blocks should be +isolated into new blocks. When there is a large combinatorial block that +is resulting in a UNOPTFLAT warning, attaching this to the signal causing +a false loop may clear up the problem. + +Same as /* verilator isolate_assignments */, see L for more information. + +=item no_inline -module "" + +Specifies the module should not be inlined into any modules that use +this module. This is useful especially at the top level module to +reduce the size of the interface class, to aid compile time at a small +performance loss. + +Same as /*verilator no_inline_module*/, see L +for more information. + +=item no_inline [-module ""] -task "" + +=item no_inline [-module ""] -function "" + +Specify the function or task should not be inlined into where it is +used. This may reduce the size of the final executable when a task is +used a very large number of times. For this flag to work, the task +and tasks below it must be pure; they cannot reference any variables +outside the task itself. + +Same as /*verilator no_inline_task*/, see L +for more information. + +=item sc_bv -module "" [-task ""] -signal "" + +=item sc_bv -module "" [-function ""] -signal "" + +Sets the port to be of sc_bv> type, instead of bool, vluint32_t or +vluint64_t. This may be useful if the port width is parameterized and +different of such modules interface a templated module (such as a transactor) +or for other reasons. In general you should avoid using this attribute when +not necessary as with increasing usage of sc_bv the performance decreases +significantly. + +Same as /*verilator sc_bv*/, see L for more +information. + +=item sformat [-module ""] [-task ""] -signal "" + +=item sformat [-module ""] [-function ""] -signal "" + +Final input of a function or task "input string" to indicate the +function or task should pass all remaining arguments through +$sformatf. This allows creation of DPI functions with $display like +behavior. See the test_regress/t/t_dpi_display.v file for an example. + +Same as /*verilator sformat*/, see L for more +information. =back @@ -2928,7 +3053,8 @@ per the C standard (it's unspecified in Verilog). Specifies the entire begin/end block should be ignored for coverage analysis. Must be inside a basic block, e.g. within a begin/end pair. -Same as /* verilator coverage_block_off */. +Same as /* verilator coverage_block_off */ and C in +L. =item `systemc_header @@ -3020,6 +3146,9 @@ scheduling algorithm, sometimes required for correct clock behavior, and always improving performance. It's also a good idea to enable the IMPERFECTSCH warning, to insure all clock enables are properly recognized. +Same as C in configuration files, see L for more information. + =item /*verilator clocker*/ =item /*verilator no_clocker*/ @@ -3029,11 +3158,17 @@ not. This information is used by Verilator to mark the signal as clocker and propagate the clocker attribute automatically to derived signals. See C<--clk> for more information. +Same as C and C in configuration files, see +L for more information. + =item /*verilator coverage_block_off*/ Specifies the entire begin/end block should be ignored for coverage analysis purposes. +Same as C in configuration files, see +L for more information. + =item /*verilator coverage_off*/ Specifies that following lines of code should have coverage disabled. @@ -3054,6 +3189,9 @@ submodules will be named I__DOT__I as C++ does not allow "." in signal names. When tracing such signals the tracing routines will replace the __DOT__ with the period. +Same as C in configuration files, see L +for more information. + =item /*verilator isolate_assignments*/ Used after a signal declaration to indicate the assignments to this signal @@ -3090,6 +3228,9 @@ It would then internally break it into (sort of): end end +Same as C in configuration files, see +L for more information. + =item /*verilator lint_off I*/ Disable the specified warning message for any warnings following the comment. @@ -3125,6 +3266,9 @@ modules that use this module. This is useful especially at the top level module to reduce the size of the interface class, to aid compile time at a small performance loss. +Same as C in configuration files, see L for more information. + =item /*verilator no_inline_task*/ Used in a function or task variable definition section to specify the @@ -3133,6 +3277,9 @@ reduce the size of the final executable when a task is used a very large number of times. For this flag to work, the task and tasks below it must be pure; they cannot reference any variables outside the task itself. +Same as C in configuration files, see L for more information. + =item /*verilator public*/ (parameter) Used after a parameter declaration to indicate the emitted C code should @@ -3160,6 +3307,9 @@ Instead of using public variables, consider instead making a DPI or public function that accesses the variable. This is nicer as it provides an obvious entry point that is also compatible across simulators. +Same as C in configuration files, see L +for more information. + =item /*verilator public*/ (task/function) Used inside the declaration section of a function or task declaration to @@ -3182,6 +3332,9 @@ the model will NOT notice changes made to variables in these functions. You may want to use DPI exports instead, as it's compatible with other simulators. +Same as C in configuration files, see L +for more information. + =item /*verilator public_flat*/ (variable) Used after an input, output, register, or wire declaration to indicate the @@ -3190,11 +3343,17 @@ signal. This will not declare this module public, which means the name of the signal or path to it may change based upon the module inlining which takes place. +Same as C in configuration files, see L for more information. + =item /*verilator public_flat_rd*/ (variable) Used after an input, output, register, or wire declaration to indicate the signal should be declared public_flat (see above), but read-only. +Same as C in configuration files, see L for more information. + =item /*verilator public_flat_rw @() */ (variable) Used after an input, output, register, or wire declaration to indicate the @@ -3203,6 +3362,9 @@ where writes should be considered to have the timing specified by the given sensitivity edge list. Set for all variables, ports and wires using the --public-flat-rw switch. +Same as C in configuration files, see L for more information. + =item /*verilator public_module*/ Used after a module statement to indicate the module should not be inlined @@ -3211,9 +3373,12 @@ Verilator automatically sets this attribute when the module contains any public signals or `systemc_ directives. Also set for all modules when using the --public switch. +Same as C in configuration files, see L +for more information. + =item /*verilator sc_clock*/ -Rarely needed. Used after an input declaration to indicate the signal +Deprecated. Used after an input declaration to indicate the signal should be declared in SystemC as a sc_clock instead of a bool. This was needed in SystemC 1.1 and 1.2 only; versions 2.0 and later do not require clock pins to be sc_clocks and this is no longer needed. @@ -3225,7 +3390,10 @@ type, instead of bool, vluint32_t or vluint64_t. This may be useful if the port width is parameterized and different of such modules interface a templated module (such as a transactor) or for other reasons. In general you should avoid using this attribute when not necessary as with increasing -usage of sc_bv the performance increases significantly. +usage of sc_bv the performance decreases significantly. + +Same as C in configuration files, see L +for more information. =item /*verilator sformat*/ @@ -3234,6 +3402,9 @@ indicate the function or task should pass all remaining arguments through $sformatf. This allows creation of DPI functions with $display like behavior. See the test_regress/t/t_dpi_display.v file for an example. +Same as C in configuration files, see L +for more information. + =item /*verilator split_var*/ Attached to a variable or a net declaration. It breaks the variable into @@ -5078,7 +5249,7 @@ remain anonymous. The latest version is available from L. -Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify the Verilator internals under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/bin/verilator_coverage b/bin/verilator_coverage index 764e6b47f..13701b660 100755 --- a/bin/verilator_coverage +++ b/bin/verilator_coverage @@ -1,9 +1,7 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl ###################################################################### # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -271,7 +269,7 @@ Specifies a module search directory. The latest version is available from L. -Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify the Verilator internals under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/bin/verilator_difftree b/bin/verilator_difftree index e00ee6268..a7aab372b 100755 --- a/bin/verilator_difftree +++ b/bin/verilator_difftree @@ -1,10 +1,7 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; use warnings; use Getopt::Long; use IO::File; @@ -236,7 +233,7 @@ Do not show differences in line numbering. The latest version is available from L. -Copyright 2005-2019 by Wilson Snyder. This package is free software; you can +Copyright 2005-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/bin/verilator_gantt b/bin/verilator_gantt index f384828f0..252b98c9a 100755 --- a/bin/verilator_gantt +++ b/bin/verilator_gantt @@ -1,11 +1,9 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -use strict; use warnings; +use strict; use Getopt::Long; use IO::File; use Pod::Usage; @@ -540,7 +538,7 @@ verilator_gantt.vcd. The latest version is available from L. -Copyright 2018-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2018-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/bin/verilator_includer b/bin/verilator_includer index 45b8f1e5f..83e05f2ed 100755 --- a/bin/verilator_includer +++ b/bin/verilator_includer @@ -1,9 +1,7 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # DESCRIPTION: Print include statements for each ARGV # -# Copyright 2003-2019 by Wilson Snyder. This package is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This package is free software; you can # redistribute it and/or modify it under the terms of either the GNU Lesser # General Public License Version 3 or the Perl Artistic License Version 2.0. ###################################################################### diff --git a/bin/verilator_profcfunc b/bin/verilator_profcfunc index 1542d4b8f..85523163d 100755 --- a/bin/verilator_profcfunc +++ b/bin/verilator_profcfunc @@ -1,6 +1,4 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### @@ -230,7 +228,7 @@ Displays this message and program version and exits. The latest version is available from L. -Copyright 2007-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2007-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/ci/build_vcddiff.sh b/ci/build_vcddiff.sh old mode 100644 new mode 100755 index eefbf13cd..9a0e8b6da --- a/ci/build_vcddiff.sh +++ b/ci/build_vcddiff.sh @@ -11,8 +11,8 @@ set -e TMP_DIR=$(mktemp -d) -git -C ${TMP_DIR} clone https://github.com/veripool/vcddiff +git -C "${TMP_DIR}" clone https://github.com/veripool/vcddiff VCDDIFF_DIR=${TMP_DIR}/vcddiff -git -C ${VCDDIFF_DIR} checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c -make -C ${VCDDIFF_DIR} -sudo cp ${VCDDIFF_DIR}/vcddiff /usr/local/bin +git -C "${VCDDIFF_DIR}" checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c +make -C "${VCDDIFF_DIR}" +sudo cp "${VCDDIFF_DIR}/vcddiff" /usr/local/bin diff --git a/ci/docker/buildenv/Dockerfile b/ci/docker/buildenv/Dockerfile new file mode 100644 index 000000000..e634b300d --- /dev/null +++ b/ci/docker/buildenv/Dockerfile @@ -0,0 +1,57 @@ +# DESCRIPTION: Dockerfile for env to build and fully test Verilator +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +FROM ubuntu:18.04 + +RUN apt-get update \ + && DEBIAN_FRONTEND=noninteractive \ + apt-get install --no-install-recommends -y \ + autoconf=2.69-11 \ + bc=1.07.1-2 \ + bison=2:3.0.4.dfsg-1build1 \ + build-essential=12.4ubuntu1 \ + ca-certificates=20180409 \ + cmake=3.10.2-1ubuntu2.18.04.1 \ + flex=2.6.4-6 \ + gdb=8.1-0ubuntu3.2 \ + gcc-6=6.5.0-2ubuntu1~18.04 \ + gcc-5=5.5.0-12ubuntu1 \ + gcc-4.8=4.8.5-4ubuntu8 \ + git=1:2.17.1-1ubuntu0.5 \ + gtkwave=3.3.86-1 \ + g++-6=6.5.0-2ubuntu1~18.04 \ + g++-5=5.5.0-12ubuntu1 \ + g++-4.8=4.8.5-4ubuntu8 \ + libfl2=2.6.4-6 \ + libfl-dev=2.6.4-6 \ + numactl=2.0.11-2.1ubuntu0.1 \ + perl=5.26.1-6ubuntu0.3 \ + python3=3.6.7-1~18.04 \ + wget=1.19.4-1ubuntu2.2 \ + zlibc=0.9k-4.3 \ + zlib1g=1:1.2.11.dfsg-0ubuntu2 \ + zlib1g-dev=1:1.2.11.dfsg-0ubuntu2 \ + && apt-get clean \ + && rm -rf /var/lib/apt/lists/* + +WORKDIR /tmp + +COPY build-systemc.sh /tmp/ +RUN ./build-systemc.sh + +RUN cpan install -fi Unix::Processors Parallel::Forker Bit::Vector + +RUN git clone https://github.com/veripool/vcddiff.git && \ + make -C vcddiff && \ + cp -p vcddiff/vcddiff /usr/local/bin/vcddiff && \ + rm -rf vcddiff + +COPY build.sh /tmp/build.sh + +ENV VERILATOR_AUTHOR_SITE=1 + +ENTRYPOINT [ "/tmp/build.sh" ] diff --git a/ci/docker/buildenv/README.adoc b/ci/docker/buildenv/README.adoc new file mode 100644 index 000000000..edb3e2b5a --- /dev/null +++ b/ci/docker/buildenv/README.adoc @@ -0,0 +1,50 @@ += Verilator Build Environment + +This container is set up to compile and test a Verilator build based +on the following parameters: + +* Source repository (default: https://github.com/verilator/verilator) +* Source revision (default: master) +* GCC version (4.8.5, 5.5.0, 6.5.0, 7.4.0, default: 7.4.0) + +The container is published as `verilator/verilator-buildenv` on +https://hub.docker.com/repository/docker/verilator/verilator-buildenv[docker hub]. + +To run the basic build of current master: + + docker run -ti verilator/verilator-buildenv + +To also run tests: + + docker run -ti verilator/verilator-buildenv test + +Change the compiler: + + docker run -ti -e CC=gcc-4.8 -e CXX=g++-4.8 verilator/verilator-buildenv test + +The tests that involve gdb are not working due to security restrictions. +To run those too: + +.... +docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` -e CC=gcc-4.8 -e CXX=g++-4.8 --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test +.... + +You may want to avoid pushing your changes to a remote repository and +instead use a local working copy. You can mount the local working copy +path as a volume and use this as repo. Be careful, that it can only +use committed changes, so you may want to use a work-in-progress +commit or so. To build the current HEAD from top of a repository: + +.... +docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test +.... + +== Under the Hood + +To rebuild the image, simply run: + + docker build . + +It will build SystemC in all supported compiler variants to reduce the +impact on testing cycles. A build script will be the entrypoint to the +container that will perform a standard build and test procedure. diff --git a/ci/docker/buildenv/build-systemc.sh b/ci/docker/buildenv/build-systemc.sh new file mode 100755 index 000000000..ee4630977 --- /dev/null +++ b/ci/docker/buildenv/build-systemc.sh @@ -0,0 +1,29 @@ +#!/bin/bash -e +# DESCRIPTION: Build SystemC in Ubuntu 18.04 with different g++/gcc +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +build_variant () { + version=$($1 --version | grep gcc | awk '{print $4}') + mkdir "/usr/local/systemc-2.3.3-gcc$version" + mkdir build + cd build + ../configure --prefix="/usr/local/systemc-2.3.3-gcc$version" CC="$1" CXX="$2" LD="$2" + make -j + make install + cd .. + rm -r build +} + +wget https://www.accellera.org/images/downloads/standards/systemc/systemc-2.3.3.tar.gz +tar -xzf systemc-2.3.3.tar.gz +cd systemc-2.3.3 +build_variant gcc g++ +build_variant gcc-6 g++-6 +build_variant gcc-5 g++-5 +build_variant gcc-4.8 g++-4.8 +cd .. +rm -r systemc-2.3.3* diff --git a/ci/docker/buildenv/build.sh b/ci/docker/buildenv/build.sh new file mode 100755 index 000000000..e79f69f91 --- /dev/null +++ b/ci/docker/buildenv/build.sh @@ -0,0 +1,30 @@ +#!/bin/bash -e +# DESCRIPTION: Build Verilator (inside container) +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +: "${REPO:=https://github.com/verilator/verilator}" +: "${REV:=master}" +: "${CC:=gcc}" +: "${CXX:=g++}" + +GCCVERSION=$(${CC} --version | grep gcc | awk '{print $4}') + +export SYSTEMC_INCLUDE="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/include" +export SYSTEMC_LIBDIR="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/lib-linux64" +export LD_LIBRARY_PATH=${SYSTEMC_LIBDIR} + +SRCS=$PWD/verilator + +git clone "$REPO" "$SRCS" +cd "$SRCS" +git checkout "$REV" +autoconf +./configure --enable-longtests +make -j $(nproc) +if [ "${1:-''}" == "test" ]; then + make test +fi diff --git a/ci/docker/run/Dockerfile b/ci/docker/run/Dockerfile new file mode 100644 index 000000000..7f7995009 --- /dev/null +++ b/ci/docker/run/Dockerfile @@ -0,0 +1,47 @@ +# DESCRIPTION: Dockerfile for image to run Verilator inside +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +FROM ubuntu:18.04 + +RUN apt-get update \ + && apt-get install --no-install-recommends -y \ + autoconf=2.69-11 \ + bc=1.07.1-2 \ + bison=2:3.0.4.dfsg-1build1 \ + build-essential=12.4ubuntu1 \ + ca-certificates=20180409 \ + flex=2.6.4-6 \ + git=1:2.17.1-1ubuntu0.5 \ + libfl-dev=2.6.4-6 \ + perl=5.26.1-6ubuntu0.3 \ + python3=3.6.7-1~18.04 \ + && apt-get clean \ + && rm -rf /var/lib/apt/lists/* + +ARG REPO=https://github.com/verilator/verilator +ARG SOURCE_COMMIT=master + +WORKDIR /tmp + +# Add an exception for the linter, we want to cd here in one layer +# to reduce the number of layers (and thereby size). +# hadolint ignore=DL3003 +RUN git clone "${REPO}" verilator && \ + cd verilator && \ + git checkout "${SOURCE_COMMIT}" && \ + autoconf && \ + ./configure && \ + make -j "$(nproc)" && \ + make install && \ + cd .. && \ + rm -r verilator + +COPY verilator-wrap.sh /usr/local/bin/verilator-wrap.sh + +WORKDIR /work + +ENTRYPOINT [ "/usr/local/bin/verilator-wrap.sh" ] diff --git a/ci/docker/run/README.adoc b/ci/docker/run/README.adoc new file mode 100644 index 000000000..82793b878 --- /dev/null +++ b/ci/docker/run/README.adoc @@ -0,0 +1,49 @@ += Docker Container as Verilator executable + +This allows you to run Verilator easily as a docker image, e.g.: + + docker run -ti verilator/verilator:latest --version + +This is in particular useful to compare against older version or to +check when an issue was introduced. + +You will need to give it access to your files as a volume and fix the +user rights: + +.... +docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:latest --cc test.v +.... + +The caveat is that it can only access files below the current +directory then, a workaround is to adopt the volume and set +`-workdir`. + +There is a convenience script in this folder that wraps around the +docker calls: + + $ verilator-docker 3.922 --version + Verilator 3.922 2018-03-17 rev UNKNOWN_REV + +Finally, you can also work in the container by setting the entrypoint +(don't forget to mount a volume if you want your work persistent): + + docker run -ti --entrypoint /bin/bash verilator/verilator:latest + +The other files in this folder all for building the containers and to +store in them. You could use it to build Verilator at a specific +commit: + + docker build --build-arg SOURCE_COMMIT= . + +== Internals + +The Dockerfile is pretty straight-forward, it builds Verilator and +removes the tree after that to reduce the image size. It sets a +wrapper script (`verilator-wrap.sh`) as entrypoint. This script calls +Verilator but also copies the verilated runtime files to the `obj_dir` +or the `-Mdir` respectively. This allows the user to build the C++ +output with the matching runtime files. The wrapper patches the +generated Makefile accordingly. + +There is also a hook defined that is run by docker hub via automated +builds. diff --git a/ci/docker/run/hooks/build b/ci/docker/run/hooks/build new file mode 100644 index 000000000..5a6d609d5 --- /dev/null +++ b/ci/docker/run/hooks/build @@ -0,0 +1,9 @@ +#!/bin/bash +# DESCRIPTION: Docker hub hook to pass SOURCE_COMMIT +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0.FROM ubuntu:18.04 + +docker build --build-arg SOURCE_COMMIT=${SOURCE_COMMIT} -f $DOCKERFILE_PATH -t $IMAGE_NAME . diff --git a/ci/docker/run/verilator-docker b/ci/docker/run/verilator-docker new file mode 100755 index 000000000..ceb47df9f --- /dev/null +++ b/ci/docker/run/verilator-docker @@ -0,0 +1,10 @@ +#!/bin/bash +# DESCRIPTION: Wrap a verilator call to run a docker container +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +docker pull verilator/verilator:$1 >/dev/null +docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:$1 "${@:2}" diff --git a/ci/docker/run/verilator-wrap.sh b/ci/docker/run/verilator-wrap.sh new file mode 100755 index 000000000..69de6e768 --- /dev/null +++ b/ci/docker/run/verilator-wrap.sh @@ -0,0 +1,26 @@ +#!/bin/bash -e +# DESCRIPTION: Wrap a Verilator call and copy vlt includes +# (inside docker container) +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +perl /usr/local/bin/verilator "$@" + +# Check if user set an obj_dir +obj_dir=$(echo " $@" | grep -oP '\s--Mdir\s*\K\S+') +if [ "$obj_dir" == "" ]; then + obj_dir="obj_dir" +fi + +# If the run was successful: Copy required files to allow build without this container +if [ -e ${obj_dir} ]; then + # Copy files required for the build + mkdir -p ${obj_dir}/vlt + cp -r /usr/local/share/verilator/bin ${obj_dir}/vlt + cp -r /usr/local/share/verilator/include ${obj_dir}/vlt + # Point Makefile to that folder + perl -i -pe 's/VERILATOR_ROOT = \/usr\/local\/share\/verilator/VERILATOR_ROOT = vlt/g' ${obj_dir}/*.mk +fi diff --git a/configure.ac b/configure.ac index 2c178ac87..8004af5c4 100644 --- a/configure.ac +++ b/configure.ac @@ -1,12 +1,12 @@ # DESCRIPTION: Process this file with autoconf to produce a configure script. # -# Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +# Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can # redistribute it and/or modify it under the terms of either the GNU Lesser # General Public License Version 3 or the Perl Artistic License Version 2.0. #AC_INIT([Verilator],[#.### YYYY-MM-DD]) #AC_INIT([Verilator],[#.### devel]) -AC_INIT([Verilator],[4.025 devel], +AC_INIT([Verilator],[4.027 devel], [https://verilator.org], [verilator],[https://verilator.org]) # When releasing, also update header of Changes file diff --git a/docs/CONTRIBUTING.adoc b/docs/CONTRIBUTING.adoc index a0608cb5e..3bdc65084 100644 --- a/docs/CONTRIBUTING.adoc +++ b/docs/CONTRIBUTING.adoc @@ -24,8 +24,8 @@ contributions flow more efficiently. * Please https://verilator.org/issues/new[Open a new issue]. -* You may attach a patch to the issue, or (preferred) may point to a GitHub - repository branch within your GitHub account. +* You may attach a patch to the issue, or (preferred) may request a GitHub + pull request. ** Verilator uses Travis CI to provide continuous integration. You may want to setup Travis CI on your GitHub branch to ensure your changes diff --git a/docs/Makefile.in b/docs/Makefile.in index 5e8e85cd6..a2aa53a0c 100644 --- a/docs/Makefile.in +++ b/docs/Makefile.in @@ -7,7 +7,7 @@ # #***************************************************************************** # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/docs/TODO b/docs/TODO index f2c916480..72b7c13a1 100644 --- a/docs/TODO +++ b/docs/TODO @@ -1,6 +1,6 @@ // DESCRIPTION: Verilator: List of To Do issues. // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/docs/doxygen-mainpage b/docs/doxygen-mainpage index 877e82960..2d0c282a3 100644 --- a/docs/doxygen-mainpage +++ b/docs/doxygen-mainpage @@ -3,4 +3,4 @@ * \section intro_sec Introduction * * This is a full doxygen analysis of the Verilator source tree. - */ \ No newline at end of file + */ diff --git a/docs/install.adoc b/docs/install.adoc index 804cdd411..fb785878b 100644 --- a/docs/install.adoc +++ b/docs/install.adoc @@ -21,9 +21,14 @@ Git, below, maybe a better alternative.) To install as a package: If this works, skip down to <>. +=== Docker + +Verilator is available in pre-built Docker containers. See +https://github.com/verilator/verilator/blob/master/ci/docker/run/README.adoc + === Git -Alternatively, installing Verilator with Git provides the most flexibility. +Installing Verilator with Git provides the most flexibility. For additional options and details see the additional sections below. In brief: @@ -96,11 +101,11 @@ Those developing Verilator may also want these (see internals.adoc): ==== Install SystemC If you will be using SystemC (vs straight C++ output), download -http://www.systemc.org[SystemC]. Follow their installation instructions. -You will need to set `SYSTEMC_INCLUDE` to point to the include directory -with systemc.h in it, and `SYSTEMC_LIBDIR` to points to the directory with -libsystemc.a in it. (Older installations may set `SYSTEMC` and -`SYSTEMC_ARCH` instead.) +https://www.accellera.org/downloads/standards/systemc[SystemC]. +Follow their installation instructions. You will need to set `SYSTEMC_INCLUDE` +to point to the include directory with `systemc.h` in it, and `SYSTEMC_LIBDIR` +to points to the directory with `libsystemc.a` in it. (Older installations +may set `SYSTEMC` and `SYSTEMC_ARCH` instead.) ==== Install GTKWave @@ -289,6 +294,6 @@ or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)]. == License -Copyright 2008-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2008-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/docs/internals.adoc b/docs/internals.adoc index 0880e5ce0..3a8550200 100644 --- a/docs/internals.adoc +++ b/docs/internals.adoc @@ -382,6 +382,13 @@ changed; if clear, checking those signals for changes may be skipped. == Coding Conventions +=== Compiler Version and C++11 + +Verilator supports GCC 4.4.7 and newer. GCC 4.4.7 does not support C++11, +therefore C++11 is generally not required. Exceptions may be made to +require C++11 for features that are only practical with C++11, +e.g. threads. + === Indentation and Naming Style We will work with contributors to fix up indentation style issues, but it @@ -973,6 +980,6 @@ list in `src/Makefile_obj.in` and reconfigure. == Distribution -Copyright 2008-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2008-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/examples/cmake_hello_c/CMakeLists.txt b/examples/cmake_hello_c/CMakeLists.txt index a3b45036c..82c4707ff 100644 --- a/examples/cmake_hello_c/CMakeLists.txt +++ b/examples/cmake_hello_c/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to systemc project # using cmake and verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_hello_c/Makefile b/examples/cmake_hello_c/Makefile index 8c0b5ed24..769c4896f 100644 --- a/examples/cmake_hello_c/Makefile +++ b/examples/cmake_hello_c/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_hello_sc/CMakeLists.txt b/examples/cmake_hello_sc/CMakeLists.txt index 3aa7d6714..7ee97f3da 100644 --- a/examples/cmake_hello_sc/CMakeLists.txt +++ b/examples/cmake_hello_sc/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to SystemC project # using CMake and Verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_hello_sc/Makefile b/examples/cmake_hello_sc/Makefile index 3e5cb375b..5d652762a 100644 --- a/examples/cmake_hello_sc/Makefile +++ b/examples/cmake_hello_sc/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_protect_lib/CMakeLists.txt b/examples/cmake_protect_lib/CMakeLists.txt index 7031eb1c7..d08888b93 100644 --- a/examples/cmake_protect_lib/CMakeLists.txt +++ b/examples/cmake_protect_lib/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to systemc project # using cmake and verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_protect_lib/Makefile b/examples/cmake_protect_lib/Makefile index a3d3575a6..95132f76c 100644 --- a/examples/cmake_protect_lib/Makefile +++ b/examples/cmake_protect_lib/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_tracing_c/CMakeLists.txt b/examples/cmake_tracing_c/CMakeLists.txt index d0275e9f6..ab5236b3c 100644 --- a/examples/cmake_tracing_c/CMakeLists.txt +++ b/examples/cmake_tracing_c/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to systemc project # using cmake and verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_tracing_c/Makefile b/examples/cmake_tracing_c/Makefile index a6490a328..ef7f45ddf 100644 --- a/examples/cmake_tracing_c/Makefile +++ b/examples/cmake_tracing_c/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_tracing_sc/CMakeLists.txt b/examples/cmake_tracing_sc/CMakeLists.txt index 927d11b8f..f2490eb6c 100644 --- a/examples/cmake_tracing_sc/CMakeLists.txt +++ b/examples/cmake_tracing_sc/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to SystemC project # using CMake and Verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_tracing_sc/Makefile b/examples/cmake_tracing_sc/Makefile index 392cf53b4..6f3aad9e6 100644 --- a/examples/cmake_tracing_sc/Makefile +++ b/examples/cmake_tracing_sc/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_hello_c/Makefile b/examples/make_hello_c/Makefile index e1c969991..40939fb59 100644 --- a/examples/make_hello_c/Makefile +++ b/examples/make_hello_c/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_hello_sc/Makefile b/examples/make_hello_sc/Makefile index 10344d1a2..30506c69d 100644 --- a/examples/make_hello_sc/Makefile +++ b/examples/make_hello_sc/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_tracing_c/Makefile b/examples/make_tracing_c/Makefile index a4f1a2c37..f5a3b497e 100644 --- a/examples/make_tracing_c/Makefile +++ b/examples/make_tracing_c/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_tracing_c/Makefile_obj b/examples/make_tracing_c/Makefile_obj index c105301bb..c3eb5291d 100644 --- a/examples/make_tracing_c/Makefile_obj +++ b/examples/make_tracing_c/Makefile_obj @@ -5,7 +5,7 @@ # # This is executed in the object directory, and called by ../Makefile # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_tracing_sc/Makefile b/examples/make_tracing_sc/Makefile index 25ce7ddcc..e70053c53 100644 --- a/examples/make_tracing_sc/Makefile +++ b/examples/make_tracing_sc/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_tracing_sc/Makefile_obj b/examples/make_tracing_sc/Makefile_obj index 5ba2b3b87..7c52ba627 100644 --- a/examples/make_tracing_sc/Makefile_obj +++ b/examples/make_tracing_sc/Makefile_obj @@ -5,7 +5,7 @@ # # This is executed in the object directory, and called by ../Makefile # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/xml_py/Makefile b/examples/xml_py/Makefile index 44d681c05..e05a6f00d 100644 --- a/examples/xml_py/Makefile +++ b/examples/xml_py/Makefile @@ -2,7 +2,7 @@ # # DESCRIPTION: Verilator Example: XML tests # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/include/gtkwave/fstapi.c b/include/gtkwave/fstapi.c index c67cb6e4f..720116ba8 100644 --- a/include/gtkwave/fstapi.c +++ b/include/gtkwave/fstapi.c @@ -3010,7 +3010,7 @@ void fstWriterEmitValueChange32(void *ctx, fstHandle handle, uint32_t bits, uint32_t val) { char buf[32]; char *s = buf; - int i; + uint32_t i; for (i = 0; i < bits; ++i) { *s++ = '0' + ((val >> (bits - i - 1)) & 1); @@ -3021,7 +3021,7 @@ void fstWriterEmitValueChange64(void *ctx, fstHandle handle, uint32_t bits, uint64_t val) { char buf[64]; char *s = buf; - int i; + uint32_t i; for (i = 0; i < bits; ++i) { *s++ = '0' + ((val >> (bits - i - 1)) & 1); diff --git a/include/verilated.cpp b/include/verilated.cpp index d4f3783ff..14521d7b9 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. @@ -662,6 +662,7 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA case '@': { // Verilog/C++ string va_arg(ap, int); // # bits is ignored const std::string* cstrp = va_arg(ap, const std::string*); + if (width > cstrp->size()) output += std::string(width - cstrp->size(), ' '); output += *cstrp; break; } @@ -713,13 +714,17 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA output += charval; break; } - case 's': + case 's': { + std::string field; for (; lsb>=0; --lsb) { lsb = (lsb / 8) * 8; // Next digit IData charval = VL_BITRSHIFT_W(lwp, lsb) & 0xff; - output += (charval==0)?' ':charval; + field += (charval==0)?' ':charval; } + if (width > field.size()) output += std::string(width - field.size(), ' '); + output += field; break; + } case 'd': { // Signed decimal int digits; std::string append; @@ -1315,146 +1320,6 @@ IData VL_SSCANF_INX(int, const std::string& ld, const char* formatp, ...) VL_MT_ return got; } -void VL_WRITEMEM_Q(bool hex, int width, int depth, int array_lsb, int, - QData filename, const void* memp, IData start, - IData end) VL_MT_SAFE { - WData fnw[VL_WQ_WORDS_E]; VL_SET_WQ(fnw, filename); - return VL_WRITEMEM_W(hex, width, depth, array_lsb, VL_WQ_WORDS_E, fnw, memp, start, end); -} - -void VL_WRITEMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords, - WDataInP filenamep, const void* memp, IData start, - IData end) VL_MT_SAFE { - char filenamez[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1]; - _VL_VINT_TO_STRING(fnwords * VL_EDATASIZE, filenamez, filenamep); - std::string filenames(filenamez); - return VL_WRITEMEM_N(hex, width, depth, array_lsb, filenames, memp, start, end); -} - -const char* memhFormat(int nBits) { - assert((nBits >= 1) && (nBits <= 32)); - - static char buf[32]; - switch ((nBits - 1) / 4) { - case 0: VL_SNPRINTF(buf, 32, "%%01x"); break; - case 1: VL_SNPRINTF(buf, 32, "%%02x"); break; - case 2: VL_SNPRINTF(buf, 32, "%%03x"); break; - case 3: VL_SNPRINTF(buf, 32, "%%04x"); break; - case 4: VL_SNPRINTF(buf, 32, "%%05x"); break; - case 5: VL_SNPRINTF(buf, 32, "%%06x"); break; - case 6: VL_SNPRINTF(buf, 32, "%%07x"); break; - case 7: VL_SNPRINTF(buf, 32, "%%08x"); break; - default: assert(false); break; // LCOV_EXCL_LINE - } - return buf; -} - -void VL_WRITEMEM_N( - bool hex, // Hex format, else binary - int width, // Width of each array row - int depth, // Number of rows - int array_lsb, // Index of first row. Valid row addresses - // // range from array_lsb up to (array_lsb + depth - 1) - const std::string& filename, // Output file name - const void* memp, // Array state - IData start, // First array row address to write - IData end // Last address to write, or ~0 when not specified - ) VL_MT_SAFE { - if (VL_UNLIKELY(!hex)) { - VL_FATAL_MT(filename.c_str(), 0, "", - "VL_WRITEMEM_N only supports hex format for now, sorry!"); - return; - } - - // Calculate row address limits - size_t row_min = array_lsb; - size_t row_max = row_min + depth - 1; - - // Normalize the last address argument: ~0 => row_max - size_t nend = (end == ~0u) ? row_max : end; - - // Bounds check the write address range - if (VL_UNLIKELY((start < row_min) || (start > row_max) - || (nend < row_min) || (nend > row_max))) { - VL_FATAL_MT(filename.c_str(), 0, "", - "$writemem specified address out-of-bounds"); - return; - } - - if (VL_UNLIKELY(start > nend)) { - VL_FATAL_MT(filename.c_str(), 0, "", - "$writemem invalid address range"); - return; - } - - // Calculate row offset range - size_t row_start = start - row_min; - size_t row_end = nend - row_min; - - // Bail out on possible 32-bit size_t overflow - if (VL_UNLIKELY(row_end + 1 == 0)) { - VL_FATAL_MT(filename.c_str(), 0, "", "$writemem address is too large"); - return; - } - - FILE* fp = fopen(filename.c_str(), "w"); - if (VL_UNLIKELY(!fp)) { - VL_FATAL_MT(filename.c_str(), 0, "", "$writemem file not found"); - // cppcheck-suppress resourceLeak // fp is NULL - bug in cppcheck - return; - } - - for (size_t row_offset = row_start; row_offset <= row_end; ++row_offset) { - if (width <= 8) { - const CData* datap - = &(reinterpret_cast(memp))[row_offset]; - fprintf(fp, memhFormat(width), VL_MASK_I(width) & *datap); - fprintf(fp, "\n"); - } else if (width <= 16) { - const SData* datap - = &(reinterpret_cast(memp))[row_offset]; - fprintf(fp, memhFormat(width), VL_MASK_I(width) & *datap); - fprintf(fp, "\n"); - } else if (width <= 32) { - const IData* datap - = &(reinterpret_cast(memp))[row_offset]; - fprintf(fp, memhFormat(width), VL_MASK_I(width) & *datap); - fprintf(fp, "\n"); - } else if (width <= 64) { - const QData* datap - = &(reinterpret_cast(memp))[row_offset]; - vluint64_t value = VL_MASK_Q(width) & *datap; - vluint32_t lo = value & 0xffffffff; - vluint32_t hi = value >> 32; - fprintf(fp, memhFormat(width - 32), hi); - fprintf(fp, "%08x\n", lo); - } else { - WDataInP memDatap = reinterpret_cast(memp); - WDataInP datap = &memDatap[row_offset * VL_WORDS_I(width)]; - // output as a sequence of VL_EDATASIZE'd words - // from MSB to LSB. Mask off the MSB word which could - // contain junk above the top of valid data. - int word_idx = ((width - 1) / VL_EDATASIZE); - bool first = true; - while (word_idx >= 0) { - EData data = datap[word_idx]; - if (first) { - data &= VL_MASK_E(width); - int top_word_nbits = ((width - 1) & (VL_EDATASIZE - 1)) + 1; - fprintf(fp, memhFormat(top_word_nbits), data); - } else { - fprintf(fp, "%08x", data); - } - word_idx--; - first = false; - } - fprintf(fp, "\n"); - } - } - - fclose(fp); -} - IData VL_FREAD_I(int width, int array_lsb, int array_size, void* memp, IData fpi, IData start, IData count) VL_MT_SAFE { // While threadsafe, each thread can only access different file handles @@ -1464,14 +1329,14 @@ IData VL_FREAD_I(int width, int array_lsb, int array_size, // Prep for reading IData read_count = 0; IData read_elements = 0; - int start_shift = (width-1) & ~7; // bit+7:bit gets first character + int start_shift = (width - 1) & ~7; // bit+7:bit gets first character int shift = start_shift; // Read the data // We process a character at a time, as then we don't need to deal // with changing buffer sizes dynamically, etc. while (1) { int c = fgetc(fp); - if (VL_UNLIKELY(c==EOF)) break; + if (VL_UNLIKELY(c == EOF)) break; // Shift value in IData entry = read_elements + start - array_lsb; if (width <= 8) { @@ -1508,144 +1373,6 @@ IData VL_FREAD_I(int width, int array_lsb, int array_size, return read_count; } -void VL_READMEM_Q(bool hex, int width, int depth, int array_lsb, int, - QData filename, void* memp, IData start, IData end) VL_MT_SAFE { - WData fnw[VL_WQ_WORDS_E]; VL_SET_WQ(fnw, filename); - return VL_READMEM_W(hex, width, depth, array_lsb, VL_WQ_WORDS_E, fnw, memp, start, end); -} - -void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords, - WDataInP filenamep, void* memp, IData start, IData end) VL_MT_SAFE { - char filenamez[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1]; - _VL_VINT_TO_STRING(fnwords * VL_EDATASIZE, filenamez, filenamep); - std::string filenames(filenamez); - return VL_READMEM_N(hex, width, depth, array_lsb, filenames, memp, start, end); -} - -void VL_READMEM_N( - bool hex, // Hex format, else binary - int width, // Width of each array row - int depth, // Number of rows - int array_lsb, // Index of first row. Valid row addresses - // // range from array_lsb up to (array_lsb + depth - 1) - const std::string& filename, // Input file name - void* memp, // Array state - IData start, // First array row address to read - IData end // Last row address to read - ) VL_MT_SAFE { - FILE* fp = fopen(filename.c_str(), "r"); - if (VL_UNLIKELY(!fp)) { - // We don't report the Verilog source filename as it slow to have to pass it down - VL_FATAL_MT(filename.c_str(), 0, "", "$readmem file not found"); - // cppcheck-suppress resourceLeak // fp is NULL - bug in cppcheck - return; - } - // Prep for reading - IData addr = start; - int linenum = 1; - bool innum = false; - bool ignore_to_eol = false; - bool ignore_to_cmt = false; - bool needinc = false; - bool reading_addr = false; - int lastc = ' '; - // Read the data - // We process a character at a time, as then we don't need to deal - // with changing buffer sizes dynamically, etc. - while (1) { - int c = fgetc(fp); - if (VL_UNLIKELY(c==EOF)) break; - //printf("%d: Got '%c' Addr%x IN%d IgE%d IgC%d ninc%d\n", - // linenum, c, addr, innum, ignore_to_eol, ignore_to_cmt, needinc); - if (c=='\n') { - linenum++; ignore_to_eol = false; - if (innum) reading_addr = false; - innum = false; - } - else if (c=='\t' || c==' ' || c=='\r' || c=='\f') { - if (innum) reading_addr = false; - innum = false; - } - // Skip // comments and detect /* comments - else if (ignore_to_cmt && lastc=='*' && c=='/') { - ignore_to_cmt = false; if (innum) reading_addr=false; innum=false; - } else if (!ignore_to_eol && !ignore_to_cmt) { - if (lastc=='/' && c=='*') { ignore_to_cmt = true; } - else if (lastc=='/' && c=='/') { ignore_to_eol = true; } - else if (c=='/') {} // Part of /* or // - else if (c=='#') { ignore_to_eol = true; } - else if (c=='_') {} - else if (c=='@') { reading_addr = true; innum=false; needinc=false; } - // Check for hex or binary digits as file format requests - else if (isxdigit(c) || (!reading_addr && (c=='x' || c=='X'))) { - c = tolower(c); - int value = (c >= 'a' ? (c=='x' ? VL_RAND_RESET_I(4) : (c-'a'+10)) : (c-'0')); - if (!innum) { // Prep for next number - if (needinc) { addr++; needinc=false; } - } - if (reading_addr) { - // Decode @ addresses - if (!innum) addr=0; - addr = (addr<<4) + value; - } else { - needinc = true; - //printf(" Value width=%d @%x = %c\n", width, addr, c); - if (VL_UNLIKELY(addr >= static_cast(depth+array_lsb) - || addr < static_cast(array_lsb))) { - VL_FATAL_MT(filename.c_str(), linenum, "", - "$readmem file address beyond bounds of array"); - } else { - int entry = addr - array_lsb; - QData shift = hex ? VL_ULL(4) : VL_ULL(1); - // Shift value in - if (width<=8) { - CData* datap = &(reinterpret_cast(memp))[entry]; - if (!innum) { *datap = 0; } - *datap = ((*datap << shift) + value) & VL_MASK_I(width); - } else if (width<=16) { - SData* datap = &(reinterpret_cast(memp))[entry]; - if (!innum) { *datap = 0; } - *datap = ((*datap << shift) + value) & VL_MASK_I(width); - } else if (width <= VL_IDATASIZE) { - IData* datap = &(reinterpret_cast(memp))[entry]; - if (!innum) { *datap = 0; } - *datap = ((*datap << shift) + value) & VL_MASK_I(width); - } else if (width<=VL_QUADSIZE) { - QData* datap = &(reinterpret_cast(memp))[entry]; - if (!innum) { *datap = 0; } - *datap = ((*datap << static_cast(shift)) - + static_cast(value)) & VL_MASK_Q(width); - } else { - WDataOutP datap = &(reinterpret_cast(memp)) - [ entry*VL_WORDS_I(width) ]; - if (!innum) { VL_ZERO_RESET_W(width, datap); } - _VL_SHIFTL_INPLACE_W(width, datap, static_cast(shift)); - datap[0] |= value; - } - if (VL_UNLIKELY(value>=(1<(v); } +//=========================================================================== +// Readmem/writemem + +static const char* memhFormat(int nBits) { + assert((nBits >= 1) && (nBits <= 32)); + + static char buf[32]; + switch ((nBits - 1) / 4) { + case 0: VL_SNPRINTF(buf, 32, "%%01x"); break; + case 1: VL_SNPRINTF(buf, 32, "%%02x"); break; + case 2: VL_SNPRINTF(buf, 32, "%%03x"); break; + case 3: VL_SNPRINTF(buf, 32, "%%04x"); break; + case 4: VL_SNPRINTF(buf, 32, "%%05x"); break; + case 5: VL_SNPRINTF(buf, 32, "%%06x"); break; + case 6: VL_SNPRINTF(buf, 32, "%%07x"); break; + case 7: VL_SNPRINTF(buf, 32, "%%08x"); break; + default: assert(false); break; // LCOV_EXCL_LINE + } + return buf; +} + +VlReadMem::VlReadMem(bool hex, int bits, const std::string& filename, QData start, QData end) + : m_hex(hex) + , m_bits(bits) + , m_filename(filename) + , m_end(end) + , m_addr(start) + , m_linenum(0) { + m_fp = fopen(filename.c_str(), "r"); + if (VL_UNLIKELY(!m_fp)) { + // We don't report the Verilog source filename as it slow to have to pass it down + VL_FATAL_MT(filename.c_str(), 0, "", "$readmem file not found"); + // cppcheck-suppress resourceLeak // m_fp is NULL - bug in cppcheck + return; + } +} +VlReadMem::~VlReadMem() { + if (m_fp) { fclose(m_fp); m_fp = NULL; } +} +bool VlReadMem::get(QData& addrr, std::string& valuer) { + if (VL_UNLIKELY(!m_fp)) return false; + valuer = ""; + // Prep for reading + bool indata = false; + bool ignore_to_eol = false; + bool ignore_to_cmt = false; + bool reading_addr = false; + int lastc = ' '; + // Read the data + // We process a character at a time, as then we don't need to deal + // with changing buffer sizes dynamically, etc. + while (1) { + int c = fgetc(m_fp); + if (VL_UNLIKELY(c == EOF)) break; + // printf("%d: Got '%c' Addr%lx IN%d IgE%d IgC%d\n", + // m_linenum, c, m_addr, indata, ignore_to_eol, ignore_to_cmt); + // See if previous data value has completed, and if so return + if (c == '_') continue; // Ignore _ e.g. inside a number + if (indata && !isxdigit(c) && c != 'x' && c != 'X') { + // printf("Got data @%lx = %s\n", m_addr, valuer.c_str()); + indata = false; + ungetc(c, m_fp); + addrr = m_addr; + ++m_addr; + return true; + } + // Parse line + if (c == '\n') { + ++m_linenum; ignore_to_eol = false; + reading_addr = false; + } else if (c == '\t' || c == ' ' || c == '\r' || c == '\f') { + reading_addr = false; + } + // Skip // comments and detect /* comments + else if (ignore_to_cmt && lastc == '*' && c == '/') { + ignore_to_cmt = false; + reading_addr = false; + } else if (!ignore_to_eol && !ignore_to_cmt) { + if (lastc == '/' && c == '*') { ignore_to_cmt = true; } + else if (lastc == '/' && c == '/') { ignore_to_eol = true; } + else if (c == '/') {} // Part of /* or // + else if (c == '#') { ignore_to_eol = true; } + else if (c == '@') { reading_addr = true; m_addr = 0; } + // Check for hex or binary digits as file format requests + else if (isxdigit(c) || (!reading_addr && (c == 'x' || c == 'X'))) { + c = tolower(c); + int value = (c >= 'a' ? (c == 'x' ? VL_RAND_RESET_I(4) : (c-'a'+10)) : (c-'0')); + if (reading_addr) { + // Decode @ addresses + m_addr = (m_addr << 4) + value; + } else { + indata = true; + valuer += c; + // printf(" Value width=%d @%x = %c\n", width, m_addr, c); + if (VL_UNLIKELY(value > 1 && !m_hex)) { + VL_FATAL_MT(m_filename.c_str(), m_linenum, "", + "$readmemb (binary) file contains hex characters"); + } + } + } else { + VL_FATAL_MT(m_filename.c_str(), m_linenum, "", "$readmem file syntax error"); + } + } + lastc = c; + } + + if (VL_UNLIKELY(m_end != ~VL_ULL(0) && m_addr <= m_end)) { + VL_FATAL_MT(m_filename.c_str(), m_linenum, "", + "$readmem file ended before specified final address (IEEE 2017 21.4)"); + } + + return false; // EOF +} +void VlReadMem::setData(void* valuep, const std::string& rhs) { + QData shift = m_hex ? VL_ULL(4) : VL_ULL(1); + bool innum = false; + // Shift value in + for (std::string::const_iterator it = rhs.begin(); it != rhs.end(); ++it) { + char c = tolower(*it); + int value = (c >= 'a' ? (c == 'x' ? VL_RAND_RESET_I(4) : (c - 'a' + 10)) : (c - '0')); + if (m_bits <= 8) { + CData* datap = reinterpret_cast(valuep); + if (!innum) { *datap = 0; } + *datap = ((*datap << shift) + value) & VL_MASK_I(m_bits); + } else if (m_bits <= 16) { + SData* datap = reinterpret_cast(valuep); + if (!innum) { *datap = 0; } + *datap = ((*datap << shift) + value) & VL_MASK_I(m_bits); + } else if (m_bits <= VL_IDATASIZE) { + IData* datap = reinterpret_cast(valuep); + if (!innum) { *datap = 0; } + *datap = ((*datap << shift) + value) & VL_MASK_I(m_bits); + } else if (m_bits <= VL_QUADSIZE) { + QData* datap = reinterpret_cast(valuep); + if (!innum) { *datap = 0; } + *datap = ((*datap << static_cast(shift)) + static_cast(value)) + & VL_MASK_Q(m_bits); + } else { + WDataOutP datap = reinterpret_cast(valuep); + if (!innum) { VL_ZERO_RESET_W(m_bits, datap); } + _VL_SHIFTL_INPLACE_W(m_bits, datap, static_cast(shift)); + datap[0] |= value; + } + innum = true; + } +} + +VlWriteMem::VlWriteMem(bool hex, int bits, const std::string& filename, QData start, QData end) + : m_hex(hex) + , m_bits(bits) + , m_filename(filename) + , m_addr(0) { + if (VL_UNLIKELY(!hex)) { + VL_FATAL_MT(filename.c_str(), 0, "", + "Unsupported: $writemem binary format (suggest hex format)"); + return; + } + + if (VL_UNLIKELY(start > end)) { + VL_FATAL_MT(filename.c_str(), 0, "", "$writemem invalid address range"); + return; + } + + m_fp = fopen(filename.c_str(), "w"); + if (VL_UNLIKELY(!m_fp)) { + VL_FATAL_MT(filename.c_str(), 0, "", "$writemem file not found"); + // cppcheck-suppress resourceLeak // m_fp is NULL - bug in cppcheck + return; + } +} +VlWriteMem::~VlWriteMem() { + if (m_fp) { fclose(m_fp); m_fp = NULL; } +} +void VlWriteMem::print(QData addr, bool addrstamp, const void* valuep) { + if (VL_UNLIKELY(!m_fp)) return; + if (addr != m_addr && addrstamp) { // Only assoc has time stamps + fprintf(m_fp, "@%" VL_PRI64 "x\n", addr); + } + m_addr = addr + 1; + if (m_bits <= 8) { + const CData* datap = reinterpret_cast(valuep); + fprintf(m_fp, memhFormat(m_bits), VL_MASK_I(m_bits) & *datap); + fprintf(m_fp, "\n"); + } else if (m_bits <= 16) { + const SData* datap = reinterpret_cast(valuep); + fprintf(m_fp, memhFormat(m_bits), VL_MASK_I(m_bits) & *datap); + fprintf(m_fp, "\n"); + } else if (m_bits <= 32) { + const IData* datap = reinterpret_cast(valuep); + fprintf(m_fp, memhFormat(m_bits), VL_MASK_I(m_bits) & *datap); + fprintf(m_fp, "\n"); + } else if (m_bits <= 64) { + const QData* datap = reinterpret_cast(valuep); + vluint64_t value = VL_MASK_Q(m_bits) & *datap; + vluint32_t lo = value & 0xffffffff; + vluint32_t hi = value >> 32; + fprintf(m_fp, memhFormat(m_bits - 32), hi); + fprintf(m_fp, "%08x\n", lo); + } else { + WDataInP datap = reinterpret_cast(valuep); + // output as a sequence of VL_EDATASIZE'd words + // from MSB to LSB. Mask off the MSB word which could + // contain junk above the top of valid data. + int word_idx = ((m_bits - 1) / VL_EDATASIZE); + bool first = true; + while (word_idx >= 0) { + EData data = datap[word_idx]; + if (first) { + data &= VL_MASK_E(m_bits); + int top_word_nbits = VL_BITBIT_E(m_bits - 1) + 1; + fprintf(m_fp, memhFormat(top_word_nbits), data); + } else { + fprintf(m_fp, "%08x", data); + } + word_idx--; + first = false; + } + fprintf(m_fp, "\n"); + } +} + +void VL_READMEM_N(bool hex, // Hex format, else binary + int bits, // M_Bits of each array row + QData depth, // Number of rows + int array_lsb, // Index of first row. Valid row addresses + // // range from array_lsb up to (array_lsb + depth - 1) + const std::string& filename, // Input file name + void* memp, // Array state + QData start, // First array row address to read + QData end // Last row address to read + ) VL_MT_SAFE { + QData addr_max = array_lsb + depth - 1; + if (start < array_lsb) start = array_lsb; + QData addr_end = end; + if (addr_end > addr_max) addr_end = addr_max; + + VlReadMem rmem(hex, bits, filename, start, end); + if (VL_UNLIKELY(!rmem.isOpen())) return; + while (1) { + QData addr; + std::string value; + if (rmem.get(addr /*ref*/, value/*ref*/)) { + if (VL_UNLIKELY(addr < static_cast(array_lsb) + || addr >= static_cast(array_lsb + depth))) { + VL_FATAL_MT(filename.c_str(), rmem.linenum(), "", + "$readmem file address beyond bounds of array"); + } else { + QData entry = addr - array_lsb; + if (bits <= 8) { + CData* datap = &(reinterpret_cast(memp))[entry]; + rmem.setData(datap, value); + } else if (bits <= 16) { + SData* datap = &(reinterpret_cast(memp))[entry]; + rmem.setData(datap, value); + } else if (bits <= VL_IDATASIZE) { + IData* datap = &(reinterpret_cast(memp))[entry]; + rmem.setData(datap, value); + } else if (bits <= VL_QUADSIZE) { + QData* datap = &(reinterpret_cast(memp))[entry]; + rmem.setData(datap, value); + } else { + WDataOutP datap = &(reinterpret_cast(memp)) + [ entry*VL_WORDS_I(bits) ]; + rmem.setData(datap, value); + } + } + } else { + break; + } + } +} + +void VL_WRITEMEM_N(bool hex, // Hex format, else binary + int bits, // Width of each array row + QData depth, // Number of rows + int array_lsb, // Index of first row. Valid row addresses + // // range from array_lsb up to (array_lsb + depth - 1) + const std::string& filename, // Output file name + const void* memp, // Array state + QData start, // First array row address to write + QData end // Last address to write, or ~0 when not specified + ) VL_MT_SAFE { + QData addr_max = array_lsb + depth - 1; + if (start < array_lsb) start = array_lsb; + if (end > addr_max) end = addr_max; + + VlWriteMem wmem(hex, bits, filename, start, end); + if (VL_UNLIKELY(!wmem.isOpen())) return; + + for (QData addr = start; addr <= end; ++addr) { + QData row_offset = addr - array_lsb; + if (bits <= 8) { + const CData* datap = &(reinterpret_cast(memp))[row_offset]; + wmem.print(addr, false, datap); + } else if (bits <= 16) { + const SData* datap = &(reinterpret_cast(memp))[row_offset]; + wmem.print(addr, false, datap); + } else if (bits <= 32) { + const IData* datap = &(reinterpret_cast(memp))[row_offset]; + wmem.print(addr, false, datap); + } else if (bits <= 64) { + const QData* datap = &(reinterpret_cast(memp))[row_offset]; + wmem.print(addr, false, datap); + } else { + WDataInP memDatap = reinterpret_cast(memp); + WDataInP datap = &memDatap[row_offset * VL_WORDS_I(bits)]; + wmem.print(addr, false, datap); + } + } +} + //=========================================================================== // Timescale conversion diff --git a/include/verilated.h b/include/verilated.h index e895362b6..3c0b0f9d4 100644 --- a/include/verilated.h +++ b/include/verilated.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. @@ -630,22 +630,6 @@ extern void VL_FCLOSE_I(IData fdi); extern IData VL_FREAD_I(int width, int array_lsb, int array_size, void* memp, IData fpi, IData start, IData count); -extern void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords, - WDataInP filenamep, void* memp, IData start, IData end); -extern void VL_READMEM_Q(bool hex, int width, int depth, int array_lsb, int fnwords, - QData filename, void* memp, IData start, IData end); -inline void VL_READMEM_I(bool hex, int width, int depth, int array_lsb, int fnwords, - IData filename, void* memp, IData start, IData end) VL_MT_SAFE { - VL_READMEM_Q(hex, width, depth, array_lsb, fnwords, filename, memp, start, end); } - -extern void VL_WRITEMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords, - WDataInP filenamep, const void* memp, IData start, IData end); -extern void VL_WRITEMEM_Q(bool hex, int width, int depth, int array_lsb, int fnwords, - QData filename, const void* memp, IData start, IData end); -inline void VL_WRITEMEM_I(bool hex, int width, int depth, int array_lsb, int fnwords, - IData filename, const void* memp, IData start, IData end) VL_MT_SAFE { - VL_WRITEMEM_Q(hex, width, depth, array_lsb, fnwords, filename, memp, start, end); } - extern void VL_WRITEF(const char* formatp, ...); extern void VL_FWRITEF(IData fpi, const char* formatp, ...); diff --git a/include/verilated.mk.in b/include/verilated.mk.in index 612474582..e64de5e97 100644 --- a/include/verilated.mk.in +++ b/include/verilated.mk.in @@ -2,7 +2,7 @@ ###################################################################### # DESCRIPTION: Makefile commands for all verilated target files # -# Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +# Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can # redistribute it and/or modify it under the terms of either the GNU Lesser # General Public License Version 3 or the Perl Artistic License Version 2.0. ###################################################################### diff --git a/include/verilated.v b/include/verilated.v index 97cb6e677..ad51dcd99 100644 --- a/include/verilated.v +++ b/include/verilated.v @@ -4,7 +4,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_config.h.in b/include/verilated_config.h.in index a7f2e32c4..afc8d191c 100644 --- a/include/verilated_config.h.in +++ b/include/verilated_config.h.in @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_cov.cpp b/include/verilated_cov.cpp index 00aaf446c..2ea9351d4 100644 --- a/include/verilated_cov.cpp +++ b/include/verilated_cov.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_cov.h b/include/verilated_cov.h index 4e36ba25e..aff3e8c33 100644 --- a/include/verilated_cov.h +++ b/include/verilated_cov.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_cov_key.h b/include/verilated_cov_key.h index 41b2525ab..4fda5dda9 100644 --- a/include/verilated_cov_key.h +++ b/include/verilated_cov_key.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_dpi.cpp b/include/verilated_dpi.cpp index 2f70e91ea..a9da6866c 100644 --- a/include/verilated_dpi.cpp +++ b/include/verilated_dpi.cpp @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_dpi.h b/include/verilated_dpi.h index 66275f078..4edffc32b 100644 --- a/include/verilated_dpi.h +++ b/include/verilated_dpi.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp index 2c94e53ef..976e171e7 100644 --- a/include/verilated_fst_c.cpp +++ b/include/verilated_fst_c.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // @@ -118,7 +118,7 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, vluint32_t elem void VerilatedFst::declSymbol(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, vluint32_t len) { + bool array, int arraynum, vluint32_t len) { std::pair p = m_code2symbol.insert(std::make_pair(code, static_cast(NULL))); std::istringstream nameiss(name); @@ -153,8 +153,7 @@ void VerilatedFst::declSymbol(vluint32_t code, const char* name, std::stringstream name_ss; name_ss << symbol_name; - if (arraynum >= 0) - name_ss << "(" << arraynum << ")"; + if (array) name_ss << "(" << arraynum << ")"; std::string name_str = name_ss.str(); if (dtypenum > 0) { diff --git a/include/verilated_fst_c.h b/include/verilated_fst_c.h index 786ed6f7b..eda522554 100644 --- a/include/verilated_fst_c.h +++ b/include/verilated_fst_c.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // @@ -60,7 +60,7 @@ private: VL_UNCOPYABLE(VerilatedFst); void declSymbol(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, vluint32_t len); + bool array, int arraynum, vluint32_t len); // helpers std::vector m_valueStrBuffer; public: @@ -103,33 +103,33 @@ public: /// Inside dumping routines, declare a signal void declBit(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 1); + bool array, int arraynum) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 1); } void declBus(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, int msb, int lsb) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1); + bool array, int arraynum, int msb, int lsb) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1); } void declDouble(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 2); + bool array, int arraynum) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 2); } void declFloat(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 1); + bool array, int arraynum) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 1); } void declQuad(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, int msb, int lsb) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1); + bool array, int arraynum, int msb, int lsb) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1); } void declArray(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, int msb, int lsb) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1); + bool array, int arraynum, int msb, int lsb) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1); } /// Inside dumping routines, dump one signal if it has changed diff --git a/include/verilated_heavy.h b/include/verilated_heavy.h index 127b2b7fc..f1e61a185 100644 --- a/include/verilated_heavy.h +++ b/include/verilated_heavy.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2010-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2010-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. @@ -42,6 +42,40 @@ extern std::string VL_TO_STRING(SData obj); extern std::string VL_TO_STRING(IData obj); extern std::string VL_TO_STRING(QData obj); inline std::string VL_TO_STRING(const std::string& obj) { return "\"" + obj + "\""; } +extern std::string VL_TO_STRING_W(int words, WDataInP obj); + +//=================================================================== +// Readmem/Writemem operation classes + +class VlReadMem { + bool m_hex; // Hex format + int m_bits; // Bit width of values + const std::string& m_filename; // Filename + QData m_end; // End address (as specified by user) + FILE* m_fp; // File handle for filename + QData m_addr; // Next address to read + int m_linenum; // Line number last read from file +public: + VlReadMem(bool hex, int bits, const std::string& filename, QData start, QData end); + ~VlReadMem(); + bool isOpen() const { return m_fp != NULL; } + int linenum() const { return m_linenum; } + bool get(QData& addrr, std::string& valuer); + void setData(void* valuep, const std::string& rhs); +}; + +class VlWriteMem { + bool m_hex; // Hex format + int m_bits; // Bit width of values + const std::string& m_filename; // Filename + FILE* m_fp; // File handle for filename + QData m_addr; // Next address to write +public: + VlWriteMem(bool hex, int bits, const std::string& filename, QData start, QData end); + ~VlWriteMem(); + bool isOpen() const { return m_fp != NULL; } + void print(QData addr, bool addrstamp, const void* valuep); +}; //=================================================================== // Verilog array container @@ -72,6 +106,10 @@ VlWide& VL_CVT_W_A(WDataInP inp, const VlWide&) { return *((VlWide*)inp); } +template +std::string VL_TO_STRING(const VlWide& obj) { + return VL_TO_STRING_W(T_Words, obj.data()); +} //=================================================================== // Verilog associative array container @@ -180,6 +218,34 @@ std::string VL_TO_STRING(const VlAssocArray& obj) { return obj.to_string(); } +template +void VL_READMEM_N(bool hex, int bits, const std::string& filename, + VlAssocArray& obj, QData start, QData end) VL_MT_SAFE { + VlReadMem rmem(hex, bits, filename, start, end); + if (VL_UNLIKELY(!rmem.isOpen())) return; + while (1) { + QData addr; + std::string data; + if (rmem.get(addr /*ref*/, data /*ref*/)) { + rmem.setData(&(obj.at(addr)), data); + } else { + break; + } + } +} + +template +void VL_WRITEMEM_N(bool hex, int bits, const std::string& filename, + const VlAssocArray& obj, QData start, QData end) VL_MT_SAFE { + VlWriteMem wmem(hex, bits, filename, start, end); + if (VL_UNLIKELY(!wmem.isOpen())) return; + for (typename VlAssocArray::const_iterator it = obj.begin(); it != obj.end(); + ++it) { + QData addr = it->first; + if (addr >= start && addr <= end) wmem.print(addr, true, &(it->second)); + } +} + //=================================================================== // Verilog queue container // There are no multithreaded locks on this; the base variable must @@ -312,12 +378,12 @@ extern std::string VL_TOLOWER_NN(const std::string& ld); extern std::string VL_TOUPPER_NN(const std::string& ld); extern IData VL_FOPEN_NI(const std::string& filename, IData mode) VL_MT_SAFE; -extern void VL_READMEM_N(bool hex, int width, int depth, int array_lsb, - const std::string& filename, - void* memp, IData start, IData end) VL_MT_SAFE; -extern void VL_WRITEMEM_N(bool hex, int width, int depth, int array_lsb, - const std::string& filename, - const void* memp, IData start, IData end) VL_MT_SAFE; +extern void VL_READMEM_N(bool hex, int bits, QData depth, int array_lsb, + const std::string& filename, void* memp, QData start, + QData end) VL_MT_SAFE; +extern void VL_WRITEMEM_N(bool hex, int bits, QData depth, int array_lsb, + const std::string& filename, const void* memp, QData start, + QData end) VL_MT_SAFE; extern IData VL_SSCANF_INX(int lbits, const std::string& ld, const char* formatp, ...) VL_MT_SAFE; extern void VL_SFORMAT_X(int obits_ignored, std::string& output, diff --git a/include/verilated_imp.h b/include/verilated_imp.h index da8e50a10..0d55c4c36 100644 --- a/include/verilated_imp.h +++ b/include/verilated_imp.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_save.cpp b/include/verilated_save.cpp index 6e8aefbd0..965ab24e8 100644 --- a/include/verilated_save.cpp +++ b/include/verilated_save.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_save.h b/include/verilated_save.h index 4070bcf74..0d23f4ebc 100644 --- a/include/verilated_save.h +++ b/include/verilated_save.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2012-2019 by Wilson Snyder. This program is free software; +// Copyright 2012-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_sc.h b/include/verilated_sc.h index 54f86e737..a9e8dc42d 100644 --- a/include/verilated_sc.h +++ b/include/verilated_sc.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_sym_props.h b/include/verilated_sym_props.h index c8c92a7ce..373002660 100644 --- a/include/verilated_sym_props.h +++ b/include/verilated_sym_props.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_syms.h b/include/verilated_syms.h index a47edd617..4b3ffe028 100644 --- a/include/verilated_syms.h +++ b/include/verilated_syms.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_threads.cpp b/include/verilated_threads.cpp index d9ce2ad7c..1c5fda43b 100644 --- a/include/verilated_threads.cpp +++ b/include/verilated_threads.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2012-2019 by Wilson Snyder. This program is free software; +// Copyright 2012-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_threads.h b/include/verilated_threads.h index b5e4817d7..ae02e5df6 100644 --- a/include/verilated_threads.h +++ b/include/verilated_threads.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2012-2019 by Wilson Snyder. This program is free software; +// Copyright 2012-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_unordered_set_map.h b/include/verilated_unordered_set_map.h index d011ca647..4a3ed007f 100644 --- a/include/verilated_unordered_set_map.h +++ b/include/verilated_unordered_set_map.h @@ -7,7 +7,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp index ee245b665..42b930f05 100644 --- a/include/verilated_vcd_c.cpp +++ b/include/verilated_vcd_c.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // @@ -525,7 +525,7 @@ void VerilatedVcd::module(const std::string& name) { } void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep, - int arraynum, bool tri, bool bussed, int msb, int lsb) { + bool array, int arraynum, bool tri, bool bussed, int msb, int lsb) { if (!code) { VL_FATAL_MT(__FILE__, __LINE__, "", "Internal: internal trace problem, code 0 is illegal"); } @@ -584,7 +584,7 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep, } decl += " "; decl += basename; - if (arraynum>=0) { + if (array) { sprintf(buf, "(%d)", arraynum); decl += buf; hiername += buf; @@ -597,26 +597,42 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep, m_namemapp->insert(std::make_pair(hiername,decl)); } -void VerilatedVcd::declBit (vluint32_t code, const char* name, int arraynum) -{ declare(code, name, "wire", arraynum, false, false, 0, 0); } -void VerilatedVcd::declBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, false, true, msb, lsb); } -void VerilatedVcd::declQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, false, true, msb, lsb); } -void VerilatedVcd::declArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, false, true, msb, lsb); } -void VerilatedVcd::declTriBit (vluint32_t code, const char* name, int arraynum) -{ declare(code, name, "wire", arraynum, true, false, 0, 0); } -void VerilatedVcd::declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, true, true, msb, lsb); } -void VerilatedVcd::declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, true, true, msb, lsb); } -void VerilatedVcd::declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, true, true, msb, lsb); } -void VerilatedVcd::declFloat (vluint32_t code, const char* name, int arraynum) -{ declare(code, name, "real", arraynum, false, false, 31, 0); } -void VerilatedVcd::declDouble (vluint32_t code, const char* name, int arraynum) -{ declare(code, name, "real", arraynum, false, false, 63, 0); } +void VerilatedVcd::declBit(vluint32_t code, const char* name, bool array, int arraynum) { + declare(code, name, "wire", array, arraynum, false, false, 0, 0); +} +void VerilatedVcd::declBus(vluint32_t code, const char* name, bool array, int arraynum, int msb, + int lsb) { + declare(code, name, "wire", array, arraynum, false, true, msb, lsb); +} +void VerilatedVcd::declQuad(vluint32_t code, const char* name, bool array, int arraynum, int msb, + int lsb) { + declare(code, name, "wire", array, arraynum, false, true, msb, lsb); +} +void VerilatedVcd::declArray(vluint32_t code, const char* name, bool array, int arraynum, int msb, + int lsb) { + declare(code, name, "wire", array, arraynum, false, true, msb, lsb); +} +void VerilatedVcd::declTriBit(vluint32_t code, const char* name, bool array, int arraynum) { + declare(code, name, "wire", array, arraynum, true, false, 0, 0); +} +void VerilatedVcd::declTriBus(vluint32_t code, const char* name, bool array, int arraynum, int msb, + int lsb) { + declare(code, name, "wire", array, arraynum, true, true, msb, lsb); +} +void VerilatedVcd::declTriQuad(vluint32_t code, const char* name, bool array, int arraynum, + int msb, int lsb) { + declare(code, name, "wire", array, arraynum, true, true, msb, lsb); +} +void VerilatedVcd::declTriArray(vluint32_t code, const char* name, bool array, int arraynum, + int msb, int lsb) { + declare(code, name, "wire", array, arraynum, true, true, msb, lsb); +} +void VerilatedVcd::declFloat(vluint32_t code, const char* name, bool array, int arraynum) { + declare(code, name, "real", array, arraynum, false, false, 31, 0); +} +void VerilatedVcd::declDouble(vluint32_t code, const char* name, bool array, int arraynum) { + declare(code, name, "real", array, arraynum, false, false, 63, 0); +} //============================================================================= diff --git a/include/verilated_vcd_c.h b/include/verilated_vcd_c.h index 423d0ffbc..835af7b71 100644 --- a/include/verilated_vcd_c.h +++ b/include/verilated_vcd_c.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // @@ -125,8 +125,8 @@ private: void printStr(const char* str); void printQuad(vluint64_t n); void printTime(vluint64_t timeui); - void declare(vluint32_t code, const char* name, const char* wirep, - int arraynum, bool tri, bool bussed, int msb, int lsb); + void declare(vluint32_t code, const char* name, const char* wirep, bool array, int arraynum, + bool tri, bool bussed, int msb, int lsb); void dumpHeader(); void dumpPrep(vluint64_t timeui); @@ -201,16 +201,16 @@ public: /// Inside dumping routines, declare a module void module(const std::string& name); /// Inside dumping routines, declare a signal - void declBit (vluint32_t code, const char* name, int arraynum); - void declBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declTriBit (vluint32_t code, const char* name, int arraynum); - void declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declDouble (vluint32_t code, const char* name, int arraynum); - void declFloat (vluint32_t code, const char* name, int arraynum); + void declBit( vluint32_t code, const char* name, bool array, int arraynum); + void declBus( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declQuad( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declArray( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declTriBit( vluint32_t code, const char* name, bool array, int arraynum); + void declTriBus( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declTriQuad( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declTriArray(vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declDouble( vluint32_t code, const char* name, bool array, int arraynum); + void declFloat( vluint32_t code, const char* name, bool array, int arraynum); // ... other module_start for submodules (based on cell name) /// Inside dumping routines, dump one signal diff --git a/include/verilated_vcd_sc.cpp b/include/verilated_vcd_sc.cpp index bbbed11ac..7fc772648 100644 --- a/include/verilated_vcd_sc.cpp +++ b/include/verilated_vcd_sc.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_vcd_sc.h b/include/verilated_vcd_sc.h index 14e93886c..f5ab1efe1 100644 --- a/include/verilated_vcd_sc.h +++ b/include/verilated_vcd_sc.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp index 28fc11458..cd2ea7751 100644 --- a/include/verilated_vpi.cpp +++ b/include/verilated_vpi.cpp @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_vpi.h b/include/verilated_vpi.h index 0b23f3c32..0715cd18f 100644 --- a/include/verilated_vpi.h +++ b/include/verilated_vpi.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilatedos.h b/include/verilatedos.h index 00349af97..4a2f94f89 100644 --- a/include/verilatedos.h +++ b/include/verilatedos.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/nodist/bisondiff b/nodist/bisondiff index f5e1f9011..71120ee22 100755 --- a/nodist/bisondiff +++ b/nodist/bisondiff @@ -1,7 +1,7 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # -# Copyright 2007-2019 by Wilson Snyder. This package is free software; you +# Copyright 2007-2020 by Wilson Snyder. This package is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -15,6 +15,7 @@ # DESCRIPTION: Diff bison files +use warnings; use Getopt::Long; use IO::File; use strict; diff --git a/nodist/bisonreader b/nodist/bisonreader index d19079ac5..0ada7c788 100755 --- a/nodist/bisonreader +++ b/nodist/bisonreader @@ -1,7 +1,7 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # -# Copyright 2007-2019 by Wilson Snyder. This package is free software; you +# Copyright 2007-2020 by Wilson Snyder. This package is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -15,6 +15,7 @@ # DESCRIPTION: Debugging of bison output +use warnings; use strict; my $Debug; diff --git a/nodist/code_coverage b/nodist/code_coverage index 86b2f47b9..8a2b2b2c8 100755 --- a/nodist/code_coverage +++ b/nodist/code_coverage @@ -1,7 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### +use warnings; use Cwd; use File::Copy qw(cp); use File::Path qw(mkpath); @@ -242,7 +243,7 @@ Runs a specific stage (see the script). =head1 DISTRIBUTION -Copyright 2019-2019 by Wilson Snyder. This package is free software; you +Copyright 2019-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/code_coverage.dat b/nodist/code_coverage.dat index 35b67649f..b9046cba6 100644 --- a/nodist/code_coverage.dat +++ b/nodist/code_coverage.dat @@ -1,7 +1,7 @@ # -*- Perl -*- # DESCRIPTION: Verilator: Internal C++ code lcov control file # -# Copyright 2019-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2019-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/nodist/dot_importer b/nodist/dot_importer index 4da1cae7b..a63c2831c 100755 --- a/nodist/dot_importer +++ b/nodist/dot_importer @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; @@ -143,7 +143,7 @@ Displays this message and program version and exits. =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/dot_pruner b/nodist/dot_pruner index a3dca4d7b..9022b017f 100755 --- a/nodist/dot_pruner +++ b/nodist/dot_pruner @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; @@ -184,7 +184,7 @@ Displays this message and program version and exits. =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/flexdiff b/nodist/flexdiff index dfc96bf7e..963c8fdf8 100755 --- a/nodist/flexdiff +++ b/nodist/flexdiff @@ -1,7 +1,7 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # -# Copyright 2007-2019 by Wilson Snyder. This package is free software; you +# Copyright 2007-2020 by Wilson Snyder. This package is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -15,6 +15,7 @@ # DESCRIPTION: Diff flex files +use warnings; use IO::File; use strict; diff --git a/nodist/git_untabify b/nodist/git_untabify index c58922bbe..fc355b00b 100755 --- a/nodist/git_untabify +++ b/nodist/git_untabify @@ -1,7 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### +use warnings; use Getopt::Long; #use Data::Dumper; $Data::Dumper::Indent=1; $Data::Dumper::Sortkeys=1; #Debug use IO::File; @@ -235,7 +236,7 @@ Displays program version and exits. =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/install_test b/nodist/install_test index 74e99ec9c..4b4025219 100755 --- a/nodist/install_test +++ b/nodist/install_test @@ -1,7 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### +use warnings; use Getopt::Long; use Cwd; use IO::File; @@ -189,7 +190,7 @@ Runs a specific test stage (see the script). =head1 DISTRIBUTION -Copyright 2009-2019 by Wilson Snyder. This package is free software; you +Copyright 2009-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/invoke_atsim b/nodist/invoke_atsim index 9d46bf11c..41490042c 100755 --- a/nodist/invoke_atsim +++ b/nodist/invoke_atsim @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use strict; #====================================================================== @@ -28,7 +28,7 @@ invoke_atsim - Invoke tool under "modules" command =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. This package is free software; you +Copyright 2005-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/invoke_iccr b/nodist/invoke_iccr index 9aeb0276d..580dc7a72 100755 --- a/nodist/invoke_iccr +++ b/nodist/invoke_iccr @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use strict; #====================================================================== @@ -28,7 +28,7 @@ invoke_iccr - Invoke tool under "modules" command =head1 DISTRIBUTION -Copyright 2007-2019 by Wilson Snyder. This package is free software; you +Copyright 2007-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/invoke_ncverilog b/nodist/invoke_ncverilog index 2ed813d9b..ef2809c71 100755 --- a/nodist/invoke_ncverilog +++ b/nodist/invoke_ncverilog @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use strict; #====================================================================== @@ -28,7 +28,7 @@ invoke_ncverilog - Invoke tool under "modules" command =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. This package is free software; you +Copyright 2005-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/invoke_vcs b/nodist/invoke_vcs index d9e5c9c39..ceeaf25af 100755 --- a/nodist/invoke_vcs +++ b/nodist/invoke_vcs @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use strict; #====================================================================== @@ -28,7 +28,7 @@ invoke_vcs - Invoke tool under "modules" command =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. This package is free software; you +Copyright 2005-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/vtree_importer b/nodist/vtree_importer index f3d3ec336..652c114bd 100755 --- a/nodist/vtree_importer +++ b/nodist/vtree_importer @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; @@ -331,7 +331,7 @@ Displays this message and program version and exits. =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/src/.gdbinit b/src/.gdbinit index 793dab502..9bed7ea0c 100644 --- a/src/.gdbinit +++ b/src/.gdbinit @@ -1,6 +1,6 @@ # DESCRIPTION: Verilator: GDB startup file with useful defines # -# Copyright 2012-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2012-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/Makefile.in b/src/Makefile.in index c0532d5a0..ff0c685a2 100644 --- a/src/Makefile.in +++ b/src/Makefile.in @@ -7,7 +7,7 @@ # #***************************************************************************** # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in index 5a6014486..82476dcdf 100644 --- a/src/Makefile_obj.in +++ b/src/Makefile_obj.in @@ -7,7 +7,7 @@ # #***************************************************************************** # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/V3Active.cpp b/src/V3Active.cpp index 3c698a774..b93630a62 100644 --- a/src/V3Active.cpp +++ b/src/V3Active.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Active.h b/src/V3Active.h index f5562b703..070232665 100644 --- a/src/V3Active.h +++ b/src/V3Active.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ActiveTop.cpp b/src/V3ActiveTop.cpp index 55f268190..172691cd5 100644 --- a/src/V3ActiveTop.cpp +++ b/src/V3ActiveTop.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ActiveTop.h b/src/V3ActiveTop.h index bbbf1e721..9b4628de5 100644 --- a/src/V3ActiveTop.h +++ b/src/V3ActiveTop.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp index fc6fee602..3b00f4bf6 100644 --- a/src/V3Assert.cpp +++ b/src/V3Assert.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Assert.h b/src/V3Assert.h index b3e0f1a31..fa8f144c7 100644 --- a/src/V3Assert.h +++ b/src/V3Assert.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp index bc4f6bfd9..364010c7d 100644 --- a/src/V3AssertPre.cpp +++ b/src/V3AssertPre.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AssertPre.h b/src/V3AssertPre.h index 0c1cf7766..93e414fe6 100644 --- a/src/V3AssertPre.h +++ b/src/V3AssertPre.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp index cd2e2246c..3bc088946 100644 --- a/src/V3Ast.cpp +++ b/src/V3Ast.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -146,6 +146,9 @@ string AstNode::encodeNumber(vlsint64_t num) { string AstNode::nameProtect() const { return VIdProtect::protectIf(name(), protect()); } +string AstNode::origNameProtect() const { + return VIdProtect::protectIf(origName(), protect()); +} string AstNode::shortName() const { string pretty = name(); diff --git a/src/V3Ast.h b/src/V3Ast.h index 61d9b9b13..3d008dd57 100644 --- a/src/V3Ast.h +++ b/src/V3Ast.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -143,6 +143,9 @@ public: NO_INLINE_TASK, PUBLIC_MODULE, PUBLIC_TASK, + FULL_CASE, + PARALLEL_CASE, + ENUM_SIZE, SPLIT_VAR }; enum en m_e; @@ -1279,11 +1282,13 @@ public: // ACCESSORS virtual string name() const { return ""; } + virtual string origName() const { return ""; } virtual void name(const string& name) { this->v3fatalSrc("name() called on object without name() method"); } virtual void tag(const string& text) {} virtual string tag() const { return ""; } virtual string verilogKwd() const { return ""; } string nameProtect() const; // Name with --protect-id applied + string origNameProtect() const; // origName with --protect-id applied string shortName() const; // Name with __PVT__ removed for concatenating scopes static string dedotName(const string& namein); // Name with dots removed static string prettyName(const string& namein); // Name for printing out to the user @@ -2241,7 +2246,7 @@ public: void addActivep(AstNode* nodep) { addOp3p(nodep); } // ACCESSORS virtual void name(const string& name) { m_name = name; } - string origName() const { return m_origName; } + virtual string origName() const { return m_origName; } string hierName() const { return m_hierName; } void hierName(const string& hierName) { m_hierName = hierName; } bool inLibrary() const { return m_inLibrary; } diff --git a/src/V3AstConstOnly.h b/src/V3AstConstOnly.h index c7aa0b039..ae31294ed 100644 --- a/src/V3AstConstOnly.h +++ b/src/V3AstConstOnly.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index 1adc5be7d..367486b05 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 1bffff1ee..b0254ae52 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -245,6 +245,22 @@ public: AstRange* rangep() const { return VN_CAST(op2p(), Range); } // op2 = Range of pin }; +class AstClass : public AstNode { + // MEMBERS + string m_name; // Name +public: + AstClass(FileLine* fl, const string& name) + : AstNode(fl) + , m_name(name) {} + ASTNODE_NODE_FUNCS(Class) + virtual string name() const { return m_name; } // * = Var name + virtual void name(const string& name) { m_name = name; } + virtual string verilogKwd() const { return "class"; } + virtual bool maybePointedTo() const { return true; } + AstNode* membersp() const { return op1p(); } // op1 = List of statements + void addMembersp(AstNode* nodep) { addNOp1p(nodep); } +}; + //###################################################################### //==== Data Types @@ -685,6 +701,45 @@ public: virtual int widthTotalBytes() const { return subDTypep()->widthTotalBytes(); } }; +class AstClassRefDType : public AstNodeDType { + // Reference to a class +private: + AstClass* m_classp; // data type pointed to, BELOW the AstTypedef + AstPackage* m_packagep; // Package hierarchy +public: + AstClassRefDType(FileLine* fl, AstClass* classp) + : AstNodeDType(fl), m_classp(classp), m_packagep(NULL) { + dtypep(this); + } + ASTNODE_NODE_FUNCS(ClassRefDType) + // METHODS + virtual const char* broken() const { + BROKEN_RTN(m_classp && !m_classp->brokeExists()); return NULL; } + virtual void cloneRelink() { + if (m_classp && m_classp->clonep()) m_classp = m_classp->clonep(); + } + virtual bool same(const AstNode* samep) const { + const AstClassRefDType* asamep = static_cast(samep); + return (m_classp == asamep->m_classp + && m_packagep == asamep->m_packagep); } + virtual bool similarDType(AstNodeDType* samep) const { return this == samep; } + virtual V3Hash sameHash() const { return V3Hash(V3Hash(m_classp), V3Hash(m_packagep)); } + virtual string name() const { return classp() ? classp()->name() : ""; } + virtual AstBasicDType* basicp() const { return NULL; } + virtual AstNodeDType* skipRefp() const { return (AstNodeDType*)this; } + virtual AstNodeDType* skipRefToConstp() const { return (AstNodeDType*)this; } + virtual AstNodeDType* skipRefToEnump() const { return (AstNodeDType*)this; } + virtual int widthAlignBytes() const { return 0; } + virtual int widthTotalBytes() const { return 0; } + virtual AstNodeDType* virtRefDTypep() const { return NULL; } + virtual void virtRefDTypep(AstNodeDType* nodep) {} + virtual AstNodeDType* subDTypep() const { return NULL; } + AstPackage* packagep() const { return m_packagep; } + void packagep(AstPackage* nodep) { m_packagep = nodep; } + AstClass* classp() const { return m_classp; } + void classp(AstClass* nodep) { m_classp = nodep; } +}; + class AstIfaceRefDType : public AstNodeDType { // Reference to an interface, either for a port, or inside parent cell private: @@ -844,6 +899,7 @@ public: class AstStructDType : public AstNodeUOrStructDType { public: + // AstNumeric below is mispurposed to indicate if packed or not AstStructDType(FileLine* fl, AstNumeric numericUnpack) : AstNodeUOrStructDType(fl, numericUnpack) {} ASTNODE_NODE_FUNCS(StructDType) @@ -853,6 +909,7 @@ public: class AstUnionDType : public AstNodeUOrStructDType { public: //UNSUP: bool isTagged; + // AstNumeric below is mispurposed to indicate if packed or not AstUnionDType(FileLine* fl, AstNumeric numericUnpack) : AstNodeUOrStructDType(fl, numericUnpack) {} ASTNODE_NODE_FUNCS(UnionDType) @@ -1282,37 +1339,6 @@ public: void declRange(const VNumRange& flag) { m_declRange = flag; } }; -class AstMemberSel : public AstNodeMath { - // Parents: math|stmt - // Children: varref|arraysel, math -private: - // Don't need the class we are extracting from, as the "fromp()"'s datatype can get us to it - string m_name; -public: - AstMemberSel(FileLine* fl, AstNode* fromp, VFlagChildDType, const string& name) - : AstNodeMath(fl), m_name(name) { - setOp1p(fromp); - dtypep(NULL); // V3Width will resolve - } - AstMemberSel(FileLine* fl, AstNode* fromp, AstMemberDType* dtp) - : AstNodeMath(fl) { - setOp1p(fromp); - dtypep(dtp); - m_name = dtp->name(); - } - ASTNODE_NODE_FUNCS(MemberSel) - virtual string name() const { return m_name; } - virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { - V3ERROR_NA; /* How can from be a const? */ } - virtual string emitVerilog() { V3ERROR_NA; return ""; } // Implemented specially - virtual string emitC() { V3ERROR_NA; return ""; } - virtual bool cleanOut() const { return false; } - virtual bool same(const AstNode* samep) const { return true; } // dtype comparison does it all for us - virtual int instrCount() const { return widthInstrs(); } - AstNode* fromp() const { return op1p(); } // op1 = Extracting what (NULL=TBD during parsing) - void fromp(AstNode* nodep) { setOp1p(nodep); } -}; - class AstMethodCall : public AstNode { // A reference to a member task (or function) // We do not support generic member calls yet, so this is only enough to @@ -1491,7 +1517,7 @@ public: virtual string name() const { return m_name; } // * = Var name virtual bool hasDType() const { return true; } virtual bool maybePointedTo() const { return true; } - string origName() const { return m_origName; } // * = Original name + virtual string origName() const { return m_origName; } // * = Original name void origName(const string& name) { m_origName = name; } AstVarType varType() const { return m_varType; } // * = Type of variable void direction(const VDirection& flag) { @@ -2012,6 +2038,47 @@ public: ASTNODE_NODE_FUNCS(Iface) }; +class AstMemberSel : public AstNodeMath { + // Parents: math|stmt + // Children: varref|arraysel, math +private: + // Don't need the class we are extracting from, as the "fromp()"'s datatype can get us to it + string m_name; + AstVar* m_varp; // Post link, variable within class that is target of selection +public: + AstMemberSel(FileLine* fl, AstNode* fromp, VFlagChildDType, const string& name) + : AstNodeMath(fl) + , m_name(name) + , m_varp(NULL) { + setOp1p(fromp); + dtypep(NULL); // V3Width will resolve + } + AstMemberSel(FileLine* fl, AstNode* fromp, AstNodeDType* dtp) + : AstNodeMath(fl) + , m_name(dtp->name()) + , m_varp(NULL) { + setOp1p(fromp); + dtypep(dtp); + } + ASTNODE_NODE_FUNCS(MemberSel) + virtual void cloneRelink() { if (m_varp && m_varp->clonep()) { m_varp = m_varp->clonep(); } } + virtual const char* broken() const { + BROKEN_RTN(m_varp && !m_varp->brokeExists()); return NULL; } + virtual string name() const { return m_name; } + virtual V3Hash sameHash() const { return V3Hash(m_name); } + virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { + V3ERROR_NA; /* How can from be a const? */ } + virtual string emitVerilog() { V3ERROR_NA; return ""; } // Implemented specially + virtual string emitC() { V3ERROR_NA; return ""; } + virtual bool cleanOut() const { return false; } + virtual bool same(const AstNode* samep) const { return true; } // dtype comparison does it + virtual int instrCount() const { return widthInstrs(); } + AstNode* fromp() const { return op1p(); } // op1 = Extracting what (NULL=TBD during parsing) + void fromp(AstNode* nodep) { setOp1p(nodep); } + AstVar* varp() const { return m_varp; } + void varp(AstVar* nodep) { m_varp = nodep; } +}; + class AstModportFTaskRef : public AstNode { // An import/export referenced under a modport // The storage for the function itself is inside the @@ -2110,7 +2177,7 @@ public: // ACCESSORS virtual string name() const { return m_name; } // * = Cell name virtual void name(const string& name) { m_name = name; } - string origName() const { return m_origName; } // * = Original name + virtual string origName() const { return m_origName; } // * = Original name void origName(const string& name) { m_origName = name; } string modName() const { return m_modName; } // * = Instance name void modName(const string& name) { m_modName = name; } @@ -3826,6 +3893,25 @@ public: } }; +class AstNew : public AstNodeMath { + // Parents: math|stmt + // Children: varref|arraysel, math +public: + AstNew(FileLine* fl) + : AstNodeMath(fl) { + dtypep(NULL); // V3Width will resolve + } + ASTNODE_NODE_FUNCS(New) + virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { + V3ERROR_NA; /* How can from be a const? */ } + virtual V3Hash sameHash() const { return V3Hash(); } + virtual string emitVerilog() { return "new"; } + virtual string emitC() { V3ERROR_NA; return ""; } + virtual bool cleanOut() const { return true; } + virtual bool same(const AstNode* samep) const { return true; } + virtual int instrCount() const { return widthInstrs(); } +}; + class AstPragma : public AstNode { private: AstPragmaType m_pragType; // Type of pragma @@ -6621,10 +6707,11 @@ public: class AstCMath : public AstNodeMath { private: bool m_cleanOut; + bool m_pure; // Pure optimizable public: // Emit C textual math function (like AstUCFunc) AstCMath(FileLine* fl, AstNode* exprsp) - : AstNodeMath(fl), m_cleanOut(true) { + : AstNodeMath(fl), m_cleanOut(true), m_pure(false) { addOp1p(exprsp); dtypeFrom(exprsp); } @@ -6634,8 +6721,8 @@ public: if (setwidth) { dtypeSetLogicSized(setwidth, AstNumeric::UNSIGNED); } } ASTNODE_NODE_FUNCS(CMath) - virtual bool isGateOptimizable() const { return false; } - virtual bool isPredictOptimizable() const { return false; } + virtual bool isGateOptimizable() const { return m_pure; } + virtual bool isPredictOptimizable() const { return m_pure; } virtual bool cleanOut() const { return m_cleanOut; } virtual string emitVerilog() { V3ERROR_NA; return ""; } // Implemented specially virtual string emitC() { V3ERROR_NA; return ""; } @@ -6643,9 +6730,10 @@ public: virtual bool same(const AstNode* samep) const { return true; } void addBodysp(AstNode* nodep) { addNOp1p(nodep); } AstNode* bodysp() const { return op1p(); } // op1 = expressions to print + bool pure() const { return m_pure; } + void pure(bool flag) { m_pure = flag; } }; - class AstCReset : public AstNodeStmt { // Reset variable at startup public: diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp index 0c805653f..4c51b35b1 100644 --- a/src/V3Begin.cpp +++ b/src/V3Begin.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Begin.h b/src/V3Begin.h index 85066d18d..08613331d 100644 --- a/src/V3Begin.h +++ b/src/V3Begin.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Branch.cpp b/src/V3Branch.cpp index a7bb1f1a0..f2066dd08 100644 --- a/src/V3Branch.cpp +++ b/src/V3Branch.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Branch.h b/src/V3Branch.h index c59bbf5f3..46e1d8dec 100644 --- a/src/V3Branch.h +++ b/src/V3Branch.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Broken.cpp b/src/V3Broken.cpp index 779b53159..c8d413117 100644 --- a/src/V3Broken.cpp +++ b/src/V3Broken.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Broken.h b/src/V3Broken.h index 3129b3923..3a9726b6e 100644 --- a/src/V3Broken.h +++ b/src/V3Broken.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3CCtors.cpp b/src/V3CCtors.cpp index d32eb5b4a..64b0b2460 100644 --- a/src/V3CCtors.cpp +++ b/src/V3CCtors.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3CCtors.h b/src/V3CCtors.h index c474adb43..47bba3f8e 100644 --- a/src/V3CCtors.h +++ b/src/V3CCtors.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Case.cpp b/src/V3Case.cpp index 43ec3ec39..d19ad6f89 100644 --- a/src/V3Case.cpp +++ b/src/V3Case.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Case.h b/src/V3Case.h index 5c442e36f..ace56e8d5 100644 --- a/src/V3Case.h +++ b/src/V3Case.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp index 7409f3b34..b7246184b 100644 --- a/src/V3Cast.cpp +++ b/src/V3Cast.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Cast.h b/src/V3Cast.h index ba0de4e07..0b9cd167f 100644 --- a/src/V3Cast.h +++ b/src/V3Cast.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Cdc.cpp b/src/V3Cdc.cpp index 22d2d9876..ac4c0a3af 100644 --- a/src/V3Cdc.cpp +++ b/src/V3Cdc.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Cdc.h b/src/V3Cdc.h index ac145a477..8f9a445c2 100644 --- a/src/V3Cdc.h +++ b/src/V3Cdc.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Changed.cpp b/src/V3Changed.cpp index 665677cf7..3efdb2b9e 100644 --- a/src/V3Changed.cpp +++ b/src/V3Changed.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Changed.h b/src/V3Changed.h index 1c56756e3..116aab71c 100644 --- a/src/V3Changed.h +++ b/src/V3Changed.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp index 3ea3c435d..27a7227c8 100644 --- a/src/V3Clean.cpp +++ b/src/V3Clean.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -88,6 +88,7 @@ private: if (!nodep->user2() && nodep->hasDType()) { if (VN_IS(nodep, Var) || VN_IS(nodep, NodeDType) // Don't want to change variable widths! || VN_IS(nodep->dtypep()->skipRefp(), AssocArrayDType) // Or arrays + || VN_IS(nodep->dtypep()->skipRefp(), ClassRefDType) || VN_IS(nodep->dtypep()->skipRefp(), QueueDType) || VN_IS(nodep->dtypep()->skipRefp(), UnpackArrayDType) || VN_IS(nodep->dtypep()->skipRefp(), VoidDType)) { diff --git a/src/V3Clean.h b/src/V3Clean.h index ab21cb318..fa35719a0 100644 --- a/src/V3Clean.h +++ b/src/V3Clean.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp index 51f4ba31a..1b9d07cc6 100644 --- a/src/V3Clock.cpp +++ b/src/V3Clock.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Clock.h b/src/V3Clock.h index 538ca8bbf..3e2168178 100644 --- a/src/V3Clock.h +++ b/src/V3Clock.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Combine.cpp b/src/V3Combine.cpp index b8372ee23..45516957b 100644 --- a/src/V3Combine.cpp +++ b/src/V3Combine.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Combine.h b/src/V3Combine.h index 682ccacc0..900a5bcf8 100644 --- a/src/V3Combine.h +++ b/src/V3Combine.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Config.cpp b/src/V3Config.cpp index 0e76b2297..8a1568d60 100644 --- a/src/V3Config.cpp +++ b/src/V3Config.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2010-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2010-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -30,133 +30,491 @@ #include //###################################################################### +// Resolve wildcards in files, modules, ftasks or variables -class V3ConfigLine { +// Template for a class that serves as a map for entities that can be specified +// as wildcards and are accessed by a resolved name. It rebuilds a name lookup +// cache of resolved entities. Entities stored in this container need an update +// function that takes a reference of this type to join multiple entities into one. +template class V3ConfigWildcardResolver { + typedef std::map Map; + + Map m_mapWildcard; // Wildcard strings to entities + Map m_mapResolved; // Resolved strings to converged entities + typename Map::iterator m_last; // Last access, will probably hit again public: - int m_lineno; // Line number to make change at - V3ErrorCode m_code; // Error code - bool m_on; // True to enable message - V3ConfigLine(V3ErrorCode code, int lineno, bool on) - : m_lineno(lineno), m_code(code), m_on(on) {} - ~V3ConfigLine() {} - inline bool operator< (const V3ConfigLine& rh) const { - if (m_linenorh.m_lineno) return false; - if (m_coderh.m_code) return false; + V3ConfigWildcardResolver() { m_last = m_mapResolved.end(); } + + /// Update into maps from other + void update(const V3ConfigWildcardResolver& other) { + typename Map::const_iterator it; + for (it = other.m_mapResolved.begin(); it != other.m_mapResolved.end(); ++it) { + m_mapResolved[it->first].update(it->second); + } + for (it = other.m_mapWildcard.begin(); it != other.m_mapWildcard.end(); ++it) { + m_mapWildcard[it->first].update(it->second); + } + } + + // Access and create a (wildcard) entity + T& at(const string& name) { + // Don't store into wildcards if the name is not a wildcard string + return m_mapWildcard[name]; + } + // Access an entity and resolve wildcards that match it + T* resolve(const string& name) { + // Lookup if recently accessed matches + if (VL_LIKELY(m_last != m_mapResolved.end()) && VL_LIKELY(m_last->first == name)) { + return &m_last->second; + } + // Lookup if it was resolved before, typically not + typename Map::iterator it = m_mapResolved.find(name); + if (VL_UNLIKELY(it != m_mapResolved.end())) { return &it->second; } + + T* newp = NULL; + // Cannot be resolved, create if matched + + // Update this entity with all matches in the wildcards + for (it = m_mapWildcard.begin(); it != m_mapWildcard.end(); ++it) { + if (VString::wildmatch(name, it->first)) { + if (!newp) { + newp = &m_mapResolved[name]; // Emplace and get pointer + } + newp->update(it->second); + } + } + return newp; + } + // Flush on update + void flush() { m_mapResolved.clear(); } +}; + +// Only public_flat_rw has the sensitity tree +class V3ConfigVarAttr { +public: + AstAttrType m_type; // Type of attribute + AstSenTree* m_sentreep; // Sensitivity tree for public_flat_rw + V3ConfigVarAttr(AstAttrType type, AstSenTree* sentreep) + : m_type(type) + , m_sentreep(sentreep) {} +}; + +// Overload vector with the required update function and to apply all entries +class V3ConfigVar : public std::vector { +public: + // Update from other by copying all attributes + void update(const V3ConfigVar& node) { + reserve(size() + node.size()); + insert(end(), node.begin(), node.end()); + } + // Apply all attributes to the variable + void apply(AstVar* varp) { + for (const_iterator it = begin(); it != end(); ++it) { + AstNode* newp = new AstAttrOf(varp->fileline(), it->m_type); + varp->addAttrsp(newp); + if (it->m_type == AstAttrType::VAR_PUBLIC_FLAT_RW && it->m_sentreep) { + newp->addNext(new AstAlwaysPublic(varp->fileline(), it->m_sentreep, NULL)); + } + } + } +}; + +typedef V3ConfigWildcardResolver V3ConfigVarResolver; + +//###################################################################### +// Function or task: Have variables and properties + +class V3ConfigFTask { + V3ConfigVarResolver m_vars; // Variables in function/task + bool m_isolate; // Isolate function return + bool m_noinline; // Don't inline function/task + bool m_public; // Public function/task + +public: + V3ConfigFTask() + : m_isolate(false) + , m_noinline(false) + , m_public(false) {} + void update(const V3ConfigFTask& f) { + // Don't overwrite true with false + if (f.m_isolate) m_isolate = true; + if (f.m_noinline) m_noinline = true; + if (f.m_public) m_public = true; + m_vars.update(f.m_vars); + } + + V3ConfigVarResolver& vars() { return m_vars; } + + void setIsolate(bool set) { m_isolate = set; } + void setNoInline(bool set) { m_noinline = set; } + void setPublic(bool set) { m_public = set; } + + void apply(AstNodeFTask* ftaskp) { + if (m_noinline) + ftaskp->addStmtsp(new AstPragma(ftaskp->fileline(), AstPragmaType::NO_INLINE_TASK)); + if (m_public) + ftaskp->addStmtsp(new AstPragma(ftaskp->fileline(), AstPragmaType::PUBLIC_TASK)); + // Only functions can have isolate (return value) + if (VN_IS(ftaskp, Func)) ftaskp->attrIsolateAssign(m_isolate); + } +}; + +typedef V3ConfigWildcardResolver V3ConfigFTaskResolver; + +//###################################################################### +// Modules have tasks, variables, named blocks and properties + +class V3ConfigModule { + typedef std::unordered_set StringSet; + + V3ConfigFTaskResolver m_tasks; // Functions/tasks in module + V3ConfigVarResolver m_vars; // Variables in module + StringSet m_coverageOffBlocks; // List of block names for coverage_off + bool m_inline; // Whether to force the inline + bool m_inlineValue; // The inline value (on/off) + bool m_public; // Public module + +public: + V3ConfigModule() + : m_inline(false) + , m_inlineValue(false) + , m_public(false) {} + + void update(const V3ConfigModule& m) { + m_tasks.update(m.m_tasks); + m_vars.update(m.m_vars); + for (StringSet::const_iterator it = m.m_coverageOffBlocks.begin(); + it != m.m_coverageOffBlocks.end(); ++it) { + m_coverageOffBlocks.insert(*it); + } + if (!m_inline) { + m_inline = m.m_inline; + m_inlineValue = m.m_inlineValue; + } + if (!m_public) m_public = m.m_public; + } + + V3ConfigFTaskResolver& ftasks() { return m_tasks; } + V3ConfigVarResolver& vars() { return m_vars; } + + void addCoverageBlockOff(const string& name) { m_coverageOffBlocks.insert(name); } + void setInline(bool set) { + m_inline = true; + m_inlineValue = set; + } + void setPublic(bool set) { m_public = set; } + + void apply(AstNodeModule* modp) { + if (m_inline) { + AstPragmaType type + = m_inlineValue ? AstPragmaType::INLINE_MODULE : AstPragmaType::NO_INLINE_MODULE; + AstNode* nodep = new AstPragma(modp->fileline(), type); + modp->addStmtp(nodep); + } + if (m_public) { + AstNode* nodep = new AstPragma(modp->fileline(), AstPragmaType::PUBLIC_MODULE); + modp->addStmtp(nodep); + } + } + + void applyBlock(AstBegin* nodep) { + AstPragmaType pragma = AstPragmaType::COVERAGE_BLOCK_OFF; + if (!nodep->unnamed()) { + for (StringSet::const_iterator it = m_coverageOffBlocks.begin(); + it != m_coverageOffBlocks.end(); ++it) { + if (VString::wildmatch(nodep->name(), *it)) { + nodep->addStmtsp(new AstPragma(nodep->fileline(), pragma)); + } + } + } + } +}; + +typedef V3ConfigWildcardResolver V3ConfigModuleResolver; + +//###################################################################### +// Files have: +// - Line ignores (lint/coverage/tracing on/off) +// - Line attributes: Attributes attached to lines + +// lint/coverage/tracing on/off +class V3ConfigIgnoresLine { +public: + int m_lineno; // Line number to make change at + V3ErrorCode m_code; // Error code + bool m_on; // True to enable message + V3ConfigIgnoresLine(V3ErrorCode code, int lineno, bool on) + : m_lineno(lineno) + , m_code(code) + , m_on(on) {} + ~V3ConfigIgnoresLine() {} + inline bool operator<(const V3ConfigIgnoresLine& rh) const { + if (m_lineno < rh.m_lineno) return true; + if (m_lineno > rh.m_lineno) return false; + if (m_code < rh.m_code) return true; + if (m_code > rh.m_code) return false; // Always turn "on" before "off" so that overlapping lines will end // up finally with the error "off" - return (m_on>rh.m_on); + return (m_on > rh.m_on); } }; -std::ostream& operator<<(std::ostream& os, V3ConfigLine rhs) { - return os< IgnLines; // list of {line,code,on} - typedef std::map IgnFiles; // {filename} => list of {line,code,on} +// Some attributes are attached to entities of the occur on a fileline +// and multiple attributes can be attached to a line +typedef std::bitset V3ConfigLineAttribute; - // MEMBERS - string m_lastFilename; // Last filename looked up - int m_lastLineno; // Last linenumber looked up +// File entity +class V3ConfigFile { + typedef std::map LineAttrMap; // Map line->bitset of attributes + typedef std::multiset IgnLines; // list of {line,code,on} + typedef std::pair WaiverSetting; // Waive code if string matches + typedef std::vector Waivers; // List of {code,wildcard string} - IgnLines::const_iterator m_lastIt; // Point with next linenumber > current line number - IgnLines::const_iterator m_lastEnd; // Point with end() + LineAttrMap m_lineAttrs; // Atributes to line mapping + IgnLines m_ignLines; // Ignore line settings + Waivers m_waivers; // Waive messages - IgnFiles m_ignWilds; // Ignores for each wildcarded filename - IgnFiles m_ignFiles; // Ignores for each non-wildcarded filename + struct { + int lineno; // Last line number + IgnLines::const_iterator it; // Point with next linenumber > current line number + } m_lastIgnore; // Last ignore line run - static V3ConfigIgnores s_singleton; // Singleton (not via local static, as that's slow) - - V3ConfigIgnores() { m_lastLineno = -1; } - ~V3ConfigIgnores() {} - - // METHODS - inline IgnLines* findWilds(const string& wildname) { - IgnFiles::iterator it = m_ignWilds.find(wildname); - if (it != m_ignWilds.end()) { - return &(it->second); - } else { - m_ignWilds.insert(make_pair(wildname, IgnLines())); - it = m_ignWilds.find(wildname); - return &(it->second); - } - } - inline void absBuild(const string& filename) { - // Given a filename, find all wildcard matches against it and build - // hash with the specific filename. This avoids having to wildmatch - // more than once against any filename. - IgnFiles::iterator it = m_ignFiles.find(filename); - if (it == m_ignFiles.end()) { - // Haven't seen this filename before - m_ignFiles.insert(make_pair(filename, IgnLines())); - it = m_ignFiles.find(filename); - // Make new list for this file of all matches - for (IgnFiles::iterator fnit = m_ignWilds.begin(); fnit != m_ignWilds.end(); ++fnit) { - if (VString::wildmatch(filename.c_str(), fnit->first.c_str())) { - for (IgnLines::iterator lit = fnit->second.begin(); - lit != fnit->second.end(); ++lit) { - it->second.insert(*lit); - } - } - } - } - m_lastIt = it->second.begin(); - m_lastEnd = it->second.end(); + // Match a given line and attribute to the map, line 0 is any + bool lineMatch(int lineno, AstPragmaType type) { + if (m_lineAttrs.find(0) != m_lineAttrs.end() && m_lineAttrs[0][type]) return true; + if (m_lineAttrs.find(lineno) == m_lineAttrs.end()) return false; + return m_lineAttrs[lineno][type]; } public: - inline static V3ConfigIgnores& singleton() { return s_singleton; } + V3ConfigFile() { m_lastIgnore = {-1, m_ignLines.begin()}; } - void addIgnore(V3ErrorCode code, const string& wildname, int lineno, bool on) { - // Insert - IgnLines* linesp = findWilds(wildname); - UINFO(9,"config addIgnore "<insert(V3ConfigLine(code, lineno, on)); - // Flush the match cache, due to a change in the rules. - m_ignFiles.clear(); - m_lastFilename = " "; + void update(const V3ConfigFile& file) { + // Copy in all Attributes + for (LineAttrMap::const_iterator it = file.m_lineAttrs.begin(); + it != file.m_lineAttrs.end(); ++it) { + m_lineAttrs[it->first] |= it->second; + } + // Copy in all ignores + for (IgnLines::const_iterator it = file.m_ignLines.begin(); it != file.m_ignLines.end(); + ++it) { + m_ignLines.insert(*it); + } + // Update the iterator after the list has changed + m_lastIgnore.it = m_ignLines.begin(); + m_waivers.reserve(m_waivers.size() + file.m_waivers.size()); + m_waivers.insert(m_waivers.end(), file.m_waivers.begin(), file.m_waivers.end()); + } + void addLineAttribute(int lineno, AstPragmaType attr) { m_lineAttrs[lineno].set(attr); } + void addIgnore(V3ErrorCode code, int lineno, bool on) { + m_ignLines.insert(V3ConfigIgnoresLine(code, lineno, on)); + m_lastIgnore.it = m_ignLines.begin(); + } + void addWaiver(V3ErrorCode code, const string& match) { + m_waivers.push_back(make_pair(code, match)); + } + + void applyBlock(AstBegin* nodep) { + // Apply to block at this line + AstPragmaType pragma = AstPragmaType::COVERAGE_BLOCK_OFF; + if (lineMatch(nodep->fileline()->lineno(), pragma)) { + nodep->addStmtsp(new AstPragma(nodep->fileline(), pragma)); + } + } + void applyCase(AstCase* nodep) { + // Apply to this case at this line + int lineno = nodep->fileline()->lineno(); + if (lineMatch(lineno, AstPragmaType::FULL_CASE)) nodep->fullPragma(true); + if (lineMatch(lineno, AstPragmaType::PARALLEL_CASE)) nodep->parallelPragma(true); } inline void applyIgnores(FileLine* filelinep) { - // HOT routine, called each parsed token line - if (m_lastLineno != filelinep->lastLineno() - || m_lastFilename != filelinep->filename()) { - //UINFO(9," ApplyIgnores for "<ascii()<filename())) { - absBuild(filelinep->filename()); - m_lastFilename = filelinep->filename(); - } + // HOT routine, called each parsed token line of this filename + if (m_lastIgnore.lineno != filelinep->lineno()) { + // UINFO(9," ApplyIgnores for "<ascii()<lastLineno(); - for (; m_lastIt != m_lastEnd; ++m_lastIt) { - if (m_lastIt->m_lineno > curlineno) break; - //UINFO(9," Hit "<<*m_lastIt<warnOn(m_lastIt->m_code, m_lastIt->m_on); + for (; m_lastIgnore.it != m_ignLines.end(); ++m_lastIgnore.it) { + if (m_lastIgnore.it->m_lineno > curlineno) break; + // UINFO(9," Hit "<<*m_lastIt<warnOn(m_lastIgnore.it->m_code, m_lastIgnore.it->m_on); } if (0 && debug() >= 9) { - for (IgnLines::const_iterator it=m_lastIt; it != m_lastEnd; ++it) { - UINFO(9," NXT "<<*it<lastLineno(); + m_lastIgnore.lineno = filelinep->lastLineno(); } } + bool waive(V3ErrorCode code, const string& match) { + for (Waivers::const_iterator it = m_waivers.begin(); it != m_waivers.end(); ++it) { + if (((it->first == code) || (it->first == V3ErrorCode::I_LINT)) + && VString::wildmatch(match, it->second)) return true; + } + return false; + } }; -V3ConfigIgnores V3ConfigIgnores::s_singleton; +typedef V3ConfigWildcardResolver V3ConfigFileResolver; + +//###################################################################### +// Resolve modules and files in the design + +class V3ConfigResolver { + V3ConfigModuleResolver m_modules; // Access to module names (with wildcards) + V3ConfigFileResolver m_files; // Access to file names (with wildcards) + + static V3ConfigResolver s_singleton; // Singleton (not via local static, as that's slow) + V3ConfigResolver() {} + ~V3ConfigResolver() {} + +public: + inline static V3ConfigResolver& s() { return s_singleton; } + + V3ConfigModuleResolver& modules() { return m_modules; } + V3ConfigFileResolver& files() { return m_files; } +}; + +V3ConfigResolver V3ConfigResolver::s_singleton; //###################################################################### // V3Config +void V3Config::addCaseFull(const string& filename, int lineno) { + V3ConfigFile& file = V3ConfigResolver::s().files().at(filename); + file.addLineAttribute(lineno, AstPragmaType::FULL_CASE); +} + +void V3Config::addCaseParallel(const string& filename, int lineno) { + V3ConfigFile& file = V3ConfigResolver::s().files().at(filename); + file.addLineAttribute(lineno, AstPragmaType::PARALLEL_CASE); +} + +void V3Config::addCoverageBlockOff(const string& filename, int lineno) { + V3ConfigFile& file = V3ConfigResolver::s().files().at(filename); + file.addLineAttribute(lineno, AstPragmaType::COVERAGE_BLOCK_OFF); +} + +void V3Config::addCoverageBlockOff(const string& module, const string& blockname) { + V3ConfigResolver::s().modules().at(module).addCoverageBlockOff(blockname); +} + void V3Config::addIgnore(V3ErrorCode code, bool on, const string& filename, int min, int max) { - if (filename=="*") { - FileLine::globalWarnOff(code,!on); + if (filename == "*") { + FileLine::globalWarnOff(code, !on); } else { - V3ConfigIgnores::singleton().addIgnore(code, filename, min, on); - if (max) V3ConfigIgnores::singleton().addIgnore(code, filename, max, !on); + V3ConfigResolver::s().files().at(filename).addIgnore(code, min, on); + if (max) V3ConfigResolver::s().files().at(filename).addIgnore(code, max, !on); + V3ConfigResolver::s().files().flush(); } } -void V3Config::applyIgnores(FileLine* filelinep) { - V3ConfigIgnores::singleton().applyIgnores(filelinep); +void V3Config::addInline(FileLine* fl, const string& module, const string& ftask, bool on) { + if (ftask.empty()) { + V3ConfigResolver::s().modules().at(module).setInline(on); + } else { + if (!on) { + fl->v3error("no_inline not supported for tasks" << endl); + } else { + V3ConfigResolver::s().modules().at(module).ftasks().at(ftask).setNoInline(on); + } + } +} + +void V3Config::addVarAttr(FileLine* fl, const string& module, const string& ftask, + const string& var, AstAttrType attr, AstSenTree* sensep) { + // Semantics: sensep only if public_flat_rw + if ((attr != AstAttrType::VAR_PUBLIC_FLAT_RW) && sensep) { + sensep->v3error("sensitivity not expected for attribute" << endl); + return; + } + // Semantics: Most of the attributes operate on signals + if (var.empty()) { + if (attr == AstAttrType::VAR_ISOLATE_ASSIGNMENTS) { + if (ftask.empty()) { + fl->v3error("isolate_assignments only applies to signals or functions/tasks" + << endl); + } else { + V3ConfigResolver::s().modules().at(module).ftasks().at(ftask).setIsolate(true); + } + } else if (attr == AstAttrType::VAR_PUBLIC) { + if (ftask.empty()) { + // public module, this is the only exception from var here + V3ConfigResolver::s().modules().at(module).setPublic(true); + } else { + V3ConfigResolver::s().modules().at(module).ftasks().at(ftask).setPublic(true); + } + } else { + fl->v3error("missing -signal" << endl); + } + } else { + V3ConfigModule& mod = V3ConfigResolver::s().modules().at(module); + if (ftask.empty()) { + mod.vars().at(var).push_back(V3ConfigVarAttr(attr, sensep)); + } else { + mod.ftasks().at(ftask).vars().at(var).push_back({attr, sensep}); + } + } +} + +void V3Config::addWaiver(V3ErrorCode code, const string& filename, const string& match) { + V3ConfigResolver::s().files().at(filename).addWaiver(code, match); +} + +void V3Config::applyCase(AstCase* nodep) { + const string& filename = nodep->fileline()->filename(); + V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filename); + if (filep) filep->applyCase(nodep); +} + +void V3Config::applyCoverageBlock(AstNodeModule* modulep, AstBegin* nodep) { + const string& filename = nodep->fileline()->filename(); + V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filename); + if (filep) filep->applyBlock(nodep); + const string& modname = modulep->name(); + V3ConfigModule* modp = V3ConfigResolver::s().modules().resolve(modname); + if (modp) modp->applyBlock(nodep); +} + +void V3Config::applyIgnores(FileLine* filelinep) { + const string& filename = filelinep->filename(); + V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filename); + if (filep) filep->applyIgnores(filelinep); +} + +void V3Config::applyModule(AstNodeModule* modulep) { + const string& modname = modulep->name(); + V3ConfigModule* modp = V3ConfigResolver::s().modules().resolve(modname); + if (modp) modp->apply(modulep); +} + +void V3Config::applyFTask(AstNodeModule* modulep, AstNodeFTask* ftaskp) { + const string& modname = modulep->name(); + V3ConfigModule* modp = V3ConfigResolver::s().modules().resolve(modname); + if (!modp) return; + V3ConfigFTask* ftp = modp->ftasks().resolve(ftaskp->name()); + if (ftp) ftp->apply(ftaskp); +} + +void V3Config::applyVarAttr(AstNodeModule* modulep, AstNodeFTask* ftaskp, AstVar* varp) { + V3ConfigVar* vp; + V3ConfigModule* modp = V3ConfigResolver::s().modules().resolve(modulep->name()); + if (!modp) return; + if (ftaskp) { + V3ConfigFTask* ftp = modp->ftasks().resolve(ftaskp->name()); + if (!ftp) return; + vp = ftp->vars().resolve(varp->name()); + } else { + vp = modp->vars().resolve(varp->name()); + } + if (vp) vp->apply(varp); +} + +bool V3Config::waive(FileLine* filelinep, V3ErrorCode code, const string& message) { + V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filelinep->filename()); + if (!filep) return false; + return filep->waive(code, message); } diff --git a/src/V3Config.h b/src/V3Config.h index abfdc17ab..cdd4b9c78 100644 --- a/src/V3Config.h +++ b/src/V3Config.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2010-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2010-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -26,13 +26,27 @@ #include "V3Error.h" #include "V3FileLine.h" +#include "V3Ast.h" //###################################################################### class V3Config { public: + static void addCaseFull(const string& file, int lineno); + static void addCaseParallel(const string& file, int lineno); + static void addCoverageBlockOff(const string& file, int lineno); + static void addCoverageBlockOff(const string& module, const string& blockname); static void addIgnore(V3ErrorCode code, bool on, const string& filename, int min, int max); + static void addWaiver(V3ErrorCode code, const string& filename, const string& msg); + static void addInline(FileLine* fl, const string& module, const string& ftask, bool on); + static void addVarAttr(FileLine* fl, const string& module, const string& ftask, const string& signal, AstAttrType type, AstSenTree* nodep); + static void applyCase(AstCase* nodep); + static void applyCoverageBlock(AstNodeModule* modulep, AstBegin* nodep); static void applyIgnores(FileLine* filelinep); + static void applyModule(AstNodeModule* nodep); + static void applyFTask(AstNodeModule* modulep, AstNodeFTask* ftaskp); + static void applyVarAttr(AstNodeModule* modulep, AstNodeFTask* ftaskp, AstVar* varp); + static bool waive(FileLine* filelinep, V3ErrorCode code, const string& match); }; #endif // Guard diff --git a/src/V3Const.cpp b/src/V3Const.cpp index 6d7144d5d..e5825110d 100644 --- a/src/V3Const.cpp +++ b/src/V3Const.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Const.h b/src/V3Const.h index ee43fca2d..803fc0f0d 100644 --- a/src/V3Const.h +++ b/src/V3Const.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp index 585c26171..9927d1c47 100644 --- a/src/V3Coverage.cpp +++ b/src/V3Coverage.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Coverage.h b/src/V3Coverage.h index fd2102a4c..311bd4b7d 100644 --- a/src/V3Coverage.h +++ b/src/V3Coverage.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3CoverageJoin.cpp b/src/V3CoverageJoin.cpp index 237975d27..fb66a9b12 100644 --- a/src/V3CoverageJoin.cpp +++ b/src/V3CoverageJoin.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3CoverageJoin.h b/src/V3CoverageJoin.h index 91fe1428a..a9ee2a82c 100644 --- a/src/V3CoverageJoin.h +++ b/src/V3CoverageJoin.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp index 1cd44de2c..265738e2a 100644 --- a/src/V3Dead.cpp +++ b/src/V3Dead.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Dead.h b/src/V3Dead.h index 6baf5b4ad..e670b31d5 100644 --- a/src/V3Dead.h +++ b/src/V3Dead.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp index df4cbf10e..40ef7954f 100644 --- a/src/V3Delayed.cpp +++ b/src/V3Delayed.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Delayed.h b/src/V3Delayed.h index 7e21dc9ad..9d7bc8f45 100644 --- a/src/V3Delayed.h +++ b/src/V3Delayed.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Depth.cpp b/src/V3Depth.cpp index b156c0988..51e1f07a0 100644 --- a/src/V3Depth.cpp +++ b/src/V3Depth.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Depth.h b/src/V3Depth.h index 8ab5542f4..75c673d2b 100644 --- a/src/V3Depth.h +++ b/src/V3Depth.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3DepthBlock.cpp b/src/V3DepthBlock.cpp index 4a31da51e..4a9abc27d 100644 --- a/src/V3DepthBlock.cpp +++ b/src/V3DepthBlock.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3DepthBlock.h b/src/V3DepthBlock.h index 54fa377a5..745763dc3 100644 --- a/src/V3DepthBlock.h +++ b/src/V3DepthBlock.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Descope.cpp b/src/V3Descope.cpp index 398f19bbc..5d49b29c0 100644 --- a/src/V3Descope.cpp +++ b/src/V3Descope.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Descope.h b/src/V3Descope.h index 391d21b73..2589898ef 100644 --- a/src/V3Descope.h +++ b/src/V3Descope.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index 54fb59e2a..0f69d91f7 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -397,40 +397,40 @@ public: } virtual void visit(AstNodeReadWriteMem* nodep) { puts(nodep->cFuncPrefixp()); - emitIQW(nodep->filenamep()); - puts("("); // We take a void* rather than emitIQW(nodep->memp()); - puts(nodep->isHex()?"true":"false"); - putbs(","); - puts(cvtToStr(nodep->memp()->widthMin())); // Need real storage width - putbs(","); + puts("N("); + puts(nodep->isHex() ? "true" : "false"); + putbs(", "); + // Need real storage width + puts(cvtToStr(nodep->memp()->dtypep()->subDTypep()->widthMin())); uint32_t array_lsb = 0; { const AstVarRef* varrefp = VN_CAST(nodep->memp(), VarRef); if (!varrefp) { nodep->v3error(nodep->verilogKwd() << " loading non-variable"); } + else if (VN_IS(varrefp->varp()->dtypeSkipRefp(), AssocArrayDType)) { + // nodep->memp() below will when verilated code is compiled create a C++ template + } else if (const AstUnpackArrayDType* adtypep = VN_CAST(varrefp->varp()->dtypeSkipRefp(), UnpackArrayDType)) { + putbs(", "); puts(cvtToStr(varrefp->varp()->dtypep()->arrayUnpackedElements())); array_lsb = adtypep->lsb(); + putbs(", "); + puts(cvtToStr(array_lsb)); } else { nodep->v3error(nodep->verilogKwd() - << " loading other than unpacked-array variable"); + << " loading other than unpacked/associative-array variable"); } } putbs(", "); - puts(cvtToStr(array_lsb)); - putbs(","); - if (!nodep->filenamep()->dtypep()->isString()) { - puts(cvtToStr(nodep->filenamep()->widthWords())); - checkMaxWords(nodep->filenamep()); - putbs(", "); - } - iterateAndNextNull(nodep->filenamep()); + emitCvtPackStr(nodep->filenamep()); putbs(", "); iterateAndNextNull(nodep->memp()); - putbs(","); if (nodep->lsbp()) { iterateAndNextNull(nodep->lsbp()); } + putbs(", "); + if (nodep->lsbp()) { iterateAndNextNull(nodep->lsbp()); } else puts(cvtToStr(array_lsb)); - putbs(","); if (nodep->msbp()) { iterateAndNextNull(nodep->msbp()); } else puts("~0"); + putbs(", "); + if (nodep->msbp()) { iterateAndNextNull(nodep->msbp()); } else puts("~VL_ULL(0)"); puts(");\n"); } virtual void visit(AstFClose* nodep) { @@ -438,7 +438,7 @@ public: iterateAndNextNull(nodep->filep()); puts("); "); iterateAndNextNull(nodep->filep()); // For safety, so user doesn't later WRITE with it. - puts("=0;\n"); + puts(" = 0;\n"); } virtual void visit(AstFFlush* nodep) { if (!nodep->filep()) { @@ -714,6 +714,11 @@ public: iterateAndNextNull(nodep->expr2p()); puts(")"); } } + virtual void visit(AstNew* nodep) { + puts("std::make_shared<" + nodep->dtypep()->nameProtect() + ">("); + iterateChildren(nodep); + puts(")"); + } virtual void visit(AstSel* nodep) { // Note ASSIGN checks for this on a LHS emitOpName(nodep, nodep->emitC(), nodep->fromp(), nodep->lsbp(), nodep->thsp()); @@ -775,7 +780,7 @@ public: puts("("); if (nodep->isWide()) { puts(cvtToStr(nodep->widthWords())); // Note argument width, not node width (which is always 32) - puts(","); + puts(", "); } iterateAndNextNull(nodep); puts(")"); @@ -1073,8 +1078,6 @@ class EmitCImp : EmitCStmts { } ofp->puts("// See "+v3Global.opt.prefix()+".h for the primary calling header\n"); } - ofp->puts("\n"); - return ofp; } @@ -2536,8 +2539,7 @@ void EmitCImp::emitMTaskState() { void EmitCImp::emitInt(AstNodeModule* modp) { // Always have this first; gcc has short circuiting if #ifdef is first in a file - puts("#ifndef _"+modClassName(modp)+"_H_\n"); - puts("#define _"+modClassName(modp)+"_H_\n"); + ofp()->putsGuard(); puts("\n"); ofp()->putsIntTopInclude(); @@ -2739,30 +2741,29 @@ void EmitCImp::emitInt(AstNodeModule* modp) { ofp()->putsPrivate(false); // public: puts("void "+protect("__Vserialize")+"(VerilatedSerialize& os);\n"); puts("void "+protect("__Vdeserialize")+"(VerilatedDeserialize& os);\n"); - puts("\n"); } puts("} VL_ATTR_ALIGNED(128);\n"); - puts("\n"); // Save/restore if (v3Global.opt.savable() && modp->isTop()) { - puts("inline VerilatedSerialize& operator<<(VerilatedSerialize& os, " + puts("\n"); + puts("inline VerilatedSerialize& operator<<(VerilatedSerialize& os, " +modClassName(modp)+"& rhs) {\n" "Verilated::quiesce(); rhs."+protect("__Vserialize")+"(os); return os; }\n"); puts("inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, " +modClassName(modp)+"& rhs) {\n" "Verilated::quiesce(); rhs."+protect("__Vdeserialize")+"(os); return os; }\n"); - puts("\n"); } // finish up h-file - puts("#endif // guard\n"); + ofp()->putsEndGuard(); } //---------------------------------------------------------------------- void EmitCImp::emitImp(AstNodeModule* modp) { + puts("\n"); puts("#include \""+modClassName(modp)+".h\"\n"); puts("#include \""+symClassName()+".h\"\n"); @@ -2770,8 +2771,8 @@ void EmitCImp::emitImp(AstNodeModule* modp) { puts("\n"); puts("#include \"verilated_dpi.h\"\n"); } - puts("\n"); + puts("\n"); emitTextSection(AstType::atScImpHdr); if (m_slow && splitFilenum()==0) { @@ -3061,13 +3062,13 @@ class EmitCTrace : EmitCStmts { } // Range if (nodep->arrayRange().ranged()) { - puts(",(i+"+cvtToStr(nodep->arrayRange().lo())+")"); + puts(", true,(i+" + cvtToStr(nodep->arrayRange().lo()) + ")"); } else { - puts(",-1"); + puts(", false,-1"); } - if (!nodep->dtypep()->basicp()->isDouble() // When float/double no longer have widths this can go - && nodep->bitRange().ranged()) { - puts(","+cvtToStr(nodep->bitRange().left())+","+cvtToStr(nodep->bitRange().right())); + if (!nodep->dtypep()->basicp()->isDouble() && nodep->bitRange().ranged()) { + puts(", " + cvtToStr(nodep->bitRange().left()) + "," + + cvtToStr(nodep->bitRange().right())); } puts(");"); } diff --git a/src/V3EmitC.h b/src/V3EmitC.h index 8edf76b75..718f6070e 100644 --- a/src/V3EmitC.h +++ b/src/V3EmitC.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCBase.h b/src/V3EmitCBase.h index b0a604c6d..28a7c4561 100644 --- a/src/V3EmitCBase.h +++ b/src/V3EmitCBase.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp index 28946e809..2fb23cd96 100644 --- a/src/V3EmitCInlines.cpp +++ b/src/V3EmitCInlines.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -54,6 +54,10 @@ class EmitCInlines : EmitCBaseVisitor { v3Global.needHeavy(true); iterateChildren(nodep); } + virtual void visit(AstNodeReadWriteMem* nodep) { + v3Global.needHeavy(true); + iterateChildren(nodep); + } virtual void visit(AstValuePlusArgs* nodep) { v3Global.needHeavy(true); iterateChildren(nodep); @@ -101,8 +105,7 @@ void EmitCInlines::emitInt() { m_ofp = &hf; ofp()->putsHeader(); - puts("#ifndef _"+topClassName()+"__Inlines_H_\n"); - puts("#define _"+topClassName()+"__Inlines_H_\n"); + ofp()->putsGuard(); puts("\n"); puts("#include \"verilated.h\"\n"); @@ -112,7 +115,7 @@ void EmitCInlines::emitInt() { // Placeholder - v3Global.needHInlines(true) currently not used puts("//======================\n\n"); - puts("#endif // guard\n"); + ofp()->putsEndGuard(); } //###################################################################### diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp index 1c740ca78..bed3591e1 100644 --- a/src/V3EmitCMake.cpp +++ b/src/V3EmitCMake.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCMake.h b/src/V3EmitCMake.h index d85104ebd..6c309450d 100644 --- a/src/V3EmitCMake.h +++ b/src/V3EmitCMake.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp index dfbc62b73..84e9c6937 100644 --- a/src/V3EmitCSyms.cpp +++ b/src/V3EmitCSyms.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -372,12 +372,10 @@ void EmitCSyms::emitSymHdr() { puts("//\n"); puts("// Internal details; most calling programs do not need this header,\n"); puts("// unless using verilator public meta comments.\n"); - puts("\n"); - puts("#ifndef _"+symClassName()+"_H_\n"); - puts("#define _"+symClassName()+"_H_\n"); - puts("\n"); + ofp()->putsGuard(); + puts("\n"); ofp()->putsIntTopInclude(); if (v3Global.needHeavy()) { puts("#include \"verilated_heavy.h\"\n"); @@ -474,8 +472,8 @@ void EmitCSyms::emitSymHdr() { } puts("\n"); puts("} VL_ATTR_ALIGNED(64);\n"); - puts("\n"); - puts("#endif // guard\n"); + + ofp()->putsEndGuard(); } void EmitCSyms::closeSplit() { diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp index cc89ddb46..1831a305c 100644 --- a/src/V3EmitMk.cpp +++ b/src/V3EmitMk.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitMk.h b/src/V3EmitMk.h index 22a1a8608..eb7c0d4da 100644 --- a/src/V3EmitMk.h +++ b/src/V3EmitMk.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp index 21ca8594d..9032711b8 100644 --- a/src/V3EmitV.cpp +++ b/src/V3EmitV.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitV.h b/src/V3EmitV.h index e453764a8..30ff083c4 100644 --- a/src/V3EmitV.h +++ b/src/V3EmitV.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp index ba62b10ab..86985506a 100644 --- a/src/V3EmitXml.cpp +++ b/src/V3EmitXml.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -114,6 +114,7 @@ class EmitXmlFileVisitor : public AstNVisitor { puts(" origName="); putsQuoted(nodep->origName()); if (nodep->level()==1 || nodep->level()==2) // ==2 because we don't add wrapper when in XML mode puts(" topModule=\"1\""); // IEEE vpiTopModule + if (nodep->modPublic()) puts(" public=\"true\""); outputChildrenEnd(nodep, ""); } virtual void visit(AstVar* nodep) { @@ -129,6 +130,19 @@ class EmitXmlFileVisitor : public AstNVisitor { puts(" vartype="); putsQuoted(!vt.empty() ? vt : kw); } puts(" origName="); putsQuoted(nodep->origName()); + // Attributes + if (nodep->attrClocker() == VVarAttrClocker::CLOCKER_YES) + puts(" clocker=\"true\""); + else if (nodep->attrClocker() == VVarAttrClocker::CLOCKER_NO) + puts(" clocker=\"false\""); + if (nodep->attrClockEn()) puts(" clock_enable=\"true\""); + if (nodep->attrIsolateAssign()) puts(" isolate_assignments=\"true\""); + if (nodep->isSigPublic()) puts(" public=\"true\""); + if (nodep->isSigUserRdPublic()) puts(" public_flat_rd=\"true\""); + if (nodep->isSigUserRWPublic()) puts(" public_flat_rw=\"true\""); + if (nodep->attrScBv()) puts(" sc_bv=\"true\""); + if (nodep->attrScClocked()) puts(" sc_clock=\"true\""); + if (nodep->attrSFormat()) puts(" sformat=\"true\""); outputChildrenEnd(nodep, ""); } virtual void visit(AstPin* nodep) { diff --git a/src/V3EmitXml.h b/src/V3EmitXml.h index 44b93525c..0d82c9cc2 100644 --- a/src/V3EmitXml.h +++ b/src/V3EmitXml.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Error.cpp b/src/V3Error.cpp index 2014020e7..466171706 100644 --- a/src/V3Error.cpp +++ b/src/V3Error.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Error.h b/src/V3Error.h index 3a6e46516..95bd9e521 100644 --- a/src/V3Error.h +++ b/src/V3Error.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -77,6 +77,7 @@ public: CONTASSREG, // Continuous assignment on reg DEFPARAM, // Style: Defparam DECLFILENAME, // Declaration doesn't match filename + DEPRECATED, // Feature will be deprecated ENDLABEL, // End lable name mismatch GENCLK, // Generated Clock IFDEPTH, // If statements too deep @@ -144,7 +145,7 @@ public: "BLKANDNBLK", "BLKLOOPINIT", "BLKSEQ", "BSSPACE", "CASEINCOMPLETE", "CASEOVERLAP", "CASEWITHX", "CASEX", "CDCRSTLOGIC", "CLKDATA", "CMPCONST", "COLONPLUS", "COMBDLY", "CONTASSREG", - "DEFPARAM", "DECLFILENAME", + "DEFPARAM", "DECLFILENAME", "DEPRECATED", "ENDLABEL", "GENCLK", "IFDEPTH", "IGNOREDRETURN", "IMPERFECTSCH", "IMPLICIT", "IMPORTSTAR", "IMPURE", diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp index 8f0a456bc..4291f965e 100644 --- a/src/V3Expand.cpp +++ b/src/V3Expand.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Expand.h b/src/V3Expand.h index ab70f8537..2a28294d7 100644 --- a/src/V3Expand.h +++ b/src/V3Expand.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3File.cpp b/src/V3File.cpp index cbf857e9b..81776d2e0 100644 --- a/src/V3File.cpp +++ b/src/V3File.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -25,6 +25,7 @@ #include "V3File.h" #include "V3Os.h" #include "V3PreShell.h" +#include "V3String.h" #include "V3Ast.h" #include @@ -52,6 +53,10 @@ # include #endif +#if defined(_WIN32) || defined(__MINGW32__) +# include // open, read, write, close +#endif + // If change this code, run a test with the below size set very small //#define INFILTER_IPC_BUFSIZ 16 #define INFILTER_IPC_BUFSIZ (64*1024) // For debug, try this as a small number @@ -408,8 +413,7 @@ private: || errno == EWOULDBLOCK #endif ) { - // cppcheck-suppress obsoleteFunctionsusleep - checkFilter(false); usleep(1000); continue; + checkFilter(false); V3Os::u_sleep(1000); continue; } else { m_readEof = true; break; } } return out; @@ -447,8 +451,7 @@ private: || errno == EWOULDBLOCK #endif ) { - // cppcheck-suppress obsoleteFunctionsusleep - checkFilter(false); usleep(1000); continue; + checkFilter(false); V3Os::u_sleep(1000); continue; } else break; } @@ -942,6 +945,17 @@ void V3OutFile::putsForceIncs() { } } +void V3OutCFile::putsGuard() { + UASSERT(!m_guard, "Already called putsGuard in emit file"); + m_guard = true; + string var = VString::upcase(string("_") + V3Os::filenameNonDir(filename()) + "_"); + for (string::iterator pos = var.begin(); pos != var.end(); ++pos) { + if (!isalnum(*pos)) *pos = '_'; + } + puts("\n#ifndef " + var + "\n"); + puts("#define " + var + " // guard\n"); +} + //###################################################################### // VIdProtect diff --git a/src/V3File.h b/src/V3File.h index 2c0997283..d974058b5 100644 --- a/src/V3File.h +++ b/src/V3File.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -138,6 +138,7 @@ public: V3OutFormatter(const string& filename, Language lang); virtual ~V3OutFormatter() {} // ACCESSORS + string filename() const { return m_filename; } int column() const { return m_column; } int blockIndent() const { return m_blockIndent; } void blockIndent(int flag) { m_blockIndent = flag; } @@ -186,23 +187,28 @@ private: }; class V3OutCFile : public V3OutFile { - int m_private; + int m_guard; // Created header guard + int m_private; // 1 = Most recently emitted private:, 2 = public: public: - explicit V3OutCFile(const string& filename) : V3OutFile(filename, V3OutFormatter::LA_C) { + explicit V3OutCFile(const string& filename) + : V3OutFile(filename, V3OutFormatter::LA_C) + , m_guard(false) { resetPrivate(); } virtual ~V3OutCFile() {} virtual void putsHeader() { puts("// Verilated -*- C++ -*-\n"); } - virtual void putsIntTopInclude() { - putsForceIncs(); + virtual void putsIntTopInclude() { putsForceIncs(); } + virtual void putsGuard(); + virtual void putsEndGuard() { + if (m_guard) puts("\n#endif // guard\n"); } // Print out public/privates void resetPrivate() { m_private = 0; } void putsPrivate(bool setPrivate) { - if (setPrivate && m_private!=1) { + if (setPrivate && m_private != 1) { puts("private:\n"); m_private = 1; - } else if (!setPrivate && m_private!=2) { + } else if (!setPrivate && m_private != 2) { puts("public:\n"); m_private = 2; } diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp index 9d4ca503c..b6cceec76 100644 --- a/src/V3FileLine.cpp +++ b/src/V3FileLine.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -341,7 +341,10 @@ void FileLine::v3errorEnd(std::ostringstream& str, const string& locationStr) { if (!locationStr.empty()) { lstr<fileline(), new AstVarRef(nodep->fileline(), exprvarrefp->varp(), true), new AstVarRef(nodep->fileline(), nodep, false))); + } else if (nodep->isSigPublic() && VN_IS(nodep->dtypep(), UnpackArrayDType)) { + // Public variable at this end and it is an unpacked array. We need to assign + // instead of aliased, because otherwise it will pass V3Slice and invalid + // code will be emitted. + UINFO(9,"assign to public and unpacked: "<addStmtp( + new AstAssignW(nodep->fileline(), + new AstVarRef(nodep->fileline(), exprvarrefp->varp(), true), + new AstVarRef(nodep->fileline(), nodep, false))); } else if (nodep->isIfaceRef()) { m_modp->addStmtp( new AstAssignVarScope(nodep->fileline(), diff --git a/src/V3Inline.h b/src/V3Inline.h index ca51acebb..2258c39f0 100644 --- a/src/V3Inline.h +++ b/src/V3Inline.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp index f35a87478..ce4a66bb8 100644 --- a/src/V3Inst.cpp +++ b/src/V3Inst.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Inst.h b/src/V3Inst.h index 04a634d22..38858b072 100644 --- a/src/V3Inst.h +++ b/src/V3Inst.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp index d48e1dfb8..e69146c71 100644 --- a/src/V3InstrCount.cpp +++ b/src/V3InstrCount.cpp @@ -7,7 +7,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3InstrCount.h b/src/V3InstrCount.h index 6d5ba0c5a..47ffed11a 100644 --- a/src/V3InstrCount.h +++ b/src/V3InstrCount.h @@ -7,7 +7,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -19,6 +19,9 @@ // //************************************************************************* +#ifndef _V3INSTRCOUNT_H_ +#define _V3INSTRCOUNT_H_ 1 + #include "config_build.h" #include "verilatedos.h" @@ -41,3 +44,5 @@ public: // Optional osp is stream to dump critical path to. static uint32_t count(AstNode* nodep, bool assertNoDups, std::ostream* osp = NULL); }; + +#endif // guard diff --git a/src/V3LangCode.h b/src/V3LangCode.h index 158e9e1c5..ab4509e97 100644 --- a/src/V3LangCode.h +++ b/src/V3LangCode.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LanguageWords.h b/src/V3LanguageWords.h index 16465805f..2319ecfe8 100644 --- a/src/V3LanguageWords.h +++ b/src/V3LanguageWords.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Life.cpp b/src/V3Life.cpp index 2d6c3d8a1..138518f31 100644 --- a/src/V3Life.cpp +++ b/src/V3Life.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -459,6 +459,7 @@ public: virtual ~LifeVisitor() { if (m_lifep) { delete m_lifep; m_lifep = NULL; } } + VL_UNCOPYABLE(LifeVisitor); }; //###################################################################### diff --git a/src/V3Life.h b/src/V3Life.h index 40b2a8610..24823ee83 100644 --- a/src/V3Life.h +++ b/src/V3Life.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LifePost.cpp b/src/V3LifePost.cpp index 5487e98fa..108ef4aa6 100644 --- a/src/V3LifePost.cpp +++ b/src/V3LifePost.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LifePost.h b/src/V3LifePost.h index 00f00a62e..4a04e4213 100644 --- a/src/V3LifePost.h +++ b/src/V3LifePost.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp index 6ef8ffb60..361e70c41 100644 --- a/src/V3LinkCells.cpp +++ b/src/V3LinkCells.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkCells.h b/src/V3LinkCells.h index 34049c6fa..42738fe65 100644 --- a/src/V3LinkCells.h +++ b/src/V3LinkCells.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp index a875a49de..c56c3c7a1 100644 --- a/src/V3LinkDot.cpp +++ b/src/V3LinkDot.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkDot.h b/src/V3LinkDot.h index baf0861cf..3a2721d41 100644 --- a/src/V3LinkDot.h +++ b/src/V3LinkDot.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp index 268257d16..042ef62af 100644 --- a/src/V3LinkJump.cpp +++ b/src/V3LinkJump.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkJump.h b/src/V3LinkJump.h index 01a5803bf..fe923aff3 100644 --- a/src/V3LinkJump.h +++ b/src/V3LinkJump.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkLValue.cpp b/src/V3LinkLValue.cpp index 58725448b..f00c604c8 100644 --- a/src/V3LinkLValue.cpp +++ b/src/V3LinkLValue.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkLValue.h b/src/V3LinkLValue.h index b1cd6e2f8..d2d62bdb1 100644 --- a/src/V3LinkLValue.h +++ b/src/V3LinkLValue.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp index d3e69a635..abdfa423a 100644 --- a/src/V3LinkLevel.cpp +++ b/src/V3LinkLevel.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkLevel.h b/src/V3LinkLevel.h index 4900649fb..64b9b3bd8 100644 --- a/src/V3LinkLevel.h +++ b/src/V3LinkLevel.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp index 05b16ebd8..66bdf0fb4 100644 --- a/src/V3LinkParse.cpp +++ b/src/V3LinkParse.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -28,6 +28,7 @@ #include "V3Global.h" #include "V3LinkParse.h" #include "V3Ast.h" +#include "V3Config.h" #include #include @@ -106,6 +107,8 @@ private: // VISITs virtual void visit(AstNodeFTask* nodep) { + V3Config::applyFTask(m_modp, nodep); + if (!nodep->user1SetOnce()) { // Process only once. cleanFileline(nodep); m_ftaskp = nodep; @@ -189,6 +192,9 @@ private: return; } + // Maybe this variable has a signal attribute + V3Config::applyVarAttr(m_modp, m_ftaskp, nodep); + if (v3Global.opt.publicFlatRW()) { switch (nodep->varType()) { case AstVarType::VAR: @@ -260,6 +266,7 @@ private: } else if (nodep->attrType() == AstAttrType::VAR_CLOCK) { UASSERT_OBJ(m_varp, nodep, "Attribute not attached to variable"); + nodep->v3warn(DEPRECATED, "sc_clock is deprecated and will be removed"); m_varp->attrScClocked(true); nodep->unlinkFrBack()->deleteTree(); VL_DANGLING(nodep); } @@ -437,6 +444,8 @@ private: } virtual void visit(AstNodeModule* nodep) { + V3Config::applyModule(nodep); + // Module: Create sim table for entire module and iterate cleanFileline(nodep); // @@ -473,6 +482,17 @@ private: visitIterateNoValueMod(nodep); } + virtual void visit(AstBegin* nodep) { + V3Config::applyCoverageBlock(m_modp, nodep); + cleanFileline(nodep); + iterateChildren(nodep); + } + virtual void visit(AstCase* nodep) { + V3Config::applyCase(nodep); + cleanFileline(nodep); + iterateChildren(nodep); + } + virtual void visit(AstNode* nodep) { // Default: Just iterate cleanFileline(nodep); diff --git a/src/V3LinkParse.h b/src/V3LinkParse.h index 54f8ea017..8bf81e799 100644 --- a/src/V3LinkParse.h +++ b/src/V3LinkParse.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp index 62b12faf5..edf2d6dd4 100644 --- a/src/V3LinkResolve.cpp +++ b/src/V3LinkResolve.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkResolve.h b/src/V3LinkResolve.h index ac307ecfa..68dd138c5 100644 --- a/src/V3LinkResolve.h +++ b/src/V3LinkResolve.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3List.h b/src/V3List.h index 50d981902..f78d306a7 100644 --- a/src/V3List.h +++ b/src/V3List.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Localize.cpp b/src/V3Localize.cpp index 00cf2e4d0..2a2969c41 100644 --- a/src/V3Localize.cpp +++ b/src/V3Localize.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Localize.h b/src/V3Localize.h index a57b0acfb..22417e619 100644 --- a/src/V3Localize.h +++ b/src/V3Localize.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Name.cpp b/src/V3Name.cpp index affddbed8..fc4694d82 100644 --- a/src/V3Name.cpp +++ b/src/V3Name.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Name.h b/src/V3Name.h index 870a70c71..6f86ed00c 100644 --- a/src/V3Name.h +++ b/src/V3Name.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Number.cpp b/src/V3Number.cpp index 0696b78be..65f579654 100644 --- a/src/V3Number.cpp +++ b/src/V3Number.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -496,11 +496,18 @@ bool V3Number::displayedFmtLegal(char format) { default: return false; } } + +string V3Number::displayPad(size_t fmtsize, char pad, const string& in) { + string prefix; + if (in.length() < fmtsize) prefix = string(fmtsize - in.length(), pad); + return prefix + in; +} + string V3Number::displayed(AstNode* nodep, const string& vformat) const { return displayed(nodep->fileline(), vformat); } -string V3Number::displayed(FileLine*fl, const string& vformat) const { +string V3Number::displayed(FileLine* fl, const string& vformat) const { string::const_iterator pos = vformat.begin(); UASSERT(pos != vformat.end() && pos[0]=='%', "$display-like function with non format argument "<<*this); @@ -566,6 +573,8 @@ string V3Number::displayed(FileLine*fl, const string& vformat) const { if (fmtsize != "0") str += ' '; } } + size_t fmtsizen = static_cast(atoi(fmtsize.c_str())); + str = displayPad(fmtsizen, ' ', str); return str; } case '~': // Signed decimal @@ -592,12 +601,10 @@ string V3Number::displayed(FileLine*fl, const string& vformat) const { str = cvtToStr(toUQuad()); } } - int intfmtsize = atoi(fmtsize.c_str()); bool zeropad = fmtsize.length()>0 && fmtsize[0]=='0'; - while (static_cast(str.length()) < intfmtsize) { - if (zeropad) str.insert(0, "0"); - else str.insert(0, " "); - } + // fmtsize might have changed since we parsed the %fmtsize + size_t fmtsizen = static_cast(atoi(fmtsize.c_str())); + str = displayPad(fmtsizen, (zeropad ? '0' : ' '), str); return str; } case 'e': @@ -643,7 +650,9 @@ string V3Number::displayed(FileLine*fl, const string& vformat) const { return str; } case '@': { // Packed string - return toString(); + size_t fmtsizen = static_cast(atoi(fmtsize.c_str())); + str = displayPad(fmtsizen, ' ', toString()); + return str; } default: fl->v3fatalSrc("Unknown $display-like format code for number: %"< // open, close +#endif + //###################################################################### // V3 Internal state @@ -370,7 +374,12 @@ string V3Options::filePath(FileLine* fl, const string& modname, const string& la void V3Options::filePathLookedMsg(FileLine* fl, const string& modname) { static bool shown_notfound_msg = false; - if (!shown_notfound_msg) { + if (modname.find("__Vhsh") != string::npos) { + std::cerr << V3Error::warnMore() << "... Unsupported: Name is longer than 127 characters;" + << " automatic file lookup not supported.\n"; + std::cerr << V3Error::warnMore() << "... Suggest putting filename with this module/package" + << " onto command line instead.\n"; + } else if (!shown_notfound_msg) { shown_notfound_msg = true; if (m_impp->m_incDirUsers.empty()) { fl->v3error("This may be because there's no search path specified with -I."<(args[i].c_str()); + std::vector argv; argv.reserve(args.size()+1); + for (std::vector::const_iterator it = args.begin(); it != args.end(); ++it) { + argv.push_back(const_cast(it->c_str())); } - parseOptsList(fl, optdir, args.size(), argv); + argv.push_back(NULL); // argv is NULL-terminated + parseOptsList(fl, optdir, static_cast(argv.size()-1), argv.data()); } //====================================================================== @@ -1404,7 +1414,7 @@ void V3Options::showVersion(bool verbose) { if (!verbose) return; cout < #include #include -#include #include #if defined(_WIN32) || defined(__MINGW32__) +# include // LONG for bcrypt.h on MINGW +# include // BCryptGenRandom +# include # include // mkdir +# include // GetProcessMemoryInfo +# include +#else +# include +# include // usleep #endif @@ -47,11 +63,23 @@ // Environment string V3Os::getenvStr(const string& envvar, const string& defaultValue) { +#if defined(_MSC_VER) + // Note: MinGW does not offer _dupenv_s + char* envvalue; + if (_dupenv_s(&envvalue, nullptr, envvar.c_str()) == 0) { + const std::string result{envvalue}; + free(envvalue); + return result; + } else { + return defaultValue; + } +#else if (const char* envvalue = getenv(envvar.c_str())) { return envvalue; } else { return defaultValue; } +#endif } void V3Os::setenvStr(const string& envvar, const string& value, const string& why) { @@ -60,10 +88,12 @@ void V3Os::setenvStr(const string& envvar, const string& value, const string& wh } else { UINFO(1,"export "<= 200112L)) +#if defined(_WIN32) || defined(__MINGW32__) + _putenv_s(envvar.c_str(), value.c_str()); +#elif defined(_BSD_SOURCE) || (defined(_POSIX_C_SOURCE) && _POSIX_C_SOURCE >= 200112L) setenv(envvar.c_str(), value.c_str(), true); #else - //setenv() replaced by putenv() in MinGW/Solaris environment. Prototype is different + //setenv() replaced by putenv() in Solaris environment. Prototype is different //putenv() requires NAME=VALUE format string vareq = envvar + "=" + value; putenv(const_cast(vareq.c_str())); @@ -130,9 +160,9 @@ string V3Os::filenameSubstitute(const string& filename) { v3fatal("Unmatched brackets in variable substitution in file: "+filename); } string envvar = filename.substr(pos+1, endpos-pos); - const char* envvalue = NULL; - if (envvar != "") envvalue = getenv(envvar.c_str()); - if (envvalue) { + string envvalue; + if (!envvar.empty()) envvalue = getenvStr(envvar, ""); + if (!envvalue.empty()) { out += envvalue; if (brackets==NONE) pos = endpos; else pos = endpos+1; @@ -152,8 +182,8 @@ string V3Os::filenameRealPath(const string& filename) { // If there is a ../ that goes down from the 'root' of this path it is preserved. char retpath[PATH_MAX]; if ( -#if defined( _MSC_VER ) || defined( __MINGW32__ ) - ::_fullpath(retpath, filename.c_str(), PATH_MAX) +#if defined(_WIN32) || defined(__MINGW32__) + _fullpath(retpath, filename.c_str(), PATH_MAX) #else realpath(filename.c_str(), retpath) #endif @@ -188,7 +218,7 @@ string V3Os::getline(std::istream& is, char delim) { void V3Os::createDir(const string& dirname) { #if defined(_WIN32) || defined(__MINGW32__) - mkdir(dirname.c_str()); + _mkdir(dirname.c_str()); #else mkdir(dirname.c_str(), 0777); #endif @@ -199,7 +229,11 @@ void V3Os::unlinkRegexp(const string& dir, const string& regexp) { while (struct dirent* direntp = readdir(dirp)) { if (VString::wildmatch(direntp->d_name, regexp.c_str())) { string fullname = dir + "/" + string(direntp->d_name); +#if defined(_WIN32) || defined(__MINGW32__) + _unlink(fullname.c_str()); +#else unlink(fullname.c_str()); +#endif } } closedir(dirp); @@ -220,15 +254,24 @@ vluint64_t V3Os::rand64(vluint64_t* statep) { } string V3Os::trueRandom(size_t size) { - string data; data.reserve(size); - std::ifstream is ("/dev/urandom", std::ios::in | std::ios::binary); - char bytes[size]; - if (!is.read(bytes, size)) { - v3fatal("Could not open /dev/urandom, no source of randomness. Try specifing a key instead."); - return ""; + string result(size, '\xFF'); + char *const data = const_cast(result.data()); + // Note: std::string.data() returns a non-const Char* from C++17 onwards. + // For pre-C++17, this cast is OK in practice, even though it's UB. +#if defined(_WIN32) || defined(__MINGW32__) + NTSTATUS hr = BCryptGenRandom(NULL, reinterpret_cast(data), size, BCRYPT_USE_SYSTEM_PREFERRED_RNG); + if (!BCRYPT_SUCCESS(hr)) { + v3fatal("Could not acquire random data."); } - data.append(bytes, size); - return data; +#else + std::ifstream is ("/dev/urandom", std::ios::in | std::ios::binary); + // This read uses the size of the buffer. + // Flawfinder: ignore + if (!is.read(data, size)) { + v3fatal("Could not open /dev/urandom, no source of randomness. Try specifying a key instead."); + } +#endif + return result; } //###################################################################### @@ -236,7 +279,13 @@ string V3Os::trueRandom(size_t size) { uint64_t V3Os::timeUsecs() { #if defined(_WIN32) || defined(__MINGW32__) - return 0; + // Microseconds between 1601-01-01 00:00:00 UTC and 1970-01-01 00:00:00 UTC + static const uint64_t EPOCH_DIFFERENCE_USECS = 11644473600000000ull; + + FILETIME ft; // contains number of 0.1us intervals since the beginning of 1601 UTC. + GetSystemTimeAsFileTime(&ft); + uint64_t us = ((static_cast(ft.dwHighDateTime) << 32) + ft.dwLowDateTime + 5ull) / 10ull; + return us - EPOCH_DIFFERENCE_USECS; #else // NOLINTNEXTLINE(cppcoreguidelines-pro-type-member-init) timeval tv; @@ -247,6 +296,12 @@ uint64_t V3Os::timeUsecs() { uint64_t V3Os::memUsageBytes() { #if defined(_WIN32) || defined(__MINGW32__) + HANDLE process = GetCurrentProcess(); + PROCESS_MEMORY_COUNTERS pmc; + if (GetProcessMemoryInfo(process, &pmc, sizeof(pmc))) { + // The best we can do using simple Windows APIs is to get the size of the working set. + return pmc.WorkingSetSize; + } return 0; #else // Highly unportable. Sorry @@ -266,3 +321,13 @@ uint64_t V3Os::memUsageBytes() { return (text + data) * getpagesize(); #endif } + +void V3Os::u_sleep(int64_t usec) { +#if defined(_WIN32) || defined(__MINGW32__) + std::this_thread::sleep_for(std::chrono::microseconds(usec)); +#else + // cppcheck-suppress obsoleteFunctionsusleep + // Flawfinder: ignore + ::usleep(usec); +#endif +} diff --git a/src/V3Os.h b/src/V3Os.h index 261ca0978..08221cb3f 100644 --- a/src/V3Os.h +++ b/src/V3Os.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -58,7 +58,8 @@ public: static vluint64_t rand64(vluint64_t* statep); static string trueRandom(size_t size); - // METHODS (performance) + // METHODS (time & performance) + static void u_sleep(int64_t usec); ///< Sleep for a given number of microseconds. static uint64_t timeUsecs(); ///< Return wall time since epoch in microseconds, or 0 if not implemented static uint64_t memUsageBytes(); ///< Return memory usage in bytes, or 0 if not implemented }; diff --git a/src/V3Param.cpp b/src/V3Param.cpp index 56f4aaed2..517333012 100644 --- a/src/V3Param.cpp +++ b/src/V3Param.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Param.h b/src/V3Param.h index a4b7f71f5..817f76f30 100644 --- a/src/V3Param.h +++ b/src/V3Param.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Parse.h b/src/V3Parse.h index 952e0255b..767649185 100644 --- a/src/V3Parse.h +++ b/src/V3Parse.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp index af9a23c6c..15a0db6d0 100644 --- a/src/V3ParseGrammar.cpp +++ b/src/V3ParseGrammar.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp index ee2705d2f..22913c3e8 100644 --- a/src/V3ParseImp.cpp +++ b/src/V3ParseImp.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h index 73c691bf2..aeb74b67f 100644 --- a/src/V3ParseImp.h +++ b/src/V3ParseImp.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -62,6 +62,7 @@ struct V3ParseBisonYYSType { VSignedState signstate; V3ImportProperty iprop; V3ErrorCode::en errcodeen; + AstAttrType::en attrtypeen; AstNode* nodep; @@ -70,6 +71,7 @@ struct V3ParseBisonYYSType { AstCase* casep; AstCaseItem* caseitemp; AstCell* cellp; + AstClass* classp; AstConst* constp; AstMemberDType* memberp; AstNodeModule* modulep; @@ -86,6 +88,7 @@ struct V3ParseBisonYYSType { AstPatMember* patmemberp; AstPattern* patternp; AstPin* pinp; + AstRefDType* refdtypep; AstSenTree* sentreep; AstVar* varp; AstVarRef* varrefp; diff --git a/src/V3ParseLex.cpp b/src/V3ParseLex.cpp index 937cc4fea..896c785f1 100644 --- a/src/V3ParseLex.cpp +++ b/src/V3ParseLex.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ParseSym.h b/src/V3ParseSym.h index 330b94698..3a820b145 100644 --- a/src/V3ParseSym.h +++ b/src/V3ParseSym.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp index 49a8130b2..0d728968a 100644 --- a/src/V3Partition.cpp +++ b/src/V3Partition.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Partition.h b/src/V3Partition.h index d1f1997ee..dfa737b0b 100644 --- a/src/V3Partition.h +++ b/src/V3Partition.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3PartitionGraph.h b/src/V3PartitionGraph.h index 40fe94932..97450e5a9 100644 --- a/src/V3PartitionGraph.h +++ b/src/V3PartitionGraph.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3PreLex.h b/src/V3PreLex.h index 753b4e847..3a3abbe1a 100644 --- a/src/V3PreLex.h +++ b/src/V3PreLex.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2000-2019 by Wilson Snyder. This program is free software; +// Copyright 2000-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the // GNU Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3PreLex.l b/src/V3PreLex.l index a749e7c65..afd2329f7 100644 --- a/src/V3PreLex.l +++ b/src/V3PreLex.l @@ -10,7 +10,7 @@ * ************************************************************************** * - * Copyright 2003-2019 by Wilson Snyder. This program is free software; + * Copyright 2003-2020 by Wilson Snyder. This program is free software; * you can redistribute it and/or modify it under the terms of either the * GNU Lesser General Public License Version 3 or the Perl Artistic License * Version 2.0. @@ -27,6 +27,9 @@ #include "V3PreProc.h" #include "V3PreLex.h" +#ifdef _WIN32 +# include // for isatty +#endif V3PreLex* V3PreLex::s_currentLexp = NULL; // Current lexing point @@ -241,6 +244,11 @@ bom [\357\273\277] // Note paren level 0 means before "(" of starting args // Level 1 means "," between arguments // Level 2+ means one inside the () of an argument + if (LEXP->m_parenLevel == 1) { // Starting ( + if (!VString::isWhitespace(LEXP->m_defValue)) { + yyerrorf("Illegal text before '(' that starts define arguments"); + } + } if (LEXP->m_parenLevel>1) { appendDefValue(yytext, yyleng); FL_BRK; } else { diff --git a/src/V3PreProc.cpp b/src/V3PreProc.cpp index eed7d8607..8df36ba8c 100644 --- a/src/V3PreProc.cpp +++ b/src/V3PreProc.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2000-2019 by Wilson Snyder. This program is free software; +// Copyright 2000-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the // GNU Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -358,7 +358,7 @@ void V3PreProcImp::define(FileLine* fl, const string& name, const string& value, } string V3PreProcImp::removeDefines(const string& text) { - string val = "0_never_match"; + string val; string rtnsym = text; for (int loopprevent=0; loopprevent<100; loopprevent++) { string xsym = rtnsym; diff --git a/src/V3PreProc.h b/src/V3PreProc.h index 61e9402f7..b7cb47103 100644 --- a/src/V3PreProc.h +++ b/src/V3PreProc.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2000-2019 by Wilson Snyder. This program is free software; +// Copyright 2000-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the // GNU Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3PreShell.cpp b/src/V3PreShell.cpp index 23c856976..54acd7acc 100644 --- a/src/V3PreShell.cpp +++ b/src/V3PreShell.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3PreShell.h b/src/V3PreShell.h index b958a2faf..332083844 100644 --- a/src/V3PreShell.h +++ b/src/V3PreShell.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp index 532054324..93d2ec935 100644 --- a/src/V3Premit.cpp +++ b/src/V3Premit.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Premit.h b/src/V3Premit.h index e47747ec2..cd9c44052 100644 --- a/src/V3Premit.h +++ b/src/V3Premit.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp index 7e4afee3b..434eae0f2 100644 --- a/src/V3ProtectLib.cpp +++ b/src/V3ProtectLib.cpp @@ -92,7 +92,7 @@ class ProtectVisitor : public AstNVisitor { V3Hash hash = V3Hashed::uncachedHash(m_cfilep); m_hashValuep->addText(fl, cvtToStr(hash.fullValue())+";\n"); - m_cHashValuep->addText(fl, cvtToStr(hash.fullValue())+";\n"); + m_cHashValuep->addText(fl, cvtToStr(hash.fullValue())+"U;\n"); m_foundTop = true; } @@ -144,10 +144,10 @@ class ProtectVisitor : public AstNVisitor { // DPI declarations hashComment(txtp, fl); txtp->addText(fl, "import \"DPI-C\" function void "+ - m_libName+"_protectlib_check_hash (int protectlib_hash__V);\n\n"); + m_libName+"_protectlib_check_hash(int protectlib_hash__V);\n\n"); initialComment(txtp, fl); txtp->addText(fl, "import \"DPI-C\" function chandle "+ - m_libName+"_protectlib_create (string scope__V);\n\n"); + m_libName+"_protectlib_create(string scope__V);\n\n"); comboComment(txtp, fl); m_comboPortsp = new AstTextBlock(fl, "import \"DPI-C\" function longint "+ m_libName+"_protectlib_combo_update " @@ -157,21 +157,21 @@ class ProtectVisitor : public AstNVisitor { txtp->addText(fl, ");\n\n"); seqComment(txtp, fl); m_seqPortsp = new AstTextBlock(fl, "import \"DPI-C\" function longint "+ - m_libName+"_protectlib_seq_update " + m_libName+"_protectlib_seq_update" "(\n", false, true); m_seqPortsp->addText(fl, "chandle handle__V\n"); txtp->addNodep(m_seqPortsp); txtp->addText(fl, ");\n\n"); comboIgnoreComment(txtp, fl); m_comboIgnorePortsp = new AstTextBlock(fl, "import \"DPI-C\" function void "+ - m_libName+"_protectlib_combo_ignore " + m_libName+"_protectlib_combo_ignore" "(\n", false, true); m_comboIgnorePortsp->addText(fl, "chandle handle__V\n"); txtp->addNodep(m_comboIgnorePortsp); txtp->addText(fl, ");\n\n"); finalComment(txtp, fl); txtp->addText(fl, "import \"DPI-C\" function void "+ - m_libName+"_protectlib_final (chandle handle__V);\n\n"); + m_libName+"_protectlib_final(chandle handle__V);\n\n"); // Local variables txtp->addText(fl, "chandle handle__V;\n\n"); @@ -187,7 +187,7 @@ class ProtectVisitor : public AstNVisitor { // CPP hash value addComment(txtp, fl, "Hash value to make sure this file and the corresponding"); addComment(txtp, fl, "library agree"); - m_hashValuep = new AstTextBlock(fl, "localparam int protectlib_hash__V =\n"); + m_hashValuep = new AstTextBlock(fl, "localparam int protectlib_hash__V = "); txtp->addNodep(m_hashValuep); txtp->addText(fl, "\n"); @@ -278,8 +278,8 @@ class ProtectVisitor : public AstNVisitor { // Hash check hashComment(txtp, fl); txtp->addText(fl, "void "+m_libName+"_protectlib_check_hash" - " (int protectlib_hash__V) {\n"); - m_cHashValuep = new AstTextBlock(fl, "int expected_hash__V =\n"); + "(int protectlib_hash__V) {\n"); + m_cHashValuep = new AstTextBlock(fl, "int expected_hash__V = "); txtp->addNodep(m_cHashValuep); txtp->addText(fl, "if (protectlib_hash__V != expected_hash__V) {\n"); txtp->addText(fl, "fprintf(stderr, \"%%Error: cannot use "+m_libName+" library, " @@ -300,7 +300,7 @@ class ProtectVisitor : public AstNVisitor { // Updates comboComment(txtp, fl); - m_cComboParamsp = new AstTextBlock(fl, "long long "+m_libName+"_protectlib_combo_update (\n", + m_cComboParamsp = new AstTextBlock(fl, "long long "+m_libName+"_protectlib_combo_update(\n", false, true); m_cComboParamsp->addText(fl, "void* vhandlep__V\n"); txtp->addNodep(m_cComboParamsp); @@ -314,7 +314,7 @@ class ProtectVisitor : public AstNVisitor { txtp->addText(fl, "}\n\n"); seqComment(txtp, fl); - m_cSeqParamsp = new AstTextBlock(fl, "long long "+m_libName+"_protectlib_seq_update (\n", + m_cSeqParamsp = new AstTextBlock(fl, "long long "+m_libName+"_protectlib_seq_update(\n", false, true); m_cSeqParamsp->addText(fl, "void* vhandlep__V\n"); txtp->addNodep(m_cSeqParamsp); @@ -328,7 +328,7 @@ class ProtectVisitor : public AstNVisitor { txtp->addText(fl, "}\n\n"); comboIgnoreComment(txtp, fl); - m_cIgnoreParamsp = new AstTextBlock(fl, "void "+m_libName+"_protectlib_combo_ignore (\n", + m_cIgnoreParamsp = new AstTextBlock(fl, "void "+m_libName+"_protectlib_combo_ignore(\n", false, true); m_cIgnoreParamsp->addText(fl, "void* vhandlep__V\n"); txtp->addNodep(m_cIgnoreParamsp); @@ -337,7 +337,7 @@ class ProtectVisitor : public AstNVisitor { // Final finalComment(txtp, fl); - txtp->addText(fl, "void "+m_libName+"_protectlib_final (void* vhandlep__V) {\n"); + txtp->addText(fl, "void "+m_libName+"_protectlib_final(void* vhandlep__V) {\n"); castPtr(fl, txtp); txtp->addText(fl, "handlep__V->final();\n"); txtp->addText(fl, "delete handlep__V;\n"); diff --git a/src/V3Reloop.cpp b/src/V3Reloop.cpp index 04e1c0885..8a8952a26 100644 --- a/src/V3Reloop.cpp +++ b/src/V3Reloop.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Reloop.h b/src/V3Reloop.h index 9ac6c8f33..15e65499a 100644 --- a/src/V3Reloop.h +++ b/src/V3Reloop.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp index b660053a4..9c157c9a0 100644 --- a/src/V3Scope.cpp +++ b/src/V3Scope.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Scope.h b/src/V3Scope.h index b824ce747..da0b005eb 100644 --- a/src/V3Scope.h +++ b/src/V3Scope.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Scoreboard.cpp b/src/V3Scoreboard.cpp index fb029d0ff..fd36e7c24 100644 --- a/src/V3Scoreboard.cpp +++ b/src/V3Scoreboard.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Scoreboard.h b/src/V3Scoreboard.h index 67cd58f3c..db6362929 100644 --- a/src/V3Scoreboard.h +++ b/src/V3Scoreboard.h @@ -13,7 +13,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3SenTree.h b/src/V3SenTree.h index cfc7a7059..c5e2658dc 100644 --- a/src/V3SenTree.h +++ b/src/V3SenTree.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Simulate.h b/src/V3Simulate.h index 252e8a3ab..280cf1f3c 100644 --- a/src/V3Simulate.h +++ b/src/V3Simulate.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp index 6c0b15d7d..553536850 100644 --- a/src/V3Slice.cpp +++ b/src/V3Slice.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Slice.h b/src/V3Slice.h index 0f207587b..5ceaf2ceb 100644 --- a/src/V3Slice.h +++ b/src/V3Slice.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Split.cpp b/src/V3Split.cpp index 8cdd63194..f14b58111 100644 --- a/src/V3Split.cpp +++ b/src/V3Split.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Split.h b/src/V3Split.h index 97efb9f75..066d062b5 100644 --- a/src/V3Split.h +++ b/src/V3Split.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3SplitAs.cpp b/src/V3SplitAs.cpp index 6f6ae1cd8..c9a78b02e 100644 --- a/src/V3SplitAs.cpp +++ b/src/V3SplitAs.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3SplitAs.h b/src/V3SplitAs.h index 99e2b0dad..5e720fa30 100644 --- a/src/V3SplitAs.h +++ b/src/V3SplitAs.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Stats.cpp b/src/V3Stats.cpp index b11346676..563772280 100644 --- a/src/V3Stats.cpp +++ b/src/V3Stats.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Stats.h b/src/V3Stats.h index e5614c5cd..5bf2f7626 100644 --- a/src/V3Stats.h +++ b/src/V3Stats.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3StatsReport.cpp b/src/V3StatsReport.cpp index 2fefa4a12..a470f1e64 100644 --- a/src/V3StatsReport.cpp +++ b/src/V3StatsReport.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3String.cpp b/src/V3String.cpp index 79869dbdf..ea6a9ed2b 100644 --- a/src/V3String.cpp +++ b/src/V3String.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -74,6 +74,14 @@ bool VString::wildmatch(const char* s, const char* p) { return (*s == '\0'); } +bool VString::wildmatch(const string& s, const string& p) { + return wildmatch(s.c_str(), p.c_str()); +} + +bool VString::isWildcard(const string &p) { + return ((p.find("*") != string::npos) || (p.find("?") != string::npos)); +} + string VString::dot(const string& a, const string& dot, const string& b) { if (b=="") return a; if (a=="") return b; @@ -88,6 +96,14 @@ string VString::downcase(const string& str) { return out; } +string VString::upcase(const string& str) { + string out = str; + for (string::iterator pos = out.begin(); pos != out.end(); ++pos) { + *pos = toupper(*pos); + } + return out; +} + string VString::quotePercent(const string& str) { string out; for (string::const_iterator pos = str.begin(); pos != str.end(); ++pos) { @@ -106,6 +122,13 @@ string VString::spaceUnprintable(const string& str) { return out; } +bool VString::isWhitespace(const string& str) { + for (string::const_iterator pos = str.begin(); pos != str.end(); ++pos) { + if (!isspace(*pos)) return false; + } + return true; +} + //###################################################################### // VHashSha256 diff --git a/src/V3String.h b/src/V3String.h index d04629606..889038777 100644 --- a/src/V3String.h +++ b/src/V3String.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -63,15 +63,23 @@ public: // METHODS (generic string utilities) // Return true if p with ? or *'s matches s static bool wildmatch(const char* s, const char* p); + // Return true if p with ? or *'s matches s + static bool wildmatch(const string& s, const string& p); + // Return true if this is a wildcard string (contains * or ?) + static bool isWildcard(const string &p); // Return {a}{dot}{b}, omitting dot if a or b are empty static string dot(const string& a, const string& dot, const string& b); - // Convert string to lowercase + // Convert string to lowercase (tolower) static string downcase(const string& str); + // Convert string to upper case (toupper) + static string upcase(const string& str); // Replace any %'s with %% static string quotePercent(const string& str); // Replace any unprintable with space // This includes removing tabs, so column tracking is correct static string spaceUnprintable(const string& str); + // Return true if only whitespace or "" + static bool isWhitespace(const string& str); }; //###################################################################### diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp index 3548a0594..0cd561c80 100644 --- a/src/V3Subst.cpp +++ b/src/V3Subst.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Subst.h b/src/V3Subst.h index 081f740e4..573e65ccd 100644 --- a/src/V3Subst.h +++ b/src/V3Subst.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3SymTable.h b/src/V3SymTable.h index b99a5d0f8..da7185397 100644 --- a/src/V3SymTable.h +++ b/src/V3SymTable.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3TSP.h b/src/V3TSP.h index 3d5e72ce1..71e167ef4 100644 --- a/src/V3TSP.h +++ b/src/V3TSP.h @@ -7,7 +7,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Table.cpp b/src/V3Table.cpp index 674a98e33..c8ac2c7ea 100644 --- a/src/V3Table.cpp +++ b/src/V3Table.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Table.h b/src/V3Table.h index 12a4d3f6f..178376d7b 100644 --- a/src/V3Table.h +++ b/src/V3Table.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Task.cpp b/src/V3Task.cpp index 049c0c613..80a97c9ac 100644 --- a/src/V3Task.cpp +++ b/src/V3Task.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -252,6 +252,7 @@ public: m_callGraph.dumpDotFilePrefixed("task_call"); } virtual ~TaskStateVisitor() {} + VL_UNCOPYABLE(TaskStateVisitor); }; //###################################################################### diff --git a/src/V3Task.h b/src/V3Task.h index 53319720b..345b24b55 100644 --- a/src/V3Task.h +++ b/src/V3Task.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp index 6197f8594..ee2b2aed6 100644 --- a/src/V3Trace.cpp +++ b/src/V3Trace.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Trace.h b/src/V3Trace.h index 036f871a8..9bbdce617 100644 --- a/src/V3Trace.h +++ b/src/V3Trace.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp index b9a780c7d..78a416c9f 100644 --- a/src/V3TraceDecl.cpp +++ b/src/V3TraceDecl.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3TraceDecl.h b/src/V3TraceDecl.h index 5cc13e2c0..7111de6a8 100644 --- a/src/V3TraceDecl.h +++ b/src/V3TraceDecl.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp index 7e73db50c..8b982a908 100644 --- a/src/V3Tristate.cpp +++ b/src/V3Tristate.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Tristate.h b/src/V3Tristate.h index b9bbd5a92..f440ed12a 100644 --- a/src/V3Tristate.h +++ b/src/V3Tristate.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp index 1173e97e6..0ca8e06a7 100644 --- a/src/V3Undriven.cpp +++ b/src/V3Undriven.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Undriven.h b/src/V3Undriven.h index 8875450a8..e3b198aaa 100644 --- a/src/V3Undriven.h +++ b/src/V3Undriven.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp index 93d0d2934..3960438a7 100644 --- a/src/V3Unknown.cpp +++ b/src/V3Unknown.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Unknown.h b/src/V3Unknown.h index 6460a5086..9d2b965c4 100644 --- a/src/V3Unknown.h +++ b/src/V3Unknown.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Unroll.cpp b/src/V3Unroll.cpp index 5e9cd7196..516d9331e 100644 --- a/src/V3Unroll.cpp +++ b/src/V3Unroll.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Unroll.h b/src/V3Unroll.h index 728029b5c..d425ffe7d 100644 --- a/src/V3Unroll.h +++ b/src/V3Unroll.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Width.cpp b/src/V3Width.cpp index d17e1c4c6..da4c76c04 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -1568,7 +1568,7 @@ private: AstConst* constp = VN_CAST(itemp->valuep(), Const); if (constp->num().isFourState() && nodep->dtypep()->basicp() && !nodep->dtypep()->basicp()->isFourstate()) - itemp->v3error("Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2019 6.19)"); + itemp->v3error("Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2017 6.19)"); num.opAssign(constp->num()); // Look for duplicates if (inits.find(num) != inits.end()) { // IEEE says illegal @@ -1740,55 +1740,52 @@ private: if (!nodep->fromp()->dtypep()) nodep->fromp()->v3fatalSrc("Unlinked data type"); AstNodeDType* fromDtp = nodep->fromp()->dtypep()->skipRefToEnump(); UINFO(9," from dt "<findMember(nodep->name()); - if (!memberp) { - nodep->v3error("Member "<prettyNameQ()<<" not found in structure"); - } - } - else if (VN_IS(fromDtp, EnumDType) - || VN_IS(fromDtp, AssocArrayDType) - || VN_IS(fromDtp, QueueDType) - || VN_IS(fromDtp, BasicDType)) { + if (memberSelStruct(nodep, adtypep)) return; + } else if (VN_IS(fromDtp, EnumDType) + || VN_IS(fromDtp, AssocArrayDType) + || VN_IS(fromDtp, QueueDType) + || VN_IS(fromDtp, BasicDType)) { // Method call on enum without following parenthesis, e.g. "ENUM.next" // Convert this into a method call, and let that visitor figure out what to do next - AstNode* newp = new AstMethodCall(nodep->fileline(), - nodep->fromp()->unlinkFrBack(), nodep->name(), NULL); + AstNode* newp = new AstMethodCall(nodep->fileline(), nodep->fromp()->unlinkFrBack(), + nodep->name(), NULL); nodep->replaceWith(newp); pushDeletep(nodep); VL_DANGLING(nodep); userIterate(newp, m_vup); return; - } - else { + } else { nodep->v3error("Member selection of non-struct/union object '" - <fromp()->prettyTypeName() - <<"' which is a '"<fromp()->dtypep()->prettyTypeName()<<"'"); + << nodep->fromp()->prettyTypeName() << "' which is a '" + << nodep->fromp()->dtypep()->prettyTypeName() << "'"); } - if (memberp) { + // Error handling + nodep->replaceWith(new AstConst(nodep->fileline(), AstConst::LogicFalse())); + pushDeletep(nodep); VL_DANGLING(nodep); + } + bool memberSelStruct(AstMemberSel* nodep, AstNodeUOrStructDType* adtypep) { + // Returns true if ok + if (AstMemberDType* memberp = adtypep->findMember(nodep->name())) { if (m_attrp) { // Looking for the base of the attribute nodep->dtypep(memberp); - UINFO(9," MEMBERSEL(attr) -> "< "<dtypep()< " << nodep << endl); + UINFO(9, " dt-> " << nodep->dtypep() << endl); } else { AstSel* newp = new AstSel(nodep->fileline(), nodep->fromp()->unlinkFrBack(), memberp->lsb(), memberp->width()); // Must skip over the member to find the union; as the member may disappear later newp->dtypep(memberp->subDTypep()->skipRefToEnump()); newp->didWidth(true); // Don't replace dtype with basic type - UINFO(9," MEMBERSEL -> "< "<dtypep()<replaceWith(newp); - pushDeletep(nodep); VL_DANGLING(nodep); + UINFO(9, " MEMBERSEL -> " << newp << endl); + UINFO(9, " dt-> " << newp->dtypep() << endl); + nodep->replaceWith(newp); pushDeletep(nodep); VL_DANGLING(nodep); // Should be able to treat it as a normal-ish nodesel - maybe. // The lhsp() will be strange until this stage; create the number here? } + return true; } - if (!memberp) { // Very bogus, but avoids core dump - nodep->replaceWith(new AstConst(nodep->fileline(), AstConst::LogicFalse())); - pushDeletep(nodep); VL_DANGLING(nodep); - } + nodep->v3error("Member " << nodep->prettyNameQ() << " not found in structure"); + return false; } virtual void visit(AstCMethodCall* nodep) { @@ -1828,7 +1825,7 @@ private: methodCallString(nodep, basicp); } else { - nodep->v3error("Unsupported: Member call on non-enum object '" + nodep->v3error("Unsupported: Member call on object '" <fromp()->prettyTypeName() <<"' which is a '"<fromp()->dtypep()->prettyTypeName()<<"'"); } @@ -2242,6 +2239,18 @@ private: } } + virtual void visit(AstNew* nodep) { + if (nodep->didWidthAndSet()) return; + userIterateChildren(nodep, WidthVP(SELF, BOTH).p()); + AstClassRefDType* refp = VN_CAST(m_vup->dtypeNullp(), ClassRefDType); + if (!refp) { // e.g. int a = new; + if (refp) UINFO(1, "Got refp "<v3error("new() not expected in this context"); + return; + } + nodep->dtypep(refp); + } + virtual void visit(AstPattern* nodep) { if (nodep->didWidthAndSet()) return; UINFO(9,"PATTERN "<nextp(); break; } - case 'p': { // Packed + case 'p': { // Pattern AstNodeDType* dtypep = argp ? argp->dtypep()->skipRefp() : NULL; AstBasicDType* basicp = dtypep ? dtypep->basicp() : NULL; if (basicp && basicp->isString()) { @@ -2920,9 +2929,27 @@ private: assertAtStatement(nodep); userIterateAndNext(nodep->filenamep(), WidthVP(SELF, BOTH).p()); userIterateAndNext(nodep->memp(), WidthVP(SELF, BOTH).p()); - if (!VN_IS(nodep->memp()->dtypep()->skipRefp(), UnpackArrayDType)) { + AstNodeDType* subp = NULL; + if (AstAssocArrayDType* adtypep + = VN_CAST(nodep->memp()->dtypep()->skipRefp(), AssocArrayDType)) { + subp = adtypep->subDTypep(); + if (!adtypep->keyDTypep()->skipRefp()->basicp() + || !adtypep->keyDTypep()->skipRefp()->basicp()->keyword().isIntNumeric()) { + nodep->memp()->v3error(nodep->verilogKwd() + << " address/key must be integral (IEEE 21.4.1)"); + } + } else if (AstUnpackArrayDType* adtypep + = VN_CAST(nodep->memp()->dtypep()->skipRefp(), UnpackArrayDType)) { + subp = adtypep->subDTypep(); + } else { + nodep->memp()->v3error("Unsupported: " + << nodep->verilogKwd() + << " into other than unpacked or associative array"); + } + if (subp && (!subp->skipRefp()->basicp() + || !subp->skipRefp()->basicp()->keyword().isIntNumeric())) { nodep->memp()->v3error("Unsupported: " << nodep->verilogKwd() - << " into other than unpacked array"); + << " array values must be integral"); } userIterateAndNext(nodep->lsbp(), WidthVP(SELF, BOTH).p()); userIterateAndNext(nodep->msbp(), WidthVP(SELF, BOTH).p()); diff --git a/src/V3Width.h b/src/V3Width.h index 03a76539b..2fcd76764 100644 --- a/src/V3Width.h +++ b/src/V3Width.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3WidthCommit.h b/src/V3WidthCommit.h index 147e4737e..a2afc81ea 100644 --- a/src/V3WidthCommit.h +++ b/src/V3WidthCommit.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp index 8f8f7dd9d..db15b5798 100644 --- a/src/V3WidthSel.cpp +++ b/src/V3WidthSel.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/Verilator.cpp b/src/Verilator.cpp index af197d492..fa742c2c6 100644 --- a/src/Verilator.cpp +++ b/src/Verilator.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -480,7 +480,8 @@ void process() { } // Expand macros and wide operators into C++ primitives - if (!v3Global.opt.xmlOnly() + if (!v3Global.opt.lintOnly() + && !v3Global.opt.xmlOnly() && v3Global.opt.oExpand()) { V3Expand::expandAll(v3Global.rootp()); } diff --git a/src/VlcBucket.h b/src/VlcBucket.h index f719241b2..10881eb75 100644 --- a/src/VlcBucket.h +++ b/src/VlcBucket.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/VlcMain.cpp b/src/VlcMain.cpp index 977500dbd..aa1247fa2 100644 --- a/src/VlcMain.cpp +++ b/src/VlcMain.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -133,7 +133,7 @@ void VlcOptions::showVersion(bool verbose) { if (!verbose) return; cout < free Verilog EDA software tool suite. The latest version is available from CPAN and from L. -Copyright 2008-2019 by Wilson Snyder. This package is free software; you +Copyright 2008-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/src/config_build.h.in b/src/config_build.h.in index 5413ff209..ab0c895ea 100644 --- a/src/config_build.h.in +++ b/src/config_build.h.in @@ -8,7 +8,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/config_rev.pl b/src/config_rev.pl index c3abd9516..cee6695f0 100755 --- a/src/config_rev.pl +++ b/src/config_rev.pl @@ -1,7 +1,7 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # -# Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you +# Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -12,9 +12,10 @@ # GNU General Public License for more details. # ###################################################################### - # DESCRIPTION: Query's subversion to get version number +use warnings; + my $dir = $ARGV[0]; defined $dir or die "%Error: No directory argument,"; chdir $dir; diff --git a/src/cppcheck_filtered b/src/cppcheck_filtered index de51dc5bd..6bc699092 100755 --- a/src/cppcheck_filtered +++ b/src/cppcheck_filtered @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; @@ -220,7 +220,7 @@ This is part of the L free Verilog EDA software tool suite. The latest version is available from CPAN and from L. -Copyright 2014-2019 by Wilson Snyder. This package is free software; you +Copyright 2014-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/src/flexfix b/src/flexfix index 1fa7d3b8b..ac916d9a6 100755 --- a/src/flexfix +++ b/src/flexfix @@ -1,7 +1,7 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # -# Copyright 2002-2019 by Wilson Snyder. Verilator is free software; you +# Copyright 2002-2020 by Wilson Snyder. Verilator is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -12,9 +12,10 @@ # GNU General Public License for more details. # ###################################################################### - # DESCRIPTION: Edits flex output to get around various broken flex issues. +use warnings; + my $Opt_Prefix = $ARGV[0] or die "%Error: No prefix specified,"; foreach my $line () { diff --git a/src/pod2latexfix b/src/pod2latexfix index 7fc68d864..ce6ecaab5 100755 --- a/src/pod2latexfix +++ b/src/pod2latexfix @@ -1,7 +1,7 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # -# Copyright 2002-2019 by Wilson Snyder. Verilator is free software; you +# Copyright 2002-2020 by Wilson Snyder. Verilator is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -12,9 +12,10 @@ # GNU General Public License for more details. # ###################################################################### - # DESCRIPTION: Edits pod2latex output +use warnings; + my $Opt_DistTitle = $ARGV[0] or die "%Error: No disttitle specified,"; my $Opt_DistDate = $ARGV[1] or die "%Error: No distdate specified,"; diff --git a/src/verilog.l b/src/verilog.l index 82fb0b6b8..2cbdc58a3 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -6,7 +6,7 @@ * ************************************************************************** * - * Copyright 2003-2019 by Wilson Snyder. Verilator is free software; + * Copyright 2003-2020 by Wilson Snyder. Verilator is free software; * you can redistribute it and/or modify it under the terms of either the * GNU Lesser General Public License Version 3 or the Perl Artistic License * Version 2.0. @@ -135,16 +135,45 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} {ws} { FL_FWD; FL_BRK; } /* otherwise ignore white-space */ {crnl} { FL_FWD; FL_BRK; } /* Count line numbers */ + "clock_enable" { FL; return yVLT_CLOCK_ENABLE; } + "clocker" { FL; return yVLT_CLOCKER; } + "coverage_block_off" { FL; return yVLT_COVERAGE_BLOCK_OFF; } "coverage_off" { FL; return yVLT_COVERAGE_OFF; } "coverage_on" { FL; return yVLT_COVERAGE_ON; } + "full_case" { FL; return yVLT_FULL_CASE; } + "inline" { FL; return yVLT_INLINE; } + "isolate_assignments" { FL; return yVLT_ISOLATE_ASSIGNMENTS; } "lint_off" { FL; return yVLT_LINT_OFF; } "lint_on" { FL; return yVLT_LINT_ON; } + "no_clocker" { FL; return yVLT_NO_CLOCKER; } + "no_inline" { FL; return yVLT_NO_INLINE; } + "parallel_case" { FL; return yVLT_PARALLEL_CASE; } + "public" { FL; return yVLT_PUBLIC; } + "public_flat" { FL; return yVLT_PUBLIC_FLAT; } + "public_flat_rd" { FL; return yVLT_PUBLIC_FLAT_RD; } + "public_flat_rw" { FL; return yVLT_PUBLIC_FLAT_RW; } + "public_module" { FL; return yVLT_PUBLIC_MODULE; } + "sc_bv" { FL; return yVLT_SC_BV; } + "sformat" { FL; return yVLT_SFORMAT; } "tracing_off" { FL; return yVLT_TRACING_OFF; } "tracing_on" { FL; return yVLT_TRACING_ON; } + -?"-block" { FL; return yVLT_D_BLOCK; } -?"-file" { FL; return yVLT_D_FILE; } + -?"-function" { FL; return yVLT_D_FUNCTION; } -?"-lines" { FL; return yVLT_D_LINES; } + -?"-match" { FL; return yVLT_D_MATCH; } + -?"-module" { FL; return yVLT_D_MODULE; } -?"-msg" { FL; return yVLT_D_MSG; } + -?"-rule" { FL; return yVLT_D_RULE; } + -?"-task" { FL; return yVLT_D_TASK; } + -?"-var" { FL; return yVLT_D_VAR; } + + /* Reachable by attr_event_control */ + "edge" { FL; return yEDGE; } + "negedge" { FL; return yNEGEDGE; } + "or" { FL; return yOR; } + "posedge" { FL; return yPOSEDGE; } } /************************************************************************/ @@ -411,19 +440,21 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "always_comb" { FL; return yALWAYS_COMB; } "always_ff" { FL; return yALWAYS_FF; } "always_latch" { FL; return yALWAYS_LATCH; } - "assume" { FL; return yASSUME; } "assert" { FL; return yASSERT; } + "assume" { FL; return yASSUME; } "bind" { FL; return yBIND; } "bit" { FL; return yBIT; } "break" { FL; return yBREAK; } "byte" { FL; return yBYTE; } "chandle" { FL; return yCHANDLE; } + "class" { FL; return yCLASS; } "clocking" { FL; return yCLOCKING; } "const" { FL; return yCONST__LEX; } "context" { FL; return yCONTEXT; } "continue" { FL; return yCONTINUE; } "cover" { FL; return yCOVER; } "do" { FL; return yDO; } + "endclass" { FL; return yENDCLASS; } "endclocking" { FL; return yENDCLOCKING; } "endinterface" { FL; return yENDINTERFACE; } "endpackage" { FL; return yENDPACKAGE; } @@ -431,6 +462,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "endproperty" { FL; return yENDPROPERTY; } "enum" { FL; return yENUM; } "export" { FL; return yEXPORT; } + "extends" { FL; return yEXTENDS; } "extern" { FL; return yEXTERN; } "final" { FL; return yFINAL; } "forkjoin" { FL; return yFORKJOIN; } @@ -439,15 +471,20 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "inside" { FL; return yINSIDE; } "int" { FL; return yINT; } "interface" { FL; return yINTERFACE; } + "join_any" { FL; return yJOIN_ANY; } + "join_none" { FL; return yJOIN_NONE; } + "local" { FL; return yLOCAL__LEX; } "logic" { FL; return yLOGIC; } "longint" { FL; return yLONGINT; } "modport" { FL; return yMODPORT; } + "new" { FL; return yNEW__LEX; } "null" { FL; return yNULL; } "package" { FL; return yPACKAGE; } "packed" { FL; return yPACKED; } "priority" { FL; return yPRIORITY; } "program" { FL; return yPROGRAM; } "property" { FL; return yPROPERTY; } + "protected" { FL; return yPROTECTED; } "pure" { FL; return yPURE; } "rand" { FL; return yRAND; } "randc" { FL; return yRANDC; } @@ -460,6 +497,8 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "static" { FL; return ySTATIC__ETC; } "string" { FL; return ySTRING; } "struct" { FL; return ySTRUCT; } + "super" { FL; return ySUPER; } + "this" { FL; return yTHIS; } "timeprecision" { FL; return yTIMEPRECISION; } "timeunit" { FL; return yTIMEUNIT; } "type" { FL; return yTYPE; } @@ -467,6 +506,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "union" { FL; return yUNION; } "unique" { FL; return yUNIQUE; } "var" { FL; return yVAR; } + "virtual" { FL; return yVIRTUAL__LEX; } "void" { FL; return yVOID; } /* Generic unsupported warnings */ /* Note assert_strobe was in SystemVerilog 3.1, but removed for SystemVerilog 2005 */ @@ -474,36 +514,25 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "before" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "binsof" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "class" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "constraint" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "covergroup" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "coverpoint" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "cross" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "dist" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "endclass" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "endgroup" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "endsequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "expect" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "extends" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "first_match" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "ignore_bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "illegal_bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "intersect" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "join_any" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "join_none" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "local" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "matches" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "new" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "protected" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "randomize" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "randsequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "sequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "solve" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "super" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "tagged" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "this" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "throughout" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "virtual" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "wait_order" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "wildcard" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "with" { ERROR_RSVD_WORD("SystemVerilog 2005"); } @@ -541,7 +570,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} /* System Verilog 2012 */ { /* Keywords */ - "implements" { ERROR_RSVD_WORD("SystemVerilog 2012"); } + "implements" { FL; return yIMPLEMENTS; } "interconnect" { ERROR_RSVD_WORD("SystemVerilog 2012"); } "nettype" { ERROR_RSVD_WORD("SystemVerilog 2012"); } "soft" { ERROR_RSVD_WORD("SystemVerilog 2012"); } @@ -1013,6 +1042,9 @@ void V3ParseImp::lexToken() { if (token == '(' || token == yCONST__LEX || token == yGLOBAL__LEX + || token == yLOCAL__LEX + || token == yNEW__LEX + || token == yVIRTUAL__LEX // Never put yID_* here; below symbol table resolution would break ) { if (debugFlex()>=6) { cout<<" lexToken: reading ahead to find possible strength"<newString("global"); } } + else if (token == yLOCAL__LEX) { + if (nexttok == yP_COLONCOLON) token = yLOCAL__COLONCOLON; + else token = yLOCAL__ETC; + } + else if (token == yNEW__LEX) { + if (nexttok == '(') token = yNEW__PAREN; + else token = yNEW__ETC; + } + else if (token == yVIRTUAL__LEX) { + if (nexttok == yCLASS) token = yVIRTUAL__CLASS; + else if (nexttok == yINTERFACE) token = yVIRTUAL__INTERFACE; + else if (nexttok == yaID__ETC || nexttok == yaID__LEX) + // || nexttok == yaID__aINTERFACE // but we may not know interfaces yet. + token = yVIRTUAL__anyID; + else token = yVIRTUAL__ETC; + } // If add to above "else if", also add to "if (token" further above } // If an id, change the type based on symbol table @@ -1062,7 +1110,7 @@ void V3ParseImp::lexToken() { if (VN_IS(scp, Typedef)) token = yaID__aTYPE; else if (VN_IS(scp, TypedefFwd)) token = yaID__aTYPE; else if (VN_IS(scp, Package)) token = yaID__aPACKAGE; - //UNSUP else if (VN_IS(scp, NodeClass)) token = yaID__aCLASS; + else if (VN_IS(scp, Class)) token = yaID__aTYPE; //UNSUP else if (VN_IS(scp, CoverGroup)) token = yaID__aCOVERGROUP; else token = yaID__ETC; } else { // Not found diff --git a/src/verilog.y b/src/verilog.y index 803ca0d68..ee6317613 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -273,16 +273,39 @@ class AstSenTree; %token yaSCCTOR "`systemc_implementation BLOCK" %token yaSCDTOR "`systemc_imp_header BLOCK" -%token yVLT_COVERAGE_OFF "coverage_off" -%token yVLT_COVERAGE_ON "coverage_on" -%token yVLT_LINT_OFF "lint_off" -%token yVLT_LINT_ON "lint_on" -%token yVLT_TRACING_OFF "tracing_off" -%token yVLT_TRACING_ON "tracing_on" +%token yVLT_CLOCKER "clocker" +%token yVLT_CLOCK_ENABLE "clock_enable" +%token yVLT_COVERAGE_BLOCK_OFF "coverage_block_off" +%token yVLT_COVERAGE_OFF "coverage_off" +%token yVLT_COVERAGE_ON "coverage_on" +%token yVLT_FULL_CASE "full_case" +%token yVLT_INLINE "inline" +%token yVLT_ISOLATE_ASSIGNMENTS "isolate_assignments" +%token yVLT_LINT_OFF "lint_off" +%token yVLT_LINT_ON "lint_on" +%token yVLT_NO_CLOCKER "no_clocker" +%token yVLT_NO_INLINE "no_inline" +%token yVLT_PARALLEL_CASE "parallel_case" +%token yVLT_PUBLIC "public" +%token yVLT_PUBLIC_FLAT "public_flat" +%token yVLT_PUBLIC_FLAT_RD "public_flat_rd" +%token yVLT_PUBLIC_FLAT_RW "public_flat_rw" +%token yVLT_PUBLIC_MODULE "public_module" +%token yVLT_SC_BV "sc_bv" +%token yVLT_SFORMAT "sformat" +%token yVLT_TRACING_OFF "tracing_off" +%token yVLT_TRACING_ON "tracing_on" -%token yVLT_D_FILE "--file" -%token yVLT_D_LINES "--lines" -%token yVLT_D_MSG "--msg" +%token yVLT_D_BLOCK "--block" +%token yVLT_D_FILE "--file" +%token yVLT_D_FUNCTION "--function" +%token yVLT_D_LINES "--lines" +%token yVLT_D_MODULE "--module" +%token yVLT_D_MATCH "--match" +%token yVLT_D_MSG "--msg" +%token yVLT_D_RULE "--rule" +%token yVLT_D_TASK "--task" +%token yVLT_D_VAR "--var" %token yaD_IGNORE "${ignored-bbox-sys}" %token yaD_DPI "${dpi-sys}" @@ -345,6 +368,7 @@ class AstSenTree; %token yCASEX "casex" %token yCASEZ "casez" %token yCHANDLE "chandle" +%token yCLASS "class" %token yCLOCKING "clocking" %token yCMOS "cmos" %token yCONST__ETC "const" @@ -362,6 +386,7 @@ class AstSenTree; %token yELSE "else" %token yEND "end" %token yENDCASE "endcase" +%token yENDCLASS "endclass" %token yENDCLOCKING "endclocking" %token yENDFUNCTION "endfunction" %token yENDGENERATE "endgenerate" @@ -377,6 +402,7 @@ class AstSenTree; %token yENUM "enum" %token yEVENT "event" %token yEXPORT "export" +%token yEXTENDS "extends" %token yEXTERN "extern" %token yFINAL "final" %token yFOR "for" @@ -393,6 +419,7 @@ class AstSenTree; %token yGLOBAL__LEX "global-in-lex" %token yIF "if" %token yIFF "iff" +%token yIMPLEMENTS "implements" %token yIMPORT "import" %token yINITIAL "initial" %token yINOUT "inout" @@ -402,13 +429,21 @@ class AstSenTree; %token yINTEGER "integer" %token yINTERFACE "interface" %token yJOIN "join" +%token yJOIN_ANY "join_any" +%token yJOIN_NONE "join_none" %token yLOCALPARAM "localparam" +%token yLOCAL__COLONCOLON "local-then-::" +%token yLOCAL__ETC "local" +%token yLOCAL__LEX "local-in-lex" %token yLOGIC "logic" %token yLONGINT "longint" %token yMODPORT "modport" %token yMODULE "module" %token yNAND "nand" %token yNEGEDGE "negedge" +%token yNEW__ETC "new" +%token yNEW__LEX "new-in-lex" +%token yNEW__PAREN "new-then-paren" %token yNMOS "nmos" %token yNOR "nor" %token yNOT "not" @@ -426,6 +461,7 @@ class AstSenTree; %token yPRIORITY "priority" %token yPROGRAM "program" %token yPROPERTY "property" +%token yPROTECTED "protected" %token yPULLDOWN "pulldown" %token yPULLUP "pullup" %token yPURE "pure" @@ -455,10 +491,12 @@ class AstSenTree; %token ySTATIC__ETC "static" %token ySTRING "string" %token ySTRUCT "struct" +%token ySUPER "super" %token ySUPPLY0 "supply0" %token ySUPPLY1 "supply1" %token yTABLE "table" %token yTASK "task" +%token yTHIS "this" %token yTIME "time" %token yTIMEPRECISION "timeprecision" %token yTIMEUNIT "timeunit" @@ -480,6 +518,11 @@ class AstSenTree; %token yUNSIGNED "unsigned" %token yVAR "var" %token yVECTORED "vectored" +%token yVIRTUAL__CLASS "virtual-then-class" +%token yVIRTUAL__ETC "virtual" +%token yVIRTUAL__INTERFACE "virtual-then-interface" +%token yVIRTUAL__LEX "virtual-in-lex" +%token yVIRTUAL__anyID "virtual-then-identifier" %token yVOID "void" %token yWAIT "wait" %token yWAND "wand" @@ -717,6 +760,7 @@ class AstSenTree; // Blank lines for type insertion // Blank lines for type insertion // Blank lines for type insertion +// Blank lines for type insertion %start source_text @@ -801,7 +845,7 @@ package_or_generate_item_declaration: // ==IEEE: package_or_generate_item //UNSUP checker_declaration { $$ = $1; } | dpi_import_export { $$ = $1; } //UNSUP extern_constraint_declaration { $$ = $1; } - //UNSUP class_declaration { $$ = $1; } + | class_declaration { $$ = $1; } // // class_constructor_declaration is part of function_declaration | local_parameter_declaration ';' { $$ = $1; } | parameter_declaration ';' { $$ = $1; } @@ -912,12 +956,18 @@ parameter_value_assignmentE: // IEEE: [ parameter_value_assignment ] | '#' yaFLOATNUM { $$ = new AstPin($2, 1, "", new AstConst($2, AstConst::Unsized32(), (int)(($2<0)?($2-0.5):($2+0.5)))); } + //UNSUP '#' yaTIMENUM { UNSUP } | '#' idClassSel { $$ = new AstPin($2, 1, "", $2); } // // Not needed in Verilator: // // Side effect of combining *_instantiations // // '#' delay_value { UNSUP } ; +parameter_value_assignmentClass: // IEEE: [ parameter_value_assignment ] (for classes) + // // Like parameter_value_assignment, but for classes only, which always have #() + '#' '(' cellparamList ')' { $$ = $3; } + ; + parameter_port_listE: // IEEE: parameter_port_list + empty == parameter_value_assignment /* empty */ { $$ = NULL; } | '#' '(' ')' { $$ = NULL; } @@ -1134,7 +1184,7 @@ anonymous_program_itemList: // IEEE: { anonymous_program_item } anonymous_program_item: // ==IEEE: anonymous_program_item task_declaration { $$ = $1; } | function_declaration { $$ = $1; } - //UNSUP class_declaration { $$ = $1; } + | class_declaration { $$ = $1; } //UNSUP covergroup_declaration { $$ = $1; } // // class_constructor_declaration is part of function_declaration | ';' { $$ = NULL; } @@ -1479,13 +1529,20 @@ simple_type: // ==IEEE: simple_type data_type: // ==IEEE: data_type // // This expansion also replicated elsewhere, IE data_type__AndID data_typeNoRef { $$ = $1; } + // + // // REFERENCES + // // // IEEE: [ class_scope | package_scope ] type_identifier { packed_dimension } - | ps_type packed_dimensionListE { $$ = GRAMMARP->createArray($1,$2,true); } - //UNSUP class_scope_type packed_dimensionListE { UNSUP } // // IEEE: class_type - //UNSUP class_typeWithoutId { $$ = $1; } // // IEEE: ps_covergroup_identifier - // // we put covergroups under ps_type, so can ignore this + // // Don't distinguish between types and classes so all these combined + | package_scopeIdFollowsE idRefDType packed_dimensionListE + { $2->packagep($1); + $$ = GRAMMARP->createArray($2, $3, true); } + | package_scopeIdFollowsE idRefDType parameter_value_assignmentClass packed_dimensionListE + { $2->packagep($1); + BBUNSUP($3->fileline(), "Unsupported: Parameter classes"); + $$ = GRAMMARP->createArray($2, $4, true); } ; data_typeBasic: // IEEE: part of data_type @@ -1503,8 +1560,13 @@ data_typeNoRef: // ==IEEE: data_type, excluding class_type etc referenc | ySTRING { $$ = new AstBasicDType($1,AstBasicDTypeKwd::STRING); } | yCHANDLE { $$ = new AstBasicDType($1,AstBasicDTypeKwd::CHANDLE); } | yEVENT { $$ = new AstBasicDType($1,AstBasicDTypeKwd::BIT); BBUNSUP($1, "Unsupported: event data types"); } - //UNSUP yVIRTUAL__INTERFACE yINTERFACE id/*interface*/ { UNSUP } - //UNSUP yVIRTUAL__anyID id/*interface*/ { UNSUP } + // // Rules overlap virtual_interface_declaration + // // Parameters here are SV2009 + // // IEEE has ['.' modport] but that will conflict with port + // // declarations which decode '.' modport themselves, so + // // instead see data_typeVar + | yVIRTUAL__INTERFACE yINTERFACE id/*interface*/ { $$ = NULL; BBUNSUP($1, "Unsupported: virtual interface"); } + | yVIRTUAL__anyID id/*interface*/ { $$ = NULL; BBUNSUP($1, "Unsupported: virtual data type"); } //UNSUP type_reference { UNSUP } // // IEEE: class_scope: see data_type above // // IEEE: class_type: see data_type above @@ -1522,6 +1584,10 @@ var_data_type: // ==IEEE: var_data_type | yVAR implicit_typeE { $$ = $2; } ; +//UNSUP type_reference: // ==IEEE: type_reference +//UNSUP yTYPE '(' exprOrDataType ')' { UNSUP } +//UNSUP ; + struct_unionDecl: // IEEE: part of data_type // // packedSigningE is NOP for unpacked ySTRUCT packedSigningE '{' { $$ = new AstStructDType($1, $2); SYMP->pushNew($$); } @@ -1569,7 +1635,7 @@ member_decl_assignment: // Derived from IEEE: variable_decl_assignment // // // IEEE: "[ covergroup_variable_identifier ] '=' class_new // // Pushed into variable_declExpr:class_new - //UNSUP '=' class_new { UNSUP } + | '=' class_new { NULL; BBUNSUP($1, "Unsupported: member declaration assignment with new()"); } ; list_of_variable_decl_assignments: // ==IEEE: list_of_variable_decl_assignments @@ -1592,7 +1658,7 @@ variable_decl_assignment: // ==IEEE: variable_decl_assignment // // // IEEE: "[ covergroup_variable_identifier ] '=' class_new // // Pushed into variable_declExpr:class_new - //UNSUP '=' class_new { UNSUP } + | '=' class_new { NULL; BBUNSUP($1, "Unsupported: declaration assignment with new()"); } ; list_of_tf_variable_identifiers: // ==IEEE: list_of_tf_variable_identifiers @@ -1610,8 +1676,8 @@ tf_variable_identifier: // IEEE: part of list_of_tf_variable_identifiers variable_declExpr: // IEEE: part of variable_decl_assignment - rhs of expr expr { $$ = $1; } - //UNSUP dynamic_array_new { $$ = $1; } - //UNSUP class_new { $$ = $1; } + | dynamic_array_new { $$ = $1; } + | class_new { $$ = $1; } ; variable_dimensionListE: // IEEE: variable_dimension + empty @@ -1720,6 +1786,17 @@ data_declaration: // ==IEEE: data_declaration // // IEEE: virtual_interface_declaration // // "yVIRTUAL yID yID" looks just like a data_declaration // // Therefore the virtual_interface_declaration term isn't used + // // 1800-2009: + //UNSUP net_type_declaration { $$ = $1; } + ; + +class_property: // ==IEEE: class_property, which is {property_qualifier} data_declaration + memberQualResetListE data_declarationVarClass { $$ = $2; } + | memberQualResetListE type_declaration { $$ = $2; } + | memberQualResetListE package_import_declaration { $$ = $2; } + // // IEEE: virtual_interface_declaration + // // "yVIRTUAL yID yID" looks just like a data_declaration + // // Therefore the virtual_interface_declaration term isn't used ; data_declarationVar: // IEEE: part of data_declaration @@ -1727,6 +1804,11 @@ data_declarationVar: // IEEE: part of data_declaration data_declarationVarFront list_of_variable_decl_assignments ';' { $$ = $2; } ; +data_declarationVarClass: // IEEE: part of data_declaration (for class_property) + // // The first declaration has complications between assuming what's the type vs ID declaring + data_declarationVarFrontClass list_of_variable_decl_assignments ';' { $$ = $2; } + ; + data_declarationVarFront: // IEEE: part of data_declaration // // Non-ANSI; used inside block followed by ';' // // SEE ALSO port_declaration, tf_port_declaration, port @@ -1749,6 +1831,28 @@ data_declarationVarFront: // IEEE: part of data_declaration // // = class_new is in variable_decl_assignment ; +data_declarationVarFrontClass: // IEEE: part of data_declaration (for class_property) + // // VARRESET called before this rule + // // yCONST is removed, added to memberQual rules + // // implicit_type expanded into /*empty*/ or "signingE rangeList" + yVAR lifetimeE data_type { VARRESET_NONLIST(VAR); VARDTYPE($3); } + | yVAR lifetimeE { VARRESET_NONLIST(VAR); } + | yVAR lifetimeE signingE rangeList { /*VARRESET-in-ddVar*/ VARDTYPE(GRAMMARP->addRange(new AstBasicDType($1, LOGIC_IMPLICIT, $3), $4,true)); } + // + // // Expanded: "constE lifetimeE data_type" + | data_type { VARRESET_NONLIST(VAR); VARDTYPE($1); } + // // lifetime is removed, added to memberQual rules to avoid conflict + // // yCONST is removed, added to memberQual rules to avoid conflict + // // = class_new is in variable_decl_assignment + ; + +//UNSUPnet_type_declaration: // IEEE: net_type_declaration +//UNSUP yNETTYPE data_type idAny/*net_type_identifier*/ ';' { } +//UNSUP // // package_scope part of data_type +//UNSUP | yNETTYPE data_type idAny yWITH__ETC package_scopeIdFollows id/*tf_identifier*/ ';' { } +//UNSUP | yNETTYPE package_scopeIdFollows id/*net_type_identifier*/ idAny/*net_type_identifier*/ ';' { } +//UNSUP ; + implicit_typeE: // IEEE: part of *data_type_or_implicit // // Also expanded in data_declaration /* empty */ { $$ = NULL; } @@ -1756,6 +1860,11 @@ implicit_typeE: // IEEE: part of *data_type_or_implicit | signing { $$ = new AstBasicDType($1, LOGIC_IMPLICIT, $1); } ; +//UNSUPassertion_variable_declaration: // IEEE: assertion_variable_declaration +//UNSUP // // IEEE: var_data_type expanded +//UNSUP var_data_type list_of_variable_decl_assignments ';' { } +//UNSUP ; + type_declaration: // ==IEEE: type_declaration // // Use idAny, as we can redeclare a typedef on an existing typedef yTYPEDEF data_type idAny variable_dimensionListE dtypeAttrListE ';' @@ -1768,8 +1877,8 @@ type_declaration: // ==IEEE: type_declaration | yTYPEDEF yENUM idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } | yTYPEDEF ySTRUCT idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } | yTYPEDEF yUNION idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } - //UNSUP yTYPEDEF yCLASS idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } - //UNSUP yTYPEDEF yINTERFACE yCLASS idAny ';' { ... } + | yTYPEDEF yCLASS idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } + | yTYPEDEF yINTERFACE yCLASS idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($4, *$4); SYMP->reinsert($$); PARSEP->tagNodep($$); } ; dtypeAttrListE: @@ -1893,8 +2002,8 @@ bind_directive: // ==IEEE: bind_directive + bind_target_scope // // ';' - Note IEEE grammar is wrong, includes extra ';' - it's already in module_instantiation // // We merged the rules - id may be a bind_target_instance or module_identifier or interface_identifier yBIND bind_target_instance bind_instantiation { $$ = new AstBind($2, *$2, $3); } - | yBIND bind_target_instance ':' bind_target_instance_list bind_instantiation { - $$=NULL; BBUNSUP($1, "Unsupported: Bind with instance list"); } + | yBIND bind_target_instance ':' bind_target_instance_list bind_instantiation + { $$ = NULL; BBUNSUP($1, "Unsupported: Bind with instance list"); } ; bind_target_instance_list: // ==IEEE: bind_target_instance_list @@ -1924,10 +2033,14 @@ bind_instantiation: // ==IEEE: bind_instantiation // different, so we copy all rules for checkers. generate_region: // ==IEEE: generate_region - yGENERATE genItemList yENDGENERATE { $$ = new AstGenerate($1, $2); } + yGENERATE ~c~genItemList yENDGENERATE { $$ = new AstGenerate($1, $2); } | yGENERATE yENDGENERATE { $$ = NULL; } ; +//UNSUPc_generate_region: // IEEE: generate_region (for checkers) +//UNSUP BISONPRE_COPY(generate_region,{s/~c~/c_/g}) // {copied} +//UNSUP ; + generate_block_or_null: // IEEE: generate_block_or_null // ';' // is included in // // IEEE: generate_block @@ -1937,24 +2050,36 @@ generate_block_or_null: // IEEE: generate_block_or_null ; genItemBegin: // IEEE: part of generate_block - yBEGIN genItemList yEND { $$ = new AstBegin($1,"genblk",$2,true); } + yBEGIN ~c~genItemList yEND { $$ = new AstBegin($1,"genblk",$2,true); } | yBEGIN yEND { $$ = NULL; } - | id ':' yBEGIN genItemList yEND endLabelE { $$ = new AstBegin($1,*$1,$4,true); GRAMMARP->endLabel($6,*$1,$6); } - | id ':' yBEGIN yEND endLabelE { $$ = NULL; GRAMMARP->endLabel($5,*$1,$5); } - | yBEGIN ':' idAny genItemList yEND endLabelE { $$ = new AstBegin($3,*$3,$4,true); GRAMMARP->endLabel($6,*$3,$6); } - | yBEGIN ':' idAny yEND endLabelE { $$ = NULL; GRAMMARP->endLabel($5,*$3,$5); } + | id ':' yBEGIN ~c~genItemList yEND endLabelE { $$ = new AstBegin($1,*$1,$4,true); GRAMMARP->endLabel($6,*$1,$6); } + | id ':' yBEGIN yEND endLabelE { $$ = NULL; GRAMMARP->endLabel($5,*$1,$5); } + | yBEGIN ':' idAny ~c~ genItemList yEND endLabelE { $$ = new AstBegin($3,*$3,$4,true); GRAMMARP->endLabel($6,*$3,$6); } + | yBEGIN ':' idAny yEND endLabelE { $$ = NULL; GRAMMARP->endLabel($5,*$3,$5); } ; +//UNSUPc_genItemBegin: // IEEE: part of generate_block (for checkers) +//UNSUP BISONPRE_COPY(genItemBegin,{s/~c~/c_/g}) // {copied} +//UNSUP ; + genItemOrBegin: // Not in IEEE, but our begin isn't under generate_item ~c~generate_item { $$ = $1; } | ~c~genItemBegin { $$ = $1; } ; +//UNSUPc_genItemOrBegin: // (for checkers) +//UNSUP BISONPRE_COPY(genItemOrBegin,{s/~c~/c_/g}) // {copied} +//UNSUP ; + genItemList: ~c~genItemOrBegin { $$ = $1; } | ~c~genItemList ~c~genItemOrBegin { $$ = $1->addNextNull($2); } ; +//UNSUPc_genItemList: // (for checkers) +//UNSUP BISONPRE_COPY(genItemList,{s/~c~/c_/g}) // {copied} +//UNSUP ; + generate_item: // IEEE: module_or_interface_or_generate_item // // Only legal when in a generate under a module (or interface under a module) module_or_generate_item { $$ = $1; } @@ -1965,12 +2090,23 @@ generate_item: // IEEE: module_or_interface_or_generate_item // // so below in c_generate_item ; +//UNSUPc_generate_item: // IEEE: generate_item (for checkers) +//UNSUP checker_or_generate_item { $$ = $1; } +//UNSUP ; + conditional_generate_construct: // ==IEEE: conditional_generate_construct - yCASE '(' expr ')' ~c~case_generate_itemListE yENDCASE { $$ = new AstGenCase($1,$3,$5); } - | yIF '(' expr ')' generate_block_or_null %prec prLOWER_THAN_ELSE { $$ = new AstGenIf($1,$3,$5,NULL); } - | yIF '(' expr ')' generate_block_or_null yELSE generate_block_or_null { $$ = new AstGenIf($1,$3,$5,$7); } + yCASE '(' expr ')' ~c~case_generate_itemListE yENDCASE + { $$ = new AstGenCase($1, $3, $5); } + | yIF '(' expr ')' ~c~generate_block_or_null %prec prLOWER_THAN_ELSE + { $$ = new AstGenIf($1, $3, $5, NULL); } + | yIF '(' expr ')' ~c~generate_block_or_null yELSE ~c~generate_block_or_null + { $$ = new AstGenIf($1, $3, $5, $7); } ; +//UNSUPc_conditional_generate_construct: // IEEE: conditional_generate_construct (for checkers) +//UNSUP BISONPRE_COPY(conditional_generate_construct,{s/~c~/c_/g}) // {copied} +//UNSUP ; + loop_generate_construct: // ==IEEE: loop_generate_construct yFOR '(' genvar_initialization ';' expr ';' genvar_iteration ')' ~c~generate_block_or_null { // Convert BEGIN(...) to BEGIN(GENFOR(...)), as we need the BEGIN to hide the local genvar @@ -1996,6 +2132,10 @@ loop_generate_construct: // ==IEEE: loop_generate_construct } ; +//UNSUPc_loop_generate_construct: // IEEE: loop_generate_construct (for checkers) +//UNSUP BISONPRE_COPY(loop_generate_construct,{s/~c~/c_/g}) // {copied} +//UNSUP ; + genvar_initialization: // ==IEEE: genvar_initialization varRefBase '=' expr { $$ = new AstAssign($2,$1,$3); } | yGENVAR genvar_identifierDecl '=' constExpr { $$ = $2; $2->addNext(new AstAssign($3,new AstVarRef($2->fileline(),$2,true), $4)); } @@ -2032,12 +2172,20 @@ case_generate_itemList: // IEEE: { case_generate_itemList } | ~c~case_generate_itemList ~c~case_generate_item { $$=$1; $1->addNext($2); } ; +//UNSUPc_case_generate_itemList: // IEEE: { case_generate_item } (for checkers) +//UNSUP BISONPRE_COPY(case_generate_itemList,{s/~c~/c_/g}) // {copied} +//UNSUP ; + case_generate_item: // ==IEEE: case_generate_item caseCondList ':' generate_block_or_null { $$ = new AstCaseItem($2,$1,$3); } | yDEFAULT ':' generate_block_or_null { $$ = new AstCaseItem($1,NULL,$3); } | yDEFAULT generate_block_or_null { $$ = new AstCaseItem($1,NULL,$2); } ; +//UNSUPc_case_generate_item: // IEEE: case_generate_item (for checkers) +//UNSUP BISONPRE_COPY(case_generate_item,{s/~c~/c_/g}) // {copied} +//UNSUP ; + //************************************************ // Assignments and register declarations @@ -2050,6 +2198,13 @@ assignOne: variable_lvalue '=' expr { $$ = new AstAssignW($2,$1,$3); } ; +//UNSUPdelay_or_event_controlE: // IEEE: delay_or_event_control plus empty +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | delay_control { $$ = $1; } +//UNSUP | event_control { $$ = $1; } +//UNSUP | yREPEAT '(' expr ')' event_control { } +//UNSUP ; + delayE: /* empty */ { } | delay_control { $1->v3warn(ASSIGNDLY,"Unsupported: Ignoring delay on this assignment/primitive."); } /* ignored */ @@ -2073,6 +2228,7 @@ delay_value: // ==IEEE:delay_value delayExpr: expr { DEL($1); } // // Verilator doesn't support yaTIMENUM, so not in expr + //UNSUP below doesn't belong here: | yaTIMENUM { } ; @@ -2134,6 +2290,11 @@ rangeList: // IEEE: {packed_dimension} | rangeList anyrange { $$ = $1; $1->addNext($2); } ; +//UNSUPbit_selectE: // IEEE: constant_bit_select (IEEE included empty) +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | '[' constExpr ']' { $$=$1; $$ = "["+$2+"]"; } +//UNSUP ; + // IEEE: select // Merged into more general idArray @@ -2311,9 +2472,10 @@ cellpinItemE: // IEEE: named_port_connection + empty | '.' idAny { $$ = new AstPin($2,PINNUMINC(),*$2,new AstParseRef($2,VParseRefExp::PX_TEXT,*$2,NULL,NULL)); $$->svImplicit(true);} | '.' idAny '(' ')' { $$ = new AstPin($2,PINNUMINC(),*$2,NULL); } // // mintypmax is expanded here, as it might be a UDP or gate primitive + //UNSUP pev_expr below | '.' idAny '(' expr ')' { $$ = new AstPin($2,PINNUMINC(),*$2,$4); } - //UNSUP '.' idAny '(' expr ':' expr ')' { } - //UNSUP '.' idAny '(' expr ':' expr ':' expr ')' { } + //UNSUP '.' idAny '(' pev_expr ':' expr ')' { } + //UNSUP '.' idAny '(' pev_expr ':' expr ':' expr ')' { } // | expr { $$ = new AstPin(FILELINE_OR_CRE($1),PINNUMINC(),"",$1); } //UNSUP expr ':' expr { } @@ -2323,6 +2485,11 @@ cellpinItemE: // IEEE: named_port_connection + empty //************************************************ // EventControl lists +attr_event_controlE: + /* empty */ { $$ = NULL; } + | attr_event_control { $$ = $1; } + ; + attr_event_control: // ==IEEE: event_control '@' '(' event_expression ')' { $$ = new AstSenTree($1,$3); } | '@' '(' '*' ')' { $$ = NULL; } @@ -2339,6 +2506,7 @@ event_control: // ==IEEE: event_control | '@' '(' '*' ')' { $$ = NULL; } | '@' '*' { $$ = NULL; } // // IEEE: hierarchical_event_identifier + // // UNSUP below should be idClassSel | '@' senitemVar { $$ = new AstSenTree($1,$2); } /* For events only */ // // IEEE: sequence_instance // // sequence_instance without parens matches idClassSel above. @@ -2351,9 +2519,13 @@ event_control: // ==IEEE: event_control ; event_expression: // IEEE: event_expression - split over several + //UNSUP // Below are all removed senitem { $$ = $1; } | event_expression yOR senitem { $$ = VN_CAST($1->addNextNull($3), NodeSenItem); } | event_expression ',' senitem { $$ = VN_CAST($1->addNextNull($3), NodeSenItem); } /* Verilog 2001 */ + //UNSUP // Above are all removed, replace with: + //UNSUP ev_expr { $$ = $1; } + //UNSUP event_expression ',' ev_expr %prec yOR { $$ = VN_CAST($1->addNextNull($3), NodeSenItem); } ; senitem: // IEEE: part of event_expression, non-'OR' ',' terms @@ -2374,13 +2546,20 @@ senitemVar: ; senitemEdge: // IEEE: part of event_expression + //UNSUP // Below are all removed yPOSEDGE idClassSel { $$ = new AstSenItem($1, VEdgeType::ET_POSEDGE, $2); } | yNEGEDGE idClassSel { $$ = new AstSenItem($1, VEdgeType::ET_NEGEDGE, $2); } | yEDGE idClassSel { $$ = new AstSenItem($1, VEdgeType::ET_BOTHEDGE, $2); } | yPOSEDGE '(' idClassSel ')' { $$ = new AstSenItem($1, VEdgeType::ET_POSEDGE, $3); } | yNEGEDGE '(' idClassSel ')' { $$ = new AstSenItem($1, VEdgeType::ET_NEGEDGE, $3); } | yEDGE '(' idClassSel ')' { $$ = new AstSenItem($1, VEdgeType::ET_BOTHEDGE, $3); } - //UNSUP yIFF... + //UNSUP // Above are all removed, replace with: + //UNSUP yPOSEDGE expr { UNSUP } + //UNSUP yPOSEDGE expr yIFF expr { UNSUP } + //UNSUP yNEGEDGE expr { UNSUP } + //UNSUP yNEGEDGE expr yIFF expr { UNSUP } + //UNSUP yEDGE expr { UNSUP } + //UNSUP yEDGE expr yIFF expr { UNSUP } ; //************************************************ @@ -2398,8 +2577,24 @@ seq_block: // ==IEEE: seq_block ; par_block: // ==IEEE: par_block - par_blockFront blockDeclStmtList yJOIN endLabelE { $$=$1; $1->addStmtsp($2); SYMP->popScope($1); GRAMMARP->endLabel($4,$1,$4); } - | par_blockFront /**/ yJOIN endLabelE { $$=$1; SYMP->popScope($1); GRAMMARP->endLabel($3,$1,$3); } + par_blockFront blockDeclStmtList yJOIN endLabelE + { $$ = $1; $1->addStmtsp($2); + SYMP->popScope($1); GRAMMARP->endLabel($4, $1, $4); } + | par_blockFront /**/ yJOIN endLabelE + { $$ = $1; + SYMP->popScope($1); GRAMMARP->endLabel($3, $1, $3); } + | par_blockFront blockDeclStmtList yJOIN_ANY endLabelE + { $$ = $1; $1->addStmtsp($2); + SYMP->popScope($1); GRAMMARP->endLabel($4, $1, $4); } + | par_blockFront /**/ yJOIN_ANY endLabelE + { $$ = $1; + SYMP->popScope($1); GRAMMARP->endLabel($3, $1, $3); } + | par_blockFront blockDeclStmtList yJOIN_NONE endLabelE + { $$ = $1; $1->addStmtsp($2); + SYMP->popScope($1); GRAMMARP->endLabel($4, $1, $4); } + | par_blockFront /**/ yJOIN_NONE endLabelE + { $$ = $1; + SYMP->popScope($1); GRAMMARP->endLabel($3, $1, $3); } ; seq_blockFront: // IEEE: part of seq_block @@ -2409,7 +2604,9 @@ seq_blockFront: // IEEE: part of seq_block par_blockFront: // IEEE: part of par_block yFORK { $$ = new AstBegin($1, "", NULL); SYMP->pushNew($$); - BBUNSUP($1, "Unsupported: fork statements"); } + BBUNSUP($1, "Unsupported: fork statements"); + // When support, record or BBUNSUP yJOIN_ANY/yJOIN_NONE + } | yFORK ':' idAny/*new-block_identifier*/ { $$ = new AstBegin($3, *$3, NULL); SYMP->pushNew($$); BBUNSUP($1, "Unsupported: fork statements"); } ; @@ -2453,8 +2650,8 @@ statement_item: // IEEE: statement_item // // IEEE: blocking_assignment // // 1800-2009 restricts LHS of assignment to new to not have a range // // This is ignored to avoid conflicts - //UNSUP fexprLvalue '=' class_new ';' { UNSUP } - //UNSUP fexprLvalue '=' dynamic_array_new ';' { UNSUP } + | fexprLvalue '=' class_new ';' { $$ = new AstAssign($2, $1, $3); } + | fexprLvalue '=' dynamic_array_new ';' { $$ = new AstAssign($2, $1, $3); } // // // IEEE: nonblocking_assignment | fexprLvalue yP_LTE delayE expr ';' { $$ = new AstAssignDly($2,$1,$4); } @@ -2524,9 +2721,9 @@ statement_item: // IEEE: statement_item // // Because we've joined class_constructor_declaration into generic functions // // Way over-permissive; // // IEEE: [ ySUPER '.' yNEW [ '(' list_of_arguments ')' ] ';' ] - //UNSUP fexpr '.' class_new ';' { } + | fexpr '.' class_new ';' { $$ = NULL; BBUNSUP($1, "Unsupported: dotted new"); } // - | statementVerilatorPragmas { $$ = $1; } + | statementVerilatorPragmas { $$ = $1; } // // // IEEE: disable_statement | yDISABLE idAny/*hierarchical_identifier-task_or_block*/ ';' { $$ = new AstDisable($1,*$2); } @@ -2600,6 +2797,21 @@ statementVerilatorPragmas: yVL_COVERAGE_BLOCK_OFF { $$ = new AstPragma($1,AstPragmaType::COVERAGE_BLOCK_OFF); } ; +//UNSUPoperator_assignment: // IEEE: operator_assignment +//UNSUP ~f~exprLvalue '=' delay_or_event_controlE expr { } +//UNSUP | ~f~exprLvalue yP_PLUSEQ expr { } +//UNSUP | ~f~exprLvalue yP_MINUSEQ expr { } +//UNSUP | ~f~exprLvalue yP_TIMESEQ expr { } +//UNSUP | ~f~exprLvalue yP_DIVEQ expr { } +//UNSUP | ~f~exprLvalue yP_MODEQ expr { } +//UNSUP | ~f~exprLvalue yP_ANDEQ expr { } +//UNSUP | ~f~exprLvalue yP_OREQ expr { } +//UNSUP | ~f~exprLvalue yP_XOREQ expr { } +//UNSUP | ~f~exprLvalue yP_SLEFTEQ expr { } +//UNSUP | ~f~exprLvalue yP_SRIGHTEQ expr { } +//UNSUP | ~f~exprLvalue yP_SSRIGHTEQ expr { } +//UNSUP ; + foperator_assignment: // IEEE: operator_assignment (for first part of expression) fexprLvalue '=' delayE expr { $$ = new AstAssign($2,$1,$4); } | fexprLvalue '=' yD_FOPEN '(' expr ')' { $$ = NULL; BBUNSUP($3, "Unsupported: $fopen with multichannel descriptor. Add ,\"w\" as second argument to open a file descriptor."); } @@ -2618,14 +2830,56 @@ foperator_assignment: // IEEE: operator_assignment (for first part of exp | fexprLvalue yP_SLEFTEQ expr { $$ = new AstAssign($2,$1,new AstShiftL ($2,$1->cloneTree(true),$3)); } | fexprLvalue yP_SRIGHTEQ expr { $$ = new AstAssign($2,$1,new AstShiftR ($2,$1->cloneTree(true),$3)); } | fexprLvalue yP_SSRIGHTEQ expr { $$ = new AstAssign($2,$1,new AstShiftRS($2,$1->cloneTree(true),$3)); } + //UNSUP replace above with: + //UNSUP BISONPRE_COPY(operator_assignment,{s/~f~/f/g}) // {copied} ; +//UNSUPinc_or_dec_expression: // ==IEEE: inc_or_dec_expression +//UNSUP // // Need fexprScope instead of variable_lvalue to prevent conflict +//UNSUP ~l~exprScope yP_PLUSPLUS { $$=$1; $$ = $1+$2; } +//UNSUP | ~l~exprScope yP_MINUSMINUS { $$=$1; $$ = $1+$2; } +//UNSUP // // Need expr instead of variable_lvalue to prevent conflict +//UNSUP | yP_PLUSPLUS expr { $$=$1; $$ = $1+$2; } +//UNSUP | yP_MINUSMINUS expr { $$=$1; $$ = $1+$2; } +//UNSUP ; + finc_or_dec_expression: // ==IEEE: inc_or_dec_expression - //UNSUP: Generic scopes in incrementes + //UNSUP: Generic scopes in incrementes, remove below fexprLvalue yP_PLUSPLUS { $$ = new AstAssign($2,$1,new AstAdd ($2,$1->cloneTree(true),new AstConst($2, AstConst::StringToParse(), "'b1"))); } | fexprLvalue yP_MINUSMINUS { $$ = new AstAssign($2,$1,new AstSub ($2,$1->cloneTree(true),new AstConst($2, AstConst::StringToParse(), "'b1"))); } | yP_PLUSPLUS fexprLvalue { $$ = new AstAssign($1,$2,new AstAdd ($1,$2->cloneTree(true),new AstConst($1, AstConst::StringToParse(), "'b1"))); } | yP_MINUSMINUS fexprLvalue { $$ = new AstAssign($1,$2,new AstSub ($1,$2->cloneTree(true),new AstConst($1, AstConst::StringToParse(), "'b1"))); } + //UNSUP: Generic scopes in incrementes, remove above + //UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/f/g}) // {copied} + ; + +//UNSUPsinc_or_dec_expression: // IEEE: inc_or_dec_expression (for sequence_expression) +//UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/s/g}) // {copied} +//UNSUP ; + +//UNSUPpinc_or_dec_expression: // IEEE: inc_or_dec_expression (for property_expression) +//UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/p/g}) // {copied} +//UNSUP ; + +//UNSUPev_inc_or_dec_expression: // IEEE: inc_or_dec_expression (for ev_expr) +//UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/ev_/g}) // {copied} +//UNSUP ; + +//UNSUPpev_inc_or_dec_expression: // IEEE: inc_or_dec_expression (for pev_expr) +//UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/pev_/g}) // {copied} +//UNSUP ; + +class_new: // ==IEEE: class_new + // // Special precence so (...) doesn't match expr + yNEW__ETC { $$ = new AstNew($1); } + | yNEW__ETC expr { $$ = new AstNew($1); BBUNSUP($1, "Unsupported: new with expression"); } + // // Grammer abiguity; we assume "new (x)" the () are a argument, not expr + | yNEW__PAREN '(' list_of_argumentsE ')' { $$ = new AstNew($1); BBUNSUP($1, "Unsupported: new with arguments"); } + ; + +dynamic_array_new: // ==IEEE: dynamic_array_new + yNEW__ETC '[' expr ']' { $$ = new AstNew($1); BBUNSUP($1, "Unsupported: Dynamic array new"); } + | yNEW__ETC '[' expr ']' '(' expr ')' { $$ = new AstNew($1); BBUNSUP($1, "Unsupported: Dynamic array new"); } ; //************************************************ @@ -2650,6 +2904,11 @@ caseAttrE: | caseAttrE yVL_PARALLEL_CASE { GRAMMARP->m_caseAttrp->parallelPragma(true); } ; +//UNSUPcase_patternListE: // IEEE: case_pattern_item +//UNSUP // &&& is part of expr so aliases to case_itemList +//UNSUP case_itemListE { $$ = $1; } +//UNSUP ; + case_itemListE: // IEEE: [ { case_item } ] /* empty */ { $$ = NULL; } | case_itemList { $$ = $1; } @@ -2692,6 +2951,11 @@ value_range: // ==IEEE: value_range | '[' expr ':' expr ']' { $$ = new AstInsideRange($1, $2, $4); } ; +//UNSUPcovergroup_value_range: // ==IEEE-2012: covergroup_value_range +//UNSUP cgexpr { $$ = $1; } +//UNSUP | '[' cgexpr ':' cgexpr ']' { } +//UNSUP ; + caseCondList: // IEEE: part of case_item expr { $$ = $1; } | caseCondList ',' expr { $$ = $1;$1->addNext($3); } @@ -2788,6 +3052,7 @@ for_initializationItem: // IEEE: variable_assignment + for_variable_decl $$ = VARDONEA($3,*$3,NULL,NULL); $$->addNext(new AstAssign($4, new AstVarRef($3, *$3, true), $5));} // // IEEE: variable_assignment + // // UNSUP variable_lvalue below | varRefBase '=' expr { $$ = new AstAssign($2, $1, $3); } ; @@ -2797,8 +3062,22 @@ for_stepE: // IEEE: for_step + empty ; for_step: // IEEE: for_step + for_step_assignment { $$ = $1; } + | for_step ',' for_step_assignment { $$ = $1; $1->v3error("Unsupported: for loop step after the first comma"); } + ; + +for_step_assignment: // ==IEEE: for_step_assignment + //UNSUP operator_assignment { $$ = $1; } + // + //UNSUP inc_or_dec_expression { $$ = $1; } + // // IEEE: subroutine_call + //UNSUP function_subroutine_callNoMethod { $$ = $1; } + // // method_call:array_method requires a '.' + //UNSUP expr '.' array_methodNoRoot { } + //UNSUP exprScope { $$ = $1; } + //UNSUP remove below genvar_iteration { $$ = $1; } - | for_step ',' genvar_iteration { $$ = $1; $1->v3error("Unsupported: for loop step after the first comma"); } + //UNSUP remove above ; loop_variables: // IEEE: loop_variables @@ -2827,23 +3106,34 @@ funcRef: // IEEE: part of tf_call // id '(' list_of_argumentsE ')' { $$ = new AstFuncRef($1, *$1, $3); } | package_scopeIdFollows id '(' list_of_argumentsE ')' { $$ = AstDot::newIfPkg($2, $1, new AstFuncRef($2,*$2,$4)); } + //UNSUP list_of_argumentE should be pev_list_of_argumentE //UNSUP: idDotted is really just id to allow dotted method calls ; task_subroutine_callNoMethod: // function_subroutine_callNoMethod (as task) // // IEEE: tf_call taskRef { $$ = $1; } + //UNSUP funcRef yWITH__PAREN '(' expr ')' { /*UNSUP*/ } | system_t_call { $$ = $1; } // // IEEE: method_call requires a "." so is in expr - //UNSUP randomize_call { $$ = $1; } + // // IEEE: ['std::'] not needed, as normal std package resolution will find it + // // IEEE: randomize_call + // // We implement randomize as a normal funcRef, since randomize isn't a keyword + // // Note yNULL is already part of expressions, so they come for free + //UNSUP funcRef yWITH__CUR constraint_block { } ; function_subroutine_callNoMethod: // IEEE: function_subroutine_call (as function) // // IEEE: tf_call funcRef { $$ = $1; } + //UNSUP funcRef yWITH__PAREN '(' expr ')' { /*UNSUP*/ } | system_f_call { $$ = $1; } // // IEEE: method_call requires a "." so is in expr - //UNSUP randomize_call { $$ = $1; } + // // IEEE: ['std::'] not needed, as normal std package resolution will find it + // // IEEE: randomize_call + // // We implement randomize as a normal funcRef, since randomize isn't a keyword + // // Note yNULL is already part of expressions, so they come for free + //UNSUP funcRef yWITH__CUR constraint_block { } ; system_t_call: // IEEE: system_tf_call (as task) @@ -3010,6 +3300,14 @@ elaboration_system_task_guts: // IEEE: part of elaboration_system_task (1 | yD_FATAL '(' expr ',' exprListE ')' { $$ = new AstElabDisplay($1, AstDisplayType::DT_FATAL, $5); DEL($3); } ; +//UNSUPproperty_actual_arg: // ==IEEE: property_actual_arg +//UNSUP // // IEEE: property_expr +//UNSUP // // IEEE: sequence_actual_arg +//UNSUP pev_expr { $$ = $1; } +//UNSUP // // IEEE: sequence_expr +//UNSUP // // property_expr already includes sequence_expr +//UNSUP ; + exprOrDataType: // expr | data_type: combined to prevent conflicts expr { $$ = $1; } // // data_type includes id that overlaps expr, so special flavor @@ -3018,6 +3316,20 @@ exprOrDataType: // expr | data_type: combined to prevent conflicts //UNSUP event_control { } ; +//UNSUPexprOrDataTypeOrMinTypMax: // exprOrDataType or mintypmax_expression +//UNSUP expr { $$ = $1; } +//UNSUP | expr ':' expr ':' expr { $$ = $3; } +//UNSUP // // data_type includes id that overlaps expr, so special flavor +//UNSUP | data_type { $$ = $1; } +//UNSUP // // not in spec, but needed for $past(sig,1,,@(posedge clk)) +//UNSUP | event_control { $$ = $1; } +//UNSUP ; + +//UNSUPexprOrDataTypeList: +//UNSUP exprOrDataType { $$ = $1; } +//UNSUP | exprOrDataTypeList ',' exprOrDataType { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + list_of_argumentsE: // IEEE: [list_of_arguments] argsDottedList { $$ = $1; } | argsExprListE { if (VN_IS($1, Arg) && VN_CAST($1, Arg)->emptyConnectNoNext()) { $1->deleteTree(); $$ = NULL; } // Mis-created when have 'func()' @@ -3041,6 +3353,10 @@ function_declaration: // IEEE: function_declaration + function_body_decl { $$ = $3; $3->attrIsolateAssign($4); $$->addStmtsp($5); SYMP->popScope($$); GRAMMARP->endLabel($7,$$,$7); } + | yFUNCTION lifetimeE funcIdNew funcIsolateE tfGuts yENDFUNCTION endLabelE + { $$ = $3; $3->attrIsolateAssign($4); $$->addStmtsp($5); + SYMP->popScope($$); + GRAMMARP->endLabel($7,$$,$7); } ; function_prototype: // IEEE: function_prototype @@ -3048,6 +3364,11 @@ function_prototype: // IEEE: function_prototype | yFUNCTION funcId { $$=$2; $$->prototype(true); SYMP->popScope($$); } ; +class_constructor_prototype: // ==IEEE: class_constructor_prototype + yFUNCTION funcIdNew '(' tf_port_listE ')' ';' { $$ = $2; $$->addStmtsp($4); $$->prototype(true); SYMP->popScope($$); } + | yFUNCTION funcIdNew ';' { $$ = $2; $$->prototype(true); SYMP->popScope($$); } + ; + funcIsolateE: /* empty */ { $$ = 0; } | yVL_ISOLATE_ASSIGNMENTS { $$ = 1; } @@ -3099,11 +3420,27 @@ funcId: // IEEE: function_data_type_or_implicit + part of function_bod SYMP->pushNewUnder($$, NULL); } ; +funcIdNew: // IEEE: from class_constructor_declaration + yNEW__ETC + { $$ = new AstFunc($1, "new", NULL, NULL); + BBUNSUP($1, "Unsupported: new constructor"); + SYMP->pushNewUnder($$, NULL); } + | yNEW__PAREN + { $$ = new AstFunc($1, "new", NULL, NULL); + BBUNSUP($1, "Unsupported: new constructor"); + SYMP->pushNewUnder($$, NULL); } + | class_scopeWithoutId yNEW__PAREN + { $$ = new AstFunc($2, "new", NULL, NULL); + BBUNSUP($2, "Unsupported: scoped new constructor"); + SYMP->pushNewUnder($$, NULL); } + ; + tfIdScoped: // IEEE: part of function_body_declaration/task_body_declaration // // IEEE: [ interface_identifier '.' | class_scope ] function_identifier id { $$=$1; $$ = $1; } - //UNSUP id/*interface_identifier*/ '.' id { UNSUP } - //UNSUP class_scope_id { UNSUP } + | id/*interface_identifier*/ '.' id { $$=$3; $$ = $3; BBUNSUP($2, "Unsupported: Out of block function declaration"); } + | class_scopeIdFollows id { $$=$2; $$=$1; $$=$2; + BBUNSUP($1, "Unsupported: Out of class block function declaration"); } ; tfGuts: @@ -3194,6 +3531,7 @@ array_methodNoRoot: yOR { $$ = new AstFuncRef($1, "or", NULL); } | yAND { $$ = new AstFuncRef($1, "and", NULL); } | yXOR { $$ = new AstFuncRef($1, "xor", NULL); } + //UNSUP yUNIQUE { $$ = new AstFuncRef($1, "unique", NULL); } ; dpi_import_export: // ==IEEE: dpi_import_export @@ -3300,9 +3638,18 @@ expr: // IEEE: part of expression/constant_expression/primary | ~l~expr yP_SRIGHT ~r~expr { $$ = new AstShiftR ($2,$1,$3); } | ~l~expr yP_SSRIGHT ~r~expr { $$ = new AstShiftRS ($2,$1,$3); } | ~l~expr yP_LTMINUSGT ~r~expr { $$ = new AstLogEq ($2,$1,$3); } + // + // // IEEE: expr yP_MINUSGT expr (1800-2009) + // // Conflicts with constraint_expression:"expr yP_MINUSGT constraint_set" + // // To duplicating expr for constraints, just allow the more general form + // // Later Ast processing must ignore constraint terms where inappropriate + //UNSUP ~l~expr yP_MINUSGT constraint_set { $$=$1; $$ = $1+$2+$3; } + //UNSUP remove line below + | ~l~expr yP_MINUSGT ~r~expr { $$ = new AstLogIf($2, $1, $3); } + // // // <= is special, as we need to disambiguate it with <= assignment // // We copy all of expr to fexpr and rename this token to a fake one. - | ~l~expr yP_LTE~f__IGNORE~ ~r~expr { $$ = new AstLte ($2,$1,$3); } + | ~l~expr yP_LTE~f__IGNORE~ ~r~expr { $$ = new AstLte($2, $1, $3); } // // // IEEE: conditional_expression | ~l~expr '?' ~r~expr ':' ~r~expr { $$ = new AstCond($2,$1,$3,$5); } @@ -3314,10 +3661,6 @@ expr: // IEEE: part of expression/constant_expression/primary //UNSUP yTAGGED id/*member*/ %prec prTAGGED { UNSUP } //UNSUP yTAGGED id/*member*/ %prec prTAGGED expr { UNSUP } // - //======================// PSL expressions - // - | ~l~expr yP_MINUSGT ~r~expr { $$ = new AstLogIf ($2,$1,$3); } - // //======================// IEEE: primary/constant_primary // // // IEEE: primary_literal (minus string, which is handled specially) @@ -3337,6 +3680,7 @@ expr: // IEEE: part of expression/constant_expression/primary // // // IEEE: multiple_concatenation/constant_multiple_concatenation | '{' constExpr '{' cateList '}' '}' { $$ = new AstReplicate($3, $4, $2); } + // // UNSUP some other rules above // | function_subroutine_callNoMethod { $$ = $1; } // // method_call @@ -3370,8 +3714,7 @@ expr: // IEEE: part of expression/constant_expression/primary // // Indistinguishable from function_subroutine_call:method_call // | '$' { $$ = new AstUnbounded($1); } - | yNULL { $$ = new AstConst($1, AstConst::LogicFalse()); - BBUNSUP($1, "Unsupported: null expression"); } + | yNULL { $$ = new AstConst($1, AstConst::LogicFalse()); } // // IEEE: yTHIS // // See exprScope // @@ -3402,6 +3745,35 @@ fexpr: // For use as first part of statement (disambiguates <=) BISONPRE_COPY(expr,{s/~l~/f/g; s/~r~/f/g; s/~f__IGNORE~/__IGNORE/g;}) // {copied} ; +//UNSUPev_expr: // IEEE: event_expression +//UNSUP // // for yOR/, see event_expression +//UNSUP // +//UNSUP // // IEEE: [ edge_identifier ] expression [ yIFF expression ] +//UNSUP // // expr alone see below +//UNSUP senitemEdge { $$ = $1; } +//UNSUP | ev_expr yIFF expr { } +//UNSUP // +//UNSUP // // IEEE: sequence_instance [ yIFF expression ] +//UNSUP // // seq_inst is in expr, so matches senitem rule above +//UNSUP // +//UNSUP // // IEEE: event_expression yOR event_expression +//UNSUP | ev_expr yOR ev_expr { } +//UNSUP // // IEEE: event_expression ',' event_expression +//UNSUP // // See real event_expression rule +//UNSUP // +//UNSUP //--------------------- +//UNSUP // // IEEE: expr +//UNSUP | BISONPRE_COPY(expr,{s/~l~/ev_/g; s/~r~/ev_/g; s/~p~/ev_/g; s/~noPar__IGNORE~/yP_PAR__IGNORE /g;}) // {copied} +//UNSUP // +//UNSUP // // IEEE: '(' event_expression ')' +//UNSUP // // expr:'(' x ')' conflicts with event_expression:'(' event_expression ')' +//UNSUP // // so we use a special expression class +//UNSUP | '(' event_expression ')' { $$=$1; $$ = "(...)"; } +//UNSUP // // IEEE: From normal expr: '(' expr ':' expr ':' expr ')' +//UNSUP // // But must avoid conflict +//UNSUP | '(' event_expression ':' expr ':' expr ')' { $$=$1; $$ = "(...)"; } +//UNSUP ; + exprNoStr: // expression with string removed BISONPRE_COPY(expr,{s/~noStr__IGNORE~/Ignore/g;}) // {copied} ; @@ -3432,6 +3804,22 @@ fexprOkLvalue: // exprOkLValue, For use as first part of statement (disa BISONPRE_COPY(exprOkLvalue,{s/~l~/f/g}) // {copied} ; +//UNSUPsexprOkLvalue: // exprOkLValue, For use by sequence_expr +//UNSUP BISONPRE_COPY(exprOkLvalue,{s/~l~/s/g}) // {copied} +//UNSUP ; + +//UNSUPpexprOkLvalue: // exprOkLValue, For use by property_expr +//UNSUP BISONPRE_COPY(exprOkLvalue,{s/~l~/p/g}) // {copied} +//UNSUP ; + +//UNSUPev_exprOkLvalue: // exprOkLValue, For use by ev_expr +//UNSUP BISONPRE_COPY(exprOkLvalue,{s/~l~/ev_/g}) // {copied} +//UNSUP ; + +//UNSUPpev_exprOkLvalue: // exprOkLValue, For use by ev_expr +//UNSUP BISONPRE_COPY(exprOkLvalue,{s/~l~/pev_/g}) // {copied} +//UNSUP ; + fexprLvalue: // For use as first part of statement (disambiguates <=) fexprOkLvalue { $$=$1; $$ = $1; } ; @@ -3444,21 +3832,39 @@ exprScope: // scope and variable for use to inside an expression // // IEEE: [ implicit_class_handle . | class_scope | package_scope ] hierarchical_identifier select // // Or method_call_body without parenthesis // // See also varRefClassBit, which is the non-expr version of most of this - //UNSUP yTHIS { UNSUP } - idArrayed { $$ = $1; } + yTHIS { $$ = new AstConst($1, AstConst::LogicFalse()); + BBUNSUP($1, "Unsupported: this"); } + | idArrayed { $$ = $1; } | package_scopeIdFollows idArrayed { $$ = AstDot::newIfPkg($2->fileline(), $1, $2); } - //UNSUP class_scopeIdFollows idArrayed { UNSUP } + | class_scopeIdFollows idArrayed { $$ = $2; BBUNSUP($1, "Unsupported: scoped class reference"); } | ~l~expr '.' idArrayed { $$ = new AstDot($2,$1,$3); } // // expr below must be a "yTHIS" - //UNSUP ~l~expr '.' ySUPER { UNSUP } + | ~l~expr '.' ySUPER { $$ = $1; BBUNSUP($3, "Unsupported: super"); } // // Part of implicit_class_handle - //UNSUP ySUPER { UNSUP } + | ySUPER { $$ = new AstConst($1, AstConst::LogicFalse()); + BBUNSUP($1, "Unsupported: super"); } ; fexprScope: // exprScope, For use as first part of statement (disambiguates <=) BISONPRE_COPY(exprScope,{s/~l~/f/g}) // {copied} ; +//UNSUPsexprScope: // exprScope, For use by sequence_expr +//UNSUP BISONPRE_COPY(exprScope,{s/~l~/s/g}) // {copied} +//UNSUP ; + +//UNSUPpexprScope: // exprScope, For use by property_expr +//UNSUP BISONPRE_COPY(exprScope,{s/~l~/p/g}) // {copied} +//UNSUP ; + +//UNSUPev_exprScope: // exprScope, For use by ev_expr +//UNSUP BISONPRE_COPY(exprScope,{s/~l~/ev_/g}) // {copied} +//UNSUP ; + +//UNSUPpev_exprScope: // exprScope, For use by ev_expr +//UNSUP BISONPRE_COPY(exprScope,{s/~l~/pev_/g}) // {copied} +//UNSUP ; + // PLI calls exclude "" as integers, they're strings // For $c("foo","bar") we want "bar" as a string, not a Verilog integer. exprStrText: @@ -3512,21 +3918,41 @@ argsExprListE: // IEEE: part of list_of_arguments | argsExprListE ',' argsExprOneE { $$ = $1->addNext($3); } ; +//UNSUPpev_argsExprListE: // IEEE: part of list_of_arguments - pev_expr at bottom +//UNSUP pev_argsExprOneE { $$ = $1; } +//UNSUP | pev_argsExprListE ',' pev_argsExprOneE { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + argsExprOneE: // IEEE: part of list_of_arguments /*empty*/ { $$ = new AstArg(CRELINE(), "", NULL); } | expr { $$ = new AstArg($1->fileline(), "", $1); } ; +//UNSUPpev_argsExprOneE: // IEEE: part of list_of_arguments - pev_expr at bottom +//UNSUP /*empty*/ { $$ = NULL; } // ,, is legal in list_of_arguments +//UNSUP | pev_expr { $$ = $1; } +//UNSUP ; + argsDottedList: // IEEE: part of list_of_arguments argsDotted { $$ = $1; } | argsDottedList ',' argsDotted { $$ = $1->addNextNull($3); } ; +//UNSUPpev_argsDottedList: // IEEE: part of list_of_arguments - pev_expr at bottom +//UNSUP pev_argsDotted { $$ = $1; } +//UNSUP | pev_argsDottedList ',' pev_argsDotted { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + argsDotted: // IEEE: part of list_of_arguments '.' idAny '(' ')' { $$ = new AstArg($2, *$2, NULL); } | '.' idAny '(' expr ')' { $$ = new AstArg($2, *$2, $4); } ; +//UNSUPpev_argsDotted: // IEEE: part of list_of_arguments - pev_expr at bottom +//UNSUP '.' idAny '(' ')' { $$ = new AstArg($2, *$2, NULL); } +//UNSUP | '.' idAny '(' pev_expr ')' { $$ = new AstArg($2, *$2, $4); } +//UNSUP ; + streaming_concatenation: // ==IEEE: streaming_concatenation // // Need to disambiguate {<< expr-{ ... expr-} stream_concat } // // From {<< stream-{ ... stream-} } @@ -3825,6 +4251,11 @@ idAny: // Any kind of identifier | yaID__ETC { $$ = $1; $$=$1; } ; +idRefDType: // IEEE: class_identifier or other type identifier + // Used where reference is needed + yaID__aTYPE { $$ = new AstRefDType($1, *$1); } + ; + idSVKwd: // Warn about non-forward compatible Verilog 2001 code // // yBIT, yBYTE won't work here as causes conflicts yDO { static string s = "do" ; $$ = &s; ERRSVKWD($1,*$$); $$=$1; } @@ -3848,16 +4279,21 @@ variable_lvalueConcList: // IEEE: part of variable_lvalue: '{' variable_l | variable_lvalueConcList ',' variable_lvalue { $$ = new AstConcat($2,$1,$3); } ; +//UNSUPvariable_lvalueList: // IEEE: part of variable_lvalue: variable_lvalue { ',' variable_lvalue } +//UNSUP variable_lvalue { $$ = $1; } +//UNSUP | variable_lvalueList ',' variable_lvalue { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + // VarRef to dotted, and/or arrayed, and/or bit-ranged variable idClassSel: // Misc Ref to dotted, and/or arrayed, and/or bit-ranged variable idDotted { $$ = $1; } // // IEEE: [ implicit_class_handle . | package_scope ] hierarchical_variable_identifier select - //UNSUP yTHIS '.' idDotted { UNSUP } - //UNSUP ySUPER '.' idDotted { UNSUP } - //UNSUP yTHIS '.' ySUPER '.' idDotted { UNSUP } + | yTHIS '.' idDotted { $$ = $3; BBUNSUP($1, "Unsupported: this"); } + | ySUPER '.' idDotted { $$ = $3; BBUNSUP($1, "Unsupported: super"); } + | yTHIS '.' ySUPER '.' idDotted { $$ = $5; BBUNSUP($1, "Unsupported: this.super"); } // // Expanded: package_scope idDotted - //UNSUP class_scopeIdFollows idDotted { UNSUP } - //UNSUP package_scopeIdFollows idDotted { UNSUP } + | class_scopeIdFollows idDotted { $$ = $2; BBUNSUP($2, "Unsupported: package scoped id"); } + | package_scopeIdFollows idDotted { $$ = $2; BBUNSUP($2, "Unsupported: class scoped id"); } ; idDotted: @@ -3921,21 +4357,104 @@ strAsText: endLabelE: /* empty */ { $$ = NULL; $$=NULL; } | ':' idAny { $$ = $2; $$=$2; } - //UNSUP ':' yNEW__ETC { $$ = $2; $$=$2; } + | ':' yNEW__ETC { static string n = "new"; $$ = &n; $$=$2; } ; //************************************************ // Clocking clocking_declaration: // IEEE: clocking_declaration (INCOMPLETE) + //UNSUP: vvv remove this -- vastly simplified grammar: yDEFAULT yCLOCKING '@' '(' senitemEdge ')' ';' yENDCLOCKING { $$ = new AstClocking($2, $5, NULL); } - //UNSUP: Vastly simplified grammar + //UNSUP: ^^^ remove this -- vastly simplified grammar: + //UNSUP clockingFront clocking_event ';' + //UNSUP clocking_itemListE yENDCLOCKING endLabelE { SYMP->popScope($$); } ; +//UNSUPclockingFront: // IEEE: part of class_declaration +//UNSUP yCLOCKING { PARSEP->symPushNewAnon(VAstType::CLOCKING); } +//UNSUP | yCLOCKING idAny/*clocking_identifier*/ { SYMP->pushNew($$); } +//UNSUP | yDEFAULT yCLOCKING { PARSEP->symPushNewAnon(VAstType::CLOCKING); } +//UNSUP | yDEFAULT yCLOCKING idAny/*clocking_identifier*/ { SYMP->pushNew($$); } +//UNSUP | yGLOBAL__CLOCKING yCLOCKING { PARSEP->symPushNewAnon(VAstType::CLOCKING); } +//UNSUP | yGLOBAL__CLOCKING yCLOCKING idAny/*clocking_identifier*/ { SYMP->pushNew($$); } +//UNSUP ; + +//UNSUPclocking_event: // ==IEEE: clocking_event +//UNSUP '@' id { } +//UNSUP | '@' '(' event_expression ')' { } +//UNSUP ; + +//UNSUPclocking_itemListE: +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | clocking_itemList { $$ = $1; } +//UNSUP ; + +//UNSUPclocking_itemList: // IEEE: [ clocking_item ] +//UNSUP clocking_item { $$ = $1; } +//UNSUP | clocking_itemList clocking_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPclocking_item: // ==IEEE: clocking_item +//UNSUP yDEFAULT default_skew ';' { } +//UNSUP | clocking_direction list_of_clocking_decl_assign ';' { } +//UNSUP | assertion_item_declaration { } +//UNSUP ; + +//UNSUPdefault_skew: // ==IEEE: default_skew +//UNSUP yINPUT clocking_skew { } +//UNSUP | yOUTPUT clocking_skew { } +//UNSUP | yINPUT clocking_skew yOUTPUT clocking_skew { } +//UNSUP ; + +//UNSUPclocking_direction: // ==IEEE: clocking_direction +//UNSUP yINPUT clocking_skewE { } +//UNSUP | yOUTPUT clocking_skewE { } +//UNSUP | yINPUT clocking_skewE yOUTPUT clocking_skewE { } +//UNSUP | yINOUT { } +//UNSUP ; + +//UNSUPlist_of_clocking_decl_assign: // ==IEEE: list_of_clocking_decl_assign +//UNSUP clocking_decl_assign { $$ = $1; } +//UNSUP | list_of_clocking_decl_assign ',' clocking_decl_assign { } +//UNSUP ; + +//UNSUPclocking_decl_assign: // ==IEEE: clocking_decl_assign +//UNSUP idAny/*new-signal_identifier*/ { $$ = $1; } +//UNSUP | idAny/*new-signal_identifier*/ '=' expr { } +//UNSUP ; + +//UNSUPclocking_skewE: // IEEE: [clocking_skew] +//UNSUP /* empty */ { $$ = NULL;} +//UNSUP | clocking_skew { $$ = $1; } +//UNSUP ; + +//UNSUPclocking_skew: // ==IEEE: clocking_skew +//UNSUP yPOSEDGE { } +//UNSUP | yPOSEDGE delay_control { } +//UNSUP | yNEGEDGE { } +//UNSUP | yNEGEDGE delay_control { } +//UNSUP | yEDGE { NEED_S09($1,"edge"); } +//UNSUP | yEDGE delay_control { NEED_S09($1,"edge"); } +//UNSUP | delay_control { $$ = $1; } +//UNSUP ; + +//UNSUPcycle_delay: // ==IEEE: cycle_delay +//UNSUP yP_POUNDPOUND yaINTNUM { } +//UNSUP | yP_POUNDPOUND id { } +//UNSUP | yP_POUNDPOUND '(' expr ')' { } +//UNSUP ; + //************************************************ // Asserts +//UNSUPassertion_item_declaration: // ==IEEE: assertion_item_declaration +//UNSUP property_declaration { $$ = $1; } +//UNSUP | sequence_declaration { $$ = $1; } +//UNSUP | let_declaration { $$ = $1; } +//UNSUP ; + assertion_item: // ==IEEE: assertion_item concurrent_assertion_item { $$ = $1; } | deferred_immediate_assertion_item @@ -3994,6 +4513,10 @@ deferred_immediate_assertion_statement: // ==IEEE: deferred_immediate_ass | yCOVER final_zero '(' expr ')' stmt { $$ = new AstCover($1, $4, $6, true); } ; +//UNSUPexpect_property_statement: // ==IEEE: expect_property_statement +//UNSUP yEXPECT '(' property_spec ')' action_block { } +//UNSUP ; + concurrent_assertion_item: // IEEE: concurrent_assertion_item concurrent_assertion_statement { $$ = $1; } | id/*block_identifier*/ ':' concurrent_assertion_statement { $$ = new AstBegin($1, *$1, $3); } @@ -4003,9 +4526,19 @@ concurrent_assertion_item: // IEEE: concurrent_assertion_item concurrent_assertion_statement: // ==IEEE: concurrent_assertion_statement // // IEEE: assert_property_statement + //UNSUP remove below: yASSERT yPROPERTY '(' property_spec ')' elseStmtBlock { $$ = new AstAssert($1, $4, NULL, $6, false); } + //UNSUP yASSERT yPROPERTY '(' property_spec ')' action_block { } + // // IEEE: assume_property_statement + //UNSUP yASSUME yPROPERTY '(' property_spec ')' action_block { } // // IEEE: cover_property_statement | yCOVER yPROPERTY '(' property_spec ')' stmtBlock { $$ = new AstCover($1, $4, $6, false); } + // // IEEE: cover_sequence_statement + //UNSUP yCOVER ySEQUENCE '(' sexpr ')' stmt { } + // // IEEE: yCOVER ySEQUENCE '(' clocking_event sexpr ')' stmt + // // sexpr already includes "clocking_event sexpr" + //UNSUP yCOVER ySEQUENCE '(' clocking_event yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' sexpr ')' stmt { } + //UNSUP yCOVER ySEQUENCE '(' yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' sexpr ')' stmt { } // // IEEE: restrict_property_statement | yRESTRICT yPROPERTY '(' property_spec ')' ';' { $$ = new AstRestrict($1, $4); } ; @@ -4015,30 +4548,835 @@ elseStmtBlock: // Part of concurrent_assertion_statement | yELSE stmtBlock { $$ = $2; } ; +//UNSUPproperty_declaration: // ==IEEE: property_declaration +//UNSUP property_declarationFront property_port_listE ';' property_declarationBody +//UNSUP yENDPROPERTY endLabelE +//UNSUP { SYMP->popScope($$); } +//UNSUP ; + +//UNSUPproperty_declarationFront: // IEEE: part of property_declaration +//UNSUP yPROPERTY idAny/*property_identifier*/ +//UNSUP { SYMP->pushNew($$); } +//UNSUP ; + +//UNSUPproperty_port_listE: // IEEE: [ ( [ property_port_list ] ) ] +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | '(' {VARRESET_LIST(""); VARIO("input"); } property_port_list ')' +//UNSUP { VARRESET_NONLIST(""); } +//UNSUP ; + +//UNSUPproperty_port_list: // ==IEEE: property_port_list +//UNSUP property_port_item { $$ = $1; } +//UNSUP | property_port_list ',' property_port_item { } +//UNSUP ; + +//UNSUPproperty_port_item: // IEEE: property_port_item/sequence_port_item +//UNSUP // // Merged in sequence_port_item +//UNSUP // // IEEE: property_lvar_port_direction ::= yINPUT +//UNSUP // // prop IEEE: [ yLOCAL [ yINPUT ] ] property_formal_type +//UNSUP // // id {variable_dimension} [ '=' property_actual_arg ] +//UNSUP // // seq IEEE: [ yLOCAL [ sequence_lvar_port_direction ] ] sequence_formal_type +//UNSUP // // id {variable_dimension} [ '=' sequence_actual_arg ] +//UNSUP property_port_itemFront property_port_itemAssignment { } +//UNSUP ; + +//UNSUPproperty_port_itemFront: // IEEE: part of property_port_item/sequence_port_item +//UNSUP property_port_itemDirE property_formal_typeNoDt { VARDTYPE($2); } +//UNSUP // // data_type_or_implicit +//UNSUP | property_port_itemDirE data_type { VARDTYPE($2); } +//UNSUP | property_port_itemDirE yVAR data_type { VARDTYPE($3); } +//UNSUP | property_port_itemDirE yVAR implicit_typeE { VARDTYPE($3); } +//UNSUP | property_port_itemDirE signingE rangeList { VARDTYPE(SPACED($2,$3)); } +//UNSUP | property_port_itemDirE /*implicit*/ { /*VARDTYPE-same*/ } +//UNSUP ; + +//UNSUPproperty_port_itemAssignment: // IEEE: part of property_port_item/sequence_port_item/checker_port_direction +//UNSUP portSig variable_dimensionListE { VARDONE($1, $1, $2, ""); PINNUMINC(); } +//UNSUP | portSig variable_dimensionListE '=' property_actual_arg +//UNSUP { VARDONE($1, $1, $2, $4); PINNUMINC(); } +//UNSUP ; + +//UNSUPproperty_port_itemDirE: +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | yLOCAL__ETC { } +//UNSUP | yLOCAL__ETC port_direction { } +//UNSUP ; + +//UNSUPproperty_declarationBody: // IEEE: part of property_declaration +//UNSUP assertion_variable_declarationList property_statement_spec { } +//UNSUP // // IEEE-2012: Incorectly hasyCOVER ySEQUENCE then property_spec here. +//UNSUP // // Fixed in IEEE 1800-2017 +//UNSUP | property_statement_spec { $$ = $1; } +//UNSUP ; + +//UNSUPassertion_variable_declarationList: // IEEE: part of assertion_variable_declaration +//UNSUP assertion_variable_declaration { $$ = $1; } +//UNSUP | assertion_variable_declarationList assertion_variable_declaration { } +//UNSUP ; + +//UNSUPsequence_declaration: // ==IEEE: sequence_declaration +//UNSUP sequence_declarationFront sequence_port_listE ';' sequence_declarationBody +//UNSUP yENDSEQUENCE endLabelE +//UNSUP { SYMP->popScope($$); } +//UNSUP ; + +//UNSUPsequence_declarationFront: // IEEE: part of sequence_declaration +//UNSUP ySEQUENCE idAny/*new_sequence*/ +//UNSUP { SYMP->pushNew($$); } +//UNSUP ; + +//UNSUPsequence_port_listE: // IEEE: [ ( [ sequence_port_list ] ) ] +//UNSUP // // IEEE: sequence_lvar_port_direction ::= yINPUT | yINOUT | yOUTPUT +//UNSUP // // IEEE: [ yLOCAL [ sequence_lvar_port_direction ] ] sequence_formal_type +//UNSUP // // id {variable_dimension} [ '=' sequence_actual_arg ] +//UNSUP // // All this is almost identically the same as a property. +//UNSUP // // Difference is only yINOUT/yOUTPUT (which might be added to 1800-2012) +//UNSUP // // and yPROPERTY. So save some work. +//UNSUP property_port_listE { $$ = $1; } +//UNSUP ; + +//UNSUPproperty_formal_typeNoDt: // IEEE: property_formal_type (w/o implicit) +//UNSUP sequence_formal_typeNoDt { $$ = $1; } +//UNSUP | yPROPERTY { } +//UNSUP ; + +//UNSUPsequence_formal_typeNoDt: // ==IEEE: sequence_formal_type (w/o data_type_or_implicit) +//UNSUP // // IEEE: data_type_or_implicit +//UNSUP // // implicit expanded where used +//UNSUP ySEQUENCE { } +//UNSUP // // IEEE-2009: yEVENT +//UNSUP // // already part of data_type. Removed in 1800-2012. +//UNSUP | yUNTYPED { } +//UNSUP ; + +//UNSUPsequence_declarationBody: // IEEE: part of sequence_declaration +//UNSUP // // 1800-2012 makes ';' optional +//UNSUP assertion_variable_declarationList sexpr { } +//UNSUP | assertion_variable_declarationList sexpr ';' { } +//UNSUP | sexpr { $$ = $1; } +//UNSUP | sexpr ';' { $$ = $1; } +//UNSUP ; + property_spec: // IEEE: property_spec //UNSUP: This rule has been super-specialized to what is supported now - '@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' expr + //UNSUP remove below + '@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' pexpr { $$ = new AstPropClocked($1, $3, $8, $10); } - | '@' '(' senitemEdge ')' expr { $$ = new AstPropClocked($1, $3, NULL, $5); } - | yDISABLE yIFF '(' expr ')' expr { $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); } - | expr { $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); } + | '@' '(' senitemEdge ')' pexpr { $$ = new AstPropClocked($1, $3, NULL, $5); } + //UNSUP remove above + | yDISABLE yIFF '(' expr ')' pexpr { $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); } + | pexpr { $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); } ; +//UNSUPproperty_statement_spec: // ==IEEE: property_statement_spec +//UNSUP // // IEEE: [ clocking_event ] [ yDISABLE yIFF '(' expression_or_dist ')' ] property_statement +//UNSUP property_statement { $$ = $1; } +//UNSUP | yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' property_statement { } +//UNSUP // // IEEE: clocking_event property_statement +//UNSUP // // IEEE: clocking_event yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' property_statement +//UNSUP // // Both overlap pexpr:"clocking_event pexpr" the difference is +//UNSUP // // property_statement:property_statementCaseIf so replicate it +//UNSUP | clocking_event property_statementCaseIf { } +//UNSUP | clocking_event yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' property_statementCaseIf { } +//UNSUP ; + +//UNSUPproperty_statement: // ==IEEE: property_statement +//UNSUP // // Doesn't make sense to have "pexpr ;" in pexpr rule itself, so we split out case/if +//UNSUP pexpr ';' { $$ = $1; } +//UNSUP // // Note this term replicated in property_statement_spec +//UNSUP // // If committee adds terms, they may need to be there too. +//UNSUP | property_statementCaseIf { $$ = $1; } +//UNSUP ; + +//UNSUPproperty_statementCaseIf: // IEEE: property_statement - minus pexpr +//UNSUP yCASE '(' expr/*expression_or_dist*/ ')' property_case_itemList yENDCASE { } +//UNSUP | yCASE '(' expr/*expression_or_dist*/ ')' yENDCASE { } +//UNSUP | yIF '(' expr/*expression_or_dist*/ ')' pexpr %prec prLOWER_THAN_ELSE { } +//UNSUP | yIF '(' expr/*expression_or_dist*/ ')' pexpr yELSE pexpr { } +//UNSUP ; + +//UNSUPproperty_case_itemList: // IEEE: {property_case_item} +//UNSUP property_case_item { $$ = $1; } +//UNSUP | property_case_itemList ',' property_case_item { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPproperty_case_item: // ==IEEE: property_case_item +//UNSUP // // IEEE: expression_or_dist { ',' expression_or_dist } ':' property_statement +//UNSUP // // IEEE 1800-2012 changed from property_statement to property_expr +//UNSUP // // IEEE 1800-2017 changed to require the semicolon +//UNSUP caseCondList ':' pexpr { } +//UNSUP | caseCondList ':' pexpr ';' { } +//UNSUP | yDEFAULT pexpr { } +//UNSUP | yDEFAULT ':' pexpr ';' { } +//UNSUP ; + +//UNSUPpev_expr: // IEEE: property_actual_arg | expr +//UNSUP // // which expands to pexpr | event_expression +//UNSUP // // Used in port and function calls, when we can't know yet if something +//UNSUP // // is a function/sequence/property or instance/checker pin. +//UNSUP // +//UNSUP // // '(' pev_expr ')' +//UNSUP // // Already in pexpr +//UNSUP // // IEEE: event_expression ',' event_expression +//UNSUP // // ','s are legal in event_expressions, but parens required to avoid conflict with port-sep-, +//UNSUP // // IEEE: event_expression yOR event_expression +//UNSUP // // Already in pexpr - needs removal there +//UNSUP // // IEEE: event_expression yIFF expr +//UNSUP // // Already in pexpr - needs removal there +//UNSUP // +//UNSUP senitemEdge { $$ = $1; } +//UNSUP // +//UNSUP //============= pexpr rules copied for pev_expr +//UNSUP | BISONPRE_COPY_ONCE(pexpr,{s/~o~p/pev_/g; }) // {copied} +//UNSUP // +//UNSUP //============= sexpr rules copied for pev_expr +//UNSUP | BISONPRE_COPY_ONCE(sexpr,{s/~p~s/pev_/g; }) // {copied} +//UNSUP // +//UNSUP //============= expr rules copied for pev_expr +//UNSUP | BISONPRE_COPY_ONCE(expr,{s/~l~/pev_/g; s/~p~/pev_/g; s/~noPar__IGNORE~/yP_PAR__IGNORE /g; }) // {copied} +//UNSUP ; + +pexpr: // IEEE: property_expr (The name pexpr is important as regexps just add an "p" to expr.) + //UNSUP: This rule has been super-specialized to what is supported now + //UNSUP remove below + expr yP_ORMINUSGT pexpr { $$ = new AstLogOr($2, new AstLogNot($2, $1), $3); } + //UNSUP expr yP_OREQGT pexpr { $$ = new AstLogOr($2, new AstLogNot($2, new AstPast($2, $1, NULL)), $3); } // This handles disable iff in the past time step incorrectly + | expr { $$ = $1; } + //UNSUP remove above, use below: + // + // // IEEE: sequence_expr + // // Expanded below + // + // // IEEE: '(' pexpr ')' + // // Expanded below + // + //UNSUP yNOT pexpr %prec prNEGATION { } + //UNSUP ySTRONG '(' sexpr ')' { } + //UNSUP yWEAK '(' sexpr ')' { } + // // IEEE: pexpr yOR pexpr + // // IEEE: pexpr yAND pexpr + // // Under ~p~sexpr and/or ~p~sexpr + // + // // IEEE: "sequence_expr yP_ORMINUSGT pexpr" + // // Instead we use pexpr to prevent conflicts + //UNSUP ~o~pexpr yP_ORMINUSGT pexpr { } + //UNSUP ~o~pexpr yP_OREQGT pexpr { } + // + // // IEEE-2009: property_statement + // // IEEE-2012: yIF and yCASE + //UNSUP property_statementCaseIf { } + // + //UNSUP ~o~pexpr/*sexpr*/ yP_POUNDMINUSPD pexpr { } + //UNSUP ~o~pexpr/*sexpr*/ yP_POUNDEQPD pexpr { } + //UNSUP yNEXTTIME pexpr { } + //UNSUP yS_NEXTTIME pexpr { } + //UNSUP yNEXTTIME '[' expr/*const*/ ']' pexpr %prec yNEXTTIME { } + //UNSUP yS_NEXTTIME '[' expr/*const*/ ']' pexpr %prec yS_NEXTTIME { } + //UNSUP yALWAYS pexpr { } + //UNSUP yALWAYS '[' cycle_delay_const_range_expression ']' pexpr %prec yALWAYS { } + //UNSUP yS_ALWAYS '[' constant_range ']' pexpr %prec yS_ALWAYS { } + //UNSUP yS_EVENTUALLY pexpr { } + //UNSUP yEVENTUALLY '[' constant_range ']' pexpr %prec yEVENTUALLY { } + //UNSUP yS_EVENTUALLY '[' cycle_delay_const_range_expression ']' pexpr %prec yS_EVENTUALLY { } + //UNSUP ~o~pexpr yUNTIL pexpr { } + //UNSUP ~o~pexpr yS_UNTIL pexpr { } + //UNSUP ~o~pexpr yUNTIL_WITH pexpr { } + //UNSUP ~o~pexpr yS_UNTIL_WITH pexpr { } + //UNSUP ~o~pexpr yIMPLIES pexpr { } + // // yIFF also used by event_expression + //UNSUP ~o~pexpr yIFF ~o~pexpr { } + //UNSUP yACCEPT_ON '(' expr/*expression_or_dist*/ ')' pexpr %prec yACCEPT_ON { } + //UNSUP yREJECT_ON '(' expr/*expression_or_dist*/ ')' pexpr %prec yREJECT_ON { } + //UNSUP ySYNC_ACCEPT_ON '(' expr/*expression_or_dist*/ ')' pexpr %prec ySYNC_ACCEPT_ON { } + //UNSUP ySYNC_REJECT_ON '(' expr/*expression_or_dist*/ ')' pexpr %prec ySYNC_REJECT_ON { } + // + // // IEEE: "property_instance" + // // Looks just like a function/method call + // + // // Note "clocking_event pexpr" overlaps property_statement_spec: clocking_event property_statement + // + // // Include property_specDisable to match property_spec rule + //UNSUP clocking_event yDISABLE yIFF '(' expr ')' pexpr %prec prSEQ_CLOCKING { } + // + //============= sexpr rules copied for property_expr + //UNSUP BISONPRE_COPY_ONCE(sexpr,{s/~p~s/p/g; }) // {copied} + // + //============= expr rules copied for property_expr + //UNSUP BISONPRE_COPY_ONCE(expr,{s/~l~/p/g; s/~p~/p/g; s/~noPar__IGNORE~/yP_PAR__IGNORE /g; }) // {copied} + ; + +//UNSUPsexpr: // ==IEEE: sequence_expr (The name sexpr is important as regexps just add an "s" to expr.) +//UNSUP // // ********* RULES COPIED IN sequence_exprProp +//UNSUP // // For precedence, see IEEE 17.7.1 +//UNSUP // +//UNSUP // // IEEE: "cycle_delay_range sequence_expr { cycle_delay_range sequence_expr }" +//UNSUP // // IEEE: "sequence_expr cycle_delay_range sequence_expr { cycle_delay_range sequence_expr }" +//UNSUP // // Both rules basically mean we can repeat sequences, so make it simpler: +//UNSUP cycle_delay_range sexpr %prec yP_POUNDPOUND { } +//UNSUP | ~p~sexpr cycle_delay_range sexpr %prec prPOUNDPOUND_MULTI { } +//UNSUP // +//UNSUP // // IEEE: expression_or_dist [ boolean_abbrev ] +//UNSUP // // Note expression_or_dist includes "expr"! +//UNSUP // // sexpr/*sexpression_or_dist*/ --- Hardcoded below +//UNSUP | ~p~sexpr/*sexpression_or_dist*/ boolean_abbrev { } +//UNSUP // +//UNSUP // // IEEE: "sequence_instance [ sequence_abbrev ]" +//UNSUP // // version without sequence_abbrev looks just like normal function call +//UNSUP // // version w/sequence_abbrev matches above; expression_or_dist:expr:func boolean_abbrev:sequence_abbrev +//UNSUP // +//UNSUP // // IEEE: '(' expression_or_dist {',' sequence_match_item } ')' [ boolean_abbrev ] +//UNSUP // // IEEE: '(' sexpr {',' sequence_match_item } ')' [ sequence_abbrev ] +//UNSUP // // As sequence_expr includes expression_or_dist, and boolean_abbrev includes sequence_abbrev: +//UNSUP // // '(' sequence_expr {',' sequence_match_item } ')' [ boolean_abbrev ] +//UNSUP // // "'(' sexpr ')' boolean_abbrev" matches "[sexpr:'(' expr ')'] boolean_abbrev" so we can simply drop it +//UNSUP | '(' ~p~sexpr ')' { $$=$1; $$=$1+$2+$3; } +//UNSUP | '(' ~p~sexpr ',' sequence_match_itemList ')' { } +//UNSUP // +//UNSUP // // AND/OR are between pexprs OR sexprs +//UNSUP | ~p~sexpr yAND ~p~sexpr { $$=$1; $$=$1+$2+$3; } +//UNSUP | ~p~sexpr yOR ~p~sexpr { $$=$1; $$=$1+$2+$3; } +//UNSUP // // Intersect always has an sexpr rhs +//UNSUP | ~p~sexpr yINTERSECT sexpr { $$=$1; $$=$1+$2+$3; } +//UNSUP // +//UNSUP | yFIRST_MATCH '(' sexpr ')' { } +//UNSUP | yFIRST_MATCH '(' sexpr ',' sequence_match_itemList ')' { } +//UNSUP | ~p~sexpr/*sexpression_or_dist*/ yTHROUGHOUT sexpr { } +//UNSUP // // Below pexpr's are really sequence_expr, but avoid conflict +//UNSUP // // IEEE: sexpr yWITHIN sexpr +//UNSUP | ~p~sexpr yWITHIN sexpr { $$=$1; $$=$1+$2+$3; } +//UNSUP // // Note concurrent_assertion had duplicate rule for below +//UNSUP | clocking_event ~p~sexpr %prec prSEQ_CLOCKING { } +//UNSUP // +//UNSUP //============= expr rules copied for sequence_expr +//UNSUP | BISONPRE_COPY_ONCE(expr,{s/~l~/s/g; s/~p~/s/g; s/~noPar__IGNORE~/yP_PAR__IGNORE /g; }) // {copied} +//UNSUP ; + +//UNSUPcycle_delay_range: // IEEE: ==cycle_delay_range +//UNSUP // // These three terms in 1800-2005 ONLY +//UNSUP yP_POUNDPOUND yaINTNUM { } +//UNSUP | yP_POUNDPOUND id { } +//UNSUP | yP_POUNDPOUND '(' constExpr ')' { } +//UNSUP // // In 1800-2009 ONLY: +//UNSUP // // IEEE: yP_POUNDPOUND constant_primary +//UNSUP // // UNSUP: This causes a big grammer ambiguity +//UNSUP // // as ()'s mismatch between primary and the following statement +//UNSUP // // the sv-ac committee has been asked to clarify (Mantis 1901) +//UNSUP | yP_POUNDPOUND '[' cycle_delay_const_range_expression ']' { } +//UNSUP | yP_POUNDPOUND yP_BRASTAR ']' { } +//UNSUP | yP_POUNDPOUND yP_BRAPLUSKET { } +//UNSUP ; + +//UNSUPsequence_match_itemList: // IEEE: [sequence_match_item] part of sequence_expr +//UNSUP sequence_match_item { $$ = $1; } +//UNSUP | sequence_match_itemList ',' sequence_match_item { } +//UNSUP ; + +//UNSUPsequence_match_item: // ==IEEE: sequence_match_item +//UNSUP // // IEEE says: operator_assignment +//UNSUP // // IEEE says: inc_or_dec_expression +//UNSUP // // IEEE says: subroutine_call +//UNSUP // // This is the same list as... +//UNSUP for_step_assignment { $$ = $1; } +//UNSUP ; + +//UNSUPboolean_abbrev: // ==IEEE: boolean_abbrev +//UNSUP // // IEEE: consecutive_repetition +//UNSUP yP_BRASTAR const_or_range_expression ']' { } +//UNSUP | yP_BRASTAR ']' { } +//UNSUP | yP_BRAPLUSKET { $$ = $1; } +//UNSUP // // IEEE: non_consecutive_repetition +//UNSUP | yP_BRAEQ const_or_range_expression ']' { } +//UNSUP // // IEEE: goto_repetition +//UNSUP | yP_BRAMINUSGT const_or_range_expression ']' { } +//UNSUP ; + +//UNSUPconst_or_range_expression: // ==IEEE: const_or_range_expression +//UNSUP constExpr { $$ = $1; } +//UNSUP | cycle_delay_const_range_expression { } +//UNSUP ; + +//UNSUPconstant_range: // ==IEEE: constant_range +//UNSUP constExpr ':' constExpr { } +//UNSUP ; + +//UNSUPcycle_delay_const_range_expression: // ==IEEE: cycle_delay_const_range_expression +//UNSUP // // Note '$' is part of constExpr +//UNSUP constExpr ':' constExpr { } +//UNSUP ; + //************************************************ // Let //************************************************ // Covergroup +//UNSUPcovergroup_declaration: // ==IEEE: covergroup_declaration +//UNSUP covergroup_declarationFront coverage_eventE ';' coverage_spec_or_optionListE +//UNSUP yENDGROUP endLabelE +//UNSUP { PARSEP->endgroupCb($5,$5); +//UNSUP SYMP->popScope($$); } +//UNSUP | covergroup_declarationFront '(' tf_port_listE ')' coverage_eventE ';' coverage_spec_or_optionListE +//UNSUP yENDGROUP endLabelE +//UNSUP { PARSEP->endgroupCb($8,$8); +//UNSUP SYMP->popScope($$); } +//UNSUP ; + +//UNSUPcovergroup_declarationFront: // IEEE: part of covergroup_declaration +//UNSUP yCOVERGROUP idAny +//UNSUP { SYMP->pushNew($$); +//UNSUP PARSEP->covergroupCb($1,$1,$2); } +//UNSUP ; + +//UNSUPcgexpr: // IEEE-2012: covergroup_expression, before that just expression +//UNSUP expr { $$ = $1; } +//UNSUP ; + +//UNSUPcoverage_spec_or_optionListE: // IEEE: [{coverage_spec_or_option}] +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | coverage_spec_or_optionList { $$ = $1; } +//UNSUP ; + +//UNSUPcoverage_spec_or_optionList: // IEEE: {coverage_spec_or_option} +//UNSUP coverage_spec_or_option { $$ = $1; } +//UNSUP | coverage_spec_or_optionList coverage_spec_or_option { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPcoverage_spec_or_option: // ==IEEE: coverage_spec_or_option +//UNSUP // // IEEE: coverage_spec +//UNSUP cover_point { $$ = $1; } +//UNSUP | cover_cross { $$ = $1; } +//UNSUP | coverage_option ';' { $$ = $1; } +//UNSUP | error { $$ = NULL; } +//UNSUP ; + +//UNSUPcoverage_option: // ==IEEE: coverage_option +//UNSUP // // option/type_option aren't really keywords +//UNSUP id/*yOPTION | yTYPE_OPTION*/ '.' idAny/*member_identifier*/ '=' expr { } +//UNSUP ; + +//UNSUPcover_point: // ==IEEE: cover_point +//UNSUP /**/ yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP // // IEEE-2012: class_scope before an ID +//UNSUP | /**/ /**/ /**/ id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP | class_scope_id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP | class_scope_id id data_type id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP | class_scope_id id /**/ id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP | /**/ id /**/ id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP // // IEEE-2012: +//UNSUP | bins_or_empty { $$ = $1; } +//UNSUP ; + +//UNSUPiffE: // IEEE: part of cover_point, others +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | yIFF '(' expr ')' { } +//UNSUP ; + +//UNSUPbins_or_empty: // ==IEEE: bins_or_empty +//UNSUP '{' bins_or_optionsList '}' { $$ = $2; } +//UNSUP | '{' '}' { $$ = NULL; } +//UNSUP | ';' { $$ = NULL; } +//UNSUP ; + +//UNSUPbins_or_optionsList: // IEEE: { bins_or_options ';' } +//UNSUP bins_or_options ';' { $$ = $1; } +//UNSUP | bins_or_optionsList bins_or_options ';' { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPbins_or_options: // ==IEEE: bins_or_options +//UNSUP // // Superset of IEEE - we allow []'s in more places +//UNSUP coverage_option { $$ = $1; } +//UNSUP // // Can't use wildcardE as results in conflicts +//UNSUP | /**/ bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' iffE { } +//UNSUP | yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' iffE { } +//UNSUP | /**/ bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' yWITH__CUR '{' cgexpr ')' iffE { } +//UNSUP | yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' yWITH__CUR '{' cgexpr ')' iffE { } +//UNSUP // +//UNSUP // // cgexpr part of trans_list +//UNSUP // +//UNSUP | /**/ bins_keyword id/*bin_identifier*/ bins_orBraE '=' trans_list iffE { } +//UNSUP | yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' trans_list iffE { } +//UNSUP // +//UNSUP | bins_keyword id/*bin_identifier*/ bins_orBraE '=' yDEFAULT iffE { } +//UNSUP // +//UNSUP | bins_keyword id/*bin_identifier*/ bins_orBraE '=' yDEFAULT ySEQUENCE iffE { } +//UNSUP ; + +//UNSUPbins_orBraE: // IEEE: part of bins_or_options: +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | '[' ']' { } +//UNSUP | '[' cgexpr ']' { } +//UNSUP ; + +//UNSUPbins_keyword: // ==IEEE: bins_keyword +//UNSUP yBINS { } +//UNSUP | yILLEGAL_BINS { } +//UNSUP | yIGNORE_BINS { } +//UNSUP ; + +//UNSUPcovergroup_range_list: // ==IEEE: covergroup_range_list +//UNSUP covergroup_value_range { $$ = $1; } +//UNSUP | covergroup_range_list ',' covergroup_value_range { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPtrans_list: // ==IEEE: trans_list +//UNSUP '(' trans_set ')' { $$ = $2; } +//UNSUP | trans_list ',' '(' trans_set ')' { } +//UNSUP ; + +//UNSUPtrans_set: // ==IEEE: trans_set +//UNSUP trans_range_list { $$ = $1; } +//UNSUP // // Note the { => } in the grammer, this is really a list +//UNSUP | trans_set yP_EQGT trans_range_list { } +//UNSUP ; + +//UNSUPtrans_range_list: // ==IEEE: trans_range_list +//UNSUP trans_item { $$ = $1; } +//UNSUP | trans_item yP_BRASTAR repeat_range ']' { } +//UNSUP | trans_item yP_BRAMINUSGT repeat_range ']' { } +//UNSUP | trans_item yP_BRAEQ repeat_range ']' { } +//UNSUP ; + +//UNSUPtrans_item: // ==IEEE: range_list +//UNSUP covergroup_range_list { $$ = $1; } +//UNSUP ; + +//UNSUPrepeat_range: // ==IEEE: repeat_range +//UNSUP cgexpr { $$ = $1; } +//UNSUP | cgexpr ':' cgexpr { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPcover_cross: // ==IEEE: cover_cross +//UNSUP id/*cover_point_identifier*/ ':' yCROSS list_of_cross_items iffE cross_body { } +//UNSUP | /**/ yCROSS list_of_cross_items iffE cross_body { } +//UNSUP ; + +//UNSUPlist_of_cross_items: // ==IEEE: list_of_cross_items +//UNSUP cross_item ',' cross_item { $$ = AstNode::addNextNull($1, $3); } +//UNSUP | cross_item ',' cross_item ',' cross_itemList { } +//UNSUP ; + +//UNSUPcross_itemList: // IEEE: part of list_of_cross_items +//UNSUP cross_item { $$ = NULL; } +//UNSUP | cross_itemList ',' cross_item { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPcross_item: // ==IEEE: cross_item +//UNSUP idAny/*cover_point_identifier or variable_identifier*/ { $$ = $1; } +//UNSUP ; + +//UNSUPcross_body: // ==IEEE: cross_body +//UNSUP '{' '}' { $$ = NULL; } +//UNSUP // // IEEE-2012: No semicolon here, mistake in spec +//UNSUP | '{' cross_body_itemSemiList '}' { $$ = $1; } +//UNSUP | ';' { $$ = NULL; } +//UNSUP ; + +//UNSUPcross_body_itemSemiList: // IEEE: part of cross_body +//UNSUP cross_body_item ';' { $$ = $1; } +//UNSUP | cross_body_itemSemiList cross_body_item ';' { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPcross_body_item: // ==IEEE: cross_body_item +//UNSUP // // IEEE: our semicolon is in the list +//UNSUP bins_selection_or_option { $$ = $1; } +//UNSUP | function_declaration { $$ = $1; } +//UNSUP ; + +//UNSUPbins_selection_or_option: // ==IEEE: bins_selection_or_option +//UNSUP coverage_option { $$ = $1; } +//UNSUP | bins_selection { $$ = $1; } +//UNSUP ; + +//UNSUPbins_selection: // ==IEEE: bins_selection +//UNSUP bins_keyword idAny/*new-bin_identifier*/ '=' select_expression iffE { } +//UNSUP ; + +//UNSUPselect_expression: // ==IEEE: select_expression +//UNSUP // // IEEE: select_condition expanded here +//UNSUP yBINSOF '(' bins_expression ')' { } +//UNSUP | yBINSOF '(' bins_expression ')' yINTERSECT '{' covergroup_range_list '}' { } +//UNSUP | yWITH__PAREN '(' cgexpr ')' { } +//UNSUP // // IEEE-2012: Need clarification as to precedence +//UNSUP //UNSUP yWITH__PAREN '(' cgexpr ')' yMATCHES cgexpr { } +//UNSUP | '!' yBINSOF '(' bins_expression ')' { } +//UNSUP | '!' yBINSOF '(' bins_expression ')' yINTERSECT '{' covergroup_range_list '}' { } +//UNSUP | '!' yWITH__PAREN '(' cgexpr ')' { } +//UNSUP // // IEEE-2012: Need clarification as to precedence +//UNSUP //UNSUP '!' yWITH__PAREN '(' cgexpr ')' yMATCHES cgexpr { } +//UNSUP | select_expression yP_ANDAND select_expression { } +//UNSUP | select_expression yP_OROR select_expression { } +//UNSUP | '(' select_expression ')' { $$ = $2; } +//UNSUP // // IEEE-2012: cross_identifier +//UNSUP // // Part of covergroup_expression - generic identifier +//UNSUP // // IEEE-2012: Need clarification as to precedence +//UNSUP //UNSUP covergroup_expression [ yMATCHES covergroup_expression ] +//UNSUP ; + +//UNSUPbins_expression: // ==IEEE: bins_expression +//UNSUP // // "cover_point_identifier" and "variable_identifier" look identical +//UNSUP id/*variable_identifier or cover_point_identifier*/ { $$ = $1; } +//UNSUP | id/*cover_point_identifier*/ '.' idAny/*bins_identifier*/ { } +//UNSUP ; + +//UNSUPcoverage_eventE: // IEEE: [ coverage_event ] +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | clocking_event { $$ = $1; } +//UNSUP | yWITH__ETC function idAny/*"sample"*/ '(' tf_port_listE ')' { } +//UNSUP | yP_ATAT '(' block_event_expression ')' { } +//UNSUP ; + +//UNSUPblock_event_expression: // ==IEEE: block_event_expression +//UNSUP block_event_expressionTerm { $$ = $1; } +//UNSUP | block_event_expression yOR block_event_expressionTerm { } +//UNSUP ; + +//UNSUPblock_event_expressionTerm: // IEEE: part of block_event_expression +//UNSUP yBEGIN hierarchical_btf_identifier { } +//UNSUP | yEND hierarchical_btf_identifier { } +//UNSUP ; + +//UNSUPhierarchical_btf_identifier: // ==IEEE: hierarchical_btf_identifier +//UNSUP // // hierarchical_tf_identifier + hierarchical_block_identifier +//UNSUP hierarchical_identifier/*tf_or_block*/ { $$ = $1; } +//UNSUP // // method_identifier +//UNSUP | hierarchical_identifier class_scope_id { } +//UNSUP | hierarchical_identifier id { } +//UNSUP ; + //********************************************************************** // Randsequence +//UNSUPrandsequence_statement: // ==IEEE: randsequence_statement +//UNSUP yRANDSEQUENCE '(' ')' productionList yENDSEQUENCE { } +//UNSUP | yRANDSEQUENCE '(' id/*production_identifier*/ ')' productionList yENDSEQUENCE { } +//UNSUP ; + +//UNSUPproductionList: // IEEE: production+ +//UNSUP production { $$ = $1; } +//UNSUP | productionList production { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPproduction: // ==IEEE: production +//UNSUP productionFront ':' rs_ruleList ';' { } +//UNSUP ; + +//UNSUPproductionFront: // IEEE: part of production +//UNSUP function_data_type id/*production_identifier*/ { } +//UNSUP | /**/ id/*production_identifier*/ { $$ = $1; } +//UNSUP | function_data_type id/*production_identifier*/ '(' tf_port_listE ')' { } +//UNSUP | /**/ id/*production_identifier*/ '(' tf_port_listE ')' { } +//UNSUP ; + +//UNSUPrs_ruleList: // IEEE: rs_rule+ part of production +//UNSUP rs_rule { $$ = $1; } +//UNSUP | rs_ruleList '|' rs_rule { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPrs_rule: // ==IEEE: rs_rule +//UNSUP rs_production_list { $$ = $1; } +//UNSUP | rs_production_list yP_COLONEQ weight_specification { } +//UNSUP | rs_production_list yP_COLONEQ weight_specification rs_code_block { } +//UNSUP ; + +//UNSUPrs_production_list: // ==IEEE: rs_production_list +//UNSUP rs_prodList { $$ = $1; } +//UNSUP | yRAND yJOIN /**/ production_item production_itemList { } +//UNSUP | yRAND yJOIN '(' expr ')' production_item production_itemList { } +//UNSUP ; + +//UNSUPweight_specification: // ==IEEE: weight_specification +//UNSUP yaINTNUM { $$ = $1; } +//UNSUP | idClassSel/*ps_identifier*/ { $$ = $1; } +//UNSUP | '(' expr ')' { $$ = $2; } +//UNSUP ; + +//UNSUPrs_code_block: // ==IEEE: rs_code_block +//UNSUP '{' '}' { $$ = NULL; } +//UNSUP | '{' rs_code_blockItemList '}' { $$ = $2; } +//UNSUP ; + +//UNSUPrs_code_blockItemList: // IEEE: part of rs_code_block +//UNSUP rs_code_blockItem { $$ = $1; } +//UNSUP | rs_code_blockItemList rs_code_blockItem { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPrs_code_blockItem: // IEEE: part of rs_code_block +//UNSUP data_declaration { $$ = $1; } +//UNSUP | stmt { $$ = $1; } +//UNSUP ; + +//UNSUPrs_prodList: // IEEE: rs_prod+ +//UNSUP rs_prod { $$ = $1; } +//UNSUP | rs_prodList rs_prod { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPrs_prod: // ==IEEE: rs_prod +//UNSUP production_item { $$ = $1; } +//UNSUP | rs_code_block { $$ = $1; } +//UNSUP // // IEEE: rs_if_else +//UNSUP | yIF '(' expr ')' production_item %prec prLOWER_THAN_ELSE { } +//UNSUP | yIF '(' expr ')' production_item yELSE production_item { } +//UNSUP // // IEEE: rs_repeat +//UNSUP | yREPEAT '(' expr ')' production_item { } +//UNSUP // // IEEE: rs_case +//UNSUP | yCASE '(' expr ')' rs_case_itemList yENDCASE { } +//UNSUP ; + +//UNSUPproduction_itemList: // IEEE: production_item+ +//UNSUP production_item { $$ = $1; } +//UNSUP | production_itemList production_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPproduction_item: // ==IEEE: production_item +//UNSUP id/*production_identifier*/ { $$ = $1; } +//UNSUP | id/*production_identifier*/ '(' list_of_argumentsE ')' { } +//UNSUP ; + +//UNSUPrs_case_itemList: // IEEE: rs_case_item+ +//UNSUP rs_case_item { $$ = $1; } +//UNSUP | rs_case_itemList rs_case_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPrs_case_item: // ==IEEE: rs_case_item +//UNSUP caseCondList ':' production_item ';' { } +//UNSUP | yDEFAULT production_item ';' { } +//UNSUP | yDEFAULT ':' production_item ';' { } +//UNSUP ; + //********************************************************************** // Checker +//UNSUPchecker_declaration: // ==IEEE: part of checker_declaration +//UNSUP checkerFront checker_port_listE ';' +//UNSUP checker_or_generate_itemListE yENDCHECKER endLabelE +//UNSUP { SYMP->popScope($$); } +//UNSUP ; + +//UNSUPcheckerFront: // IEEE: part of checker_declaration +//UNSUP yCHECKER idAny/*checker_identifier*/ +//UNSUP { SYMP->pushNew($$); } +//UNSUP ; + +//UNSUPchecker_port_listE: // IEEE: [ ( [ checker_port_list ] ) ] +//UNSUP // // checker_port_item is basically the same as property_port_item, minus yLOCAL:: +//UNSUP // // Want to bet 1800-2012 adds local to checkers? +//UNSUP property_port_listE { $$ = $1; } +//UNSUP ; + +//UNSUPchecker_or_generate_itemListE: // IEEE: [{ checker_or_generate_itemList }] +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | checker_or_generate_itemList { $$ = $1; } +//UNSUP ; + +//UNSUPchecker_or_generate_itemList: // IEEE: { checker_or_generate_itemList } +//UNSUP checker_or_generate_item { $$ = $1; } +//UNSUP | checker_or_generate_itemList checker_or_generate_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPchecker_or_generate_item: // ==IEEE: checker_or_generate_item +//UNSUP checker_or_generate_item_declaration { $$ = $1; } +//UNSUP | initial_construct { $$ = $1; } +//UNSUP // // IEEE: checker_construct +//UNSUP | yALWAYS stmtBlock { } +//UNSUP | final_construct { $$ = $1; } +//UNSUP | assertion_item { $$ = $1; } +//UNSUP | continuous_assign { $$ = $1; } +//UNSUP | checker_generate_item { $$ = $1; } +//UNSUP ; + +//UNSUPchecker_or_generate_item_declaration: // ==IEEE: checker_or_generate_item_declaration +//UNSUP data_declaration { $$ = $1; } +//UNSUP | yRAND data_declaration { } +//UNSUP | function_declaration { $$ = $1; } +//UNSUP | checker_declaration { $$ = $1; } +//UNSUP | assertion_item_declaration { $$ = $1; } +//UNSUP | covergroup_declaration { $$ = $1; } +//UNSUP // // IEEE deprecated: overload_declaration +//UNSUP | genvar_declaration { $$ = $1; } +//UNSUP | clocking_declaration { $$ = $1; } +//UNSUP | yDEFAULT yCLOCKING id/*clocking_identifier*/ ';' { } +//UNSUP | yDEFAULT yDISABLE yIFF expr/*expression_or_dist*/ ';' { } +//UNSUP | ';' { $$ = NULL; } +//UNSUP ; + +//UNSUPchecker_generate_item: // ==IEEE: checker_generate_item +//UNSUP // // Specialized for checker so need "c_" prefixes here +//UNSUP c_loop_generate_construct { $$ = $1; } +//UNSUP | c_conditional_generate_construct { $$ = $1; } +//UNSUP | c_generate_region { $$ = $1; } +//UNSUP // +//UNSUP | elaboration_system_task { $$ = $1; } +//UNSUP ; + +//UNSUPchecker_instantiation: +//UNSUP // // Only used for procedural_assertion_item's +//UNSUP // // Version in concurrent_assertion_item looks like etcInst +//UNSUP // // Thus instead of *_checker_port_connection we can use etcInst's cellpinList +//UNSUP id/*checker_identifier*/ id '(' cellpinList ')' ';' { } +//UNSUP ; + //********************************************************************** // Class +class_declaration: // ==IEEE: part of class_declaration + // // IEEE-2012: using this also for interface_class_declaration + // // The classExtendsE rule relys on classFront having the + // // new class scope correct via classFront + classFront parameter_port_listE classExtendsE classImplementsE ';' + class_itemListE yENDCLASS endLabelE + { $$ = $1; $1->addMembersp($2); + $1->addMembersp($4); $1->addMembersp($6); + SYMP->popScope($$); + GRAMMARP->endLabel($7, $1, $8); } + ; + +classFront: // IEEE: part of class_declaration + classVirtualE yCLASS lifetimeE idAny/*class_identifier*/ + { $$ = new AstClass($2, *$4); + SYMP->pushNew($$); + BBUNSUP($2, "Unsupported: classes"); } + // // IEEE: part of interface_class_declaration + | yINTERFACE yCLASS lifetimeE idAny/*class_identifier*/ + { $$ = new AstClass($2, *$4); + SYMP->pushNew($$); + BBUNSUP($2, "Unsupported: interface classes"); } + ; + +classVirtualE: + /* empty */ { } + | yVIRTUAL__CLASS { BBUNSUP($1, "Unsupported: virtual classes"); } + ; + +classExtendsE: // IEEE: part of class_declaration + // // The classExtendsE rule relys on classFront having the + // // new class scope correct via classFront + /* empty */ { $$ = NULL; } + | yEXTENDS classExtendsList { $$ = $2; } + ; + +classExtendsList: // IEEE: part of class_declaration + classExtendsOne { $$ = $1; } + | classExtendsList ',' classExtendsOne { $$ = AstNode::addNextNull($1, $3); } + ; + +classExtendsOne: // IEEE: part of class_declaration + class_typeWithoutId { $$ = NULL; BBUNSUP($1, "Unsupported: extends"); } + // // IEEE: Might not be legal to have more than one set of parameters in an extends + | class_typeWithoutId '(' list_of_argumentsE ')' { $$ = NULL; BBUNSUP($1, "Unsupported: extends"); } + ; + +classImplementsE: // IEEE: part of class_declaration + // // All 1800-2012 + /* empty */ { $$ = NULL; } + | yIMPLEMENTS classImplementsList { $$ = $2; } + ; + +classImplementsList: // IEEE: part of class_declaration + // // All 1800-2012 + class_typeWithoutId { $$ = NULL; BBUNSUP($1, "Unsupported: implements class"); } + | classImplementsList ',' class_typeWithoutId { $$ = AstNode::addNextNull($1, $3); } + ; + //========= // Package scoping - to traverse the symbol table properly, the final identifer // must be included in the rules below. @@ -4051,13 +5389,48 @@ ps_id_etc: // package_scope + general id ps_type: // IEEE: ps_parameter_identifier | ps_type_identifier // Even though we looked up the type and have a AstNode* to it, // we can't fully resolve it because it may have been just a forward definition. - package_scopeIdFollowsE yaID__aTYPE { $$ = new AstRefDType($2, *$2); VN_CAST($$, RefDType)->packagep($1); } + package_scopeIdFollowsE idRefDType { $$ = $2; $2->packagep($1); } // // Simplify typing - from ps_covergroup_identifier - //UNSUP package_scopeIdFollowsE yaID__aCOVERGROUP { $$=$1; $$=$1+$2; } ; //=== Below rules assume special scoping per above +class_typeWithoutId: // as with class_typeWithoutId but allow yaID__aTYPE + // // and we thus don't need to resolve it in specified package + package_scopeIdFollowsE class_typeOneList { $$ = $2; $2->packagep($1); } + ; + +class_scopeWithoutId: // class_type standalone without following id + // // and we thus don't need to resolve it in specified package + class_scopeIdFollows { $$ = $1; } + ; + +class_scopeIdFollows: // IEEE: class_scope + type + // // IEEE: "class_type yP_COLONCOLON" + // // IMPORTANT: The lexer will parse the following ID to be in the found package + // // But class_type:'::' conflicts with class_scope:'::' so expand here + package_scopeIdFollowsE class_typeOneListColonIdFollows + { $$ = NULL; BBUNSUP(CRELINE(), "Unsupported: scoped class reference"); } + ; + +class_typeOneListColonIdFollows: // IEEE: class_type :: but allow yaID__aTYPE + class_typeOneList yP_COLONCOLON { BBUNSUP($2, "Unsupported: Hierarchical class references"); } + ; + +class_typeOneList: // IEEE: class_type: "id [ parameter_value_assignment ]" but allow yaID__aTYPE + // // If you follow the rules down, class_type is really a list via ps_class_identifier + // // Must propagate scp up for next id + class_typeOne { $$ = $1; } + | class_typeOneListColonIdFollows class_typeOne { $$ = $2; /*UNSUP*/ } + ; + +class_typeOne: // IEEE: class_type: "id [ parameter_value_assignment ]" but allow yaID__aTYPE + // // If you follow the rules down, class_type is really a list via ps_class_identifier + // // Not listed in IEEE, but see bug627 any parameter type maybe a class + idRefDType parameter_value_assignmentE + { $$ = $1; if ($2) BBUNSUP($2->fileline(), "Unsupported: Parameterized classes"); } + ; + package_scopeIdFollowsE: // IEEE: [package_scope] // // IMPORTANT: The lexer will parse the following ID to be in the found package // // class_qualifier := [ yLOCAL '::' ] [ implicit_class_handle '.' class_scope ] @@ -4076,21 +5449,208 @@ package_scopeIdFollows: // IEEE: package_scope //UNSUP /*cont*/ yP_COLONCOLON { UNSUP } ; +//^^^========= + +class_itemListE: + /* empty */ { $$ = NULL; } + | class_itemList { $$ = $1; } + ; + +class_itemList: + class_item { $$ = $1; } + | class_itemList class_item { $$ = AstNode::addNextNull($1, $2); } + ; + +class_item: // ==IEEE: class_item + class_property { $$ = $1; } + | class_method { $$ = $1; } + //UNSUP class_constraint { $$ = $1; } + // + | class_declaration { $$ = NULL; BBUNSUP($1, "Unsupported: class within class"); } + | timeunits_declaration { $$ = $1; } + //UNSUP covergroup_declaration { $$ = $1; } + | local_parameter_declaration ';' { $$ = $1; BBUNSUP($2, "Unsupported: class parameters"); } // 1800-2009 + | parameter_declaration ';' { $$ = $1; BBUNSUP($2, "Unsupported: class parameters"); } // 1800-2009 + | ';' { $$ = NULL; } + // + | error ';' { $$ = NULL; } + ; + +class_method: // ==IEEE: class_method + memberQualResetListE task_declaration { $$ = $2; } + | memberQualResetListE function_declaration { $$ = $2; } + | yPURE yVIRTUAL__ETC memberQualResetListE method_prototype ';' + { $$ = NULL; BBUNSUP($1, "Unsupported: pure virtual class method"); } + | yEXTERN memberQualResetListE method_prototype ';' + { $$ = NULL; BBUNSUP($1, "Unsupported: extern class method prototype"); } + // // IEEE: "method_qualifierE class_constructor_declaration" + // // part of function_declaration + | yEXTERN memberQualResetListE class_constructor_prototype + { $$ = NULL; BBUNSUP($1, "Unsupported: extern class"); } + ; + +// IEEE: class_constructor_prototype +// See function_declaration + +class_item_qualifier: // IEEE: class_item_qualifier minus ySTATIC + // // IMPORTANT: yPROTECTED | yLOCAL is in a lex rule + yPROTECTED { $$ = NULL; } // Ignoring protected until implemented + | yLOCAL__ETC { $$ = NULL; BBUNSUP($1, "Unsupported: 'local' class item"); } + | ySTATIC__ETC { $$ = NULL; BBUNSUP($1, "Unsupported: 'static' class item"); } + ; + +memberQualResetListE: // Called from class_property for all qualifiers before yVAR + // // Also before method declarations, to prevent grammar conflict + // // Thus both types of qualifiers (method/property) are here + /*empty*/ { $$ = NULL; } + | memberQualList { $$ = $1; } + ; + +memberQualList: + memberQualOne { $$ = $1; } + | memberQualList memberQualOne { $$ = AstNode::addNextNull($1, $2); } + ; + +memberQualOne: // IEEE: property_qualifier + method_qualifier + // // Part of method_qualifier and property_qualifier + class_item_qualifier { $$ = $1; } + // // Part of method_qualifier only + | yVIRTUAL__ETC { $$ = NULL; BBUNSUP($1, "Unsupported: virtual class member qualifier"); } + // // Part of property_qualifier only + | random_qualifier { $$ = NULL; } + // // Part of lifetime, but here as ySTATIC can be in different positions + | yAUTOMATIC { $$ = NULL; BBUNSUP($1, "Unsupported: automatic class member qualifier"); } + // // Part of data_declaration, but not in data_declarationVarFrontClass + | yCONST__ETC { $$ = NULL; BBUNSUP($1, "Unsupported: const class member qualifier"); } + ; + //********************************************************************** // Constraints +//UNSUPclass_constraint: // ==IEEE: class_constraint +//UNSUP // // IEEE: constraint_declaration +//UNSUP constraintStaticE yCONSTRAINT idAny constraint_block { } +//UNSUP // // IEEE: constraint_prototype + constraint_prototype_qualifier +//UNSUP | constraintStaticE yCONSTRAINT idAny ';' { } +//UNSUP | yEXTERN constraintStaticE yCONSTRAINT idAny ';' { } +//UNSUP | yPURE constraintStaticE yCONSTRAINT idAny ';' { } +//UNSUP ; + +//UNSUPconstraint_block: // ==IEEE: constraint_block +//UNSUP '{' constraint_block_itemList '}' { $$ = $1; } +//UNSUP ; + +//UNSUPconstraint_block_itemList: // IEEE: { constraint_block_item } +//UNSUP constraint_block_item { $$ = $1; } +//UNSUP | constraint_block_itemList constraint_block_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPconstraint_block_item: // ==IEEE: constraint_block_item +//UNSUP ySOLVE solve_before_list yBEFORE solve_before_list ';' { } +//UNSUP | constraint_expression { $$ = $1; } +//UNSUP ; + +//UNSUPsolve_before_list: // ==IEEE: solve_before_list +//UNSUP constraint_primary { $$ = $1; } +//UNSUP | solve_before_list ',' constraint_primary { } +//UNSUP ; + +//UNSUPconstraint_primary: // ==IEEE: constraint_primary +//UNSUP // // exprScope more general than: [ implicit_class_handle '.' | class_scope ] hierarchical_identifier select +//UNSUP exprScope { $$ = $1; } +//UNSUP ; + +//UNSUPconstraint_expressionList: // ==IEEE: { constraint_expression } +//UNSUP constraint_expression { $$ = $1; } +//UNSUP | constraint_expressionList constraint_expression { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPconstraint_expression: // ==IEEE: constraint_expression +//UNSUP expr/*expression_or_dist*/ ';' { $$ = $1; } +//UNSUP // // 1800-2012: +//UNSUP | ySOFT expr/*expression_or_dist*/ ';' { } +//UNSUP // // 1800-2012: +//UNSUP // // IEEE: uniqueness_constraint ';' +//UNSUP | yUNIQUE '{' open_range_list '}' { } +//UNSUP // // IEEE: expr yP_MINUSGT constraint_set +//UNSUP // // Conflicts with expr:"expr yP_MINUSGT expr"; rule moved there +//UNSUP // +//UNSUP | yIF '(' expr ')' constraint_set %prec prLOWER_THAN_ELSE { } +//UNSUP | yIF '(' expr ')' constraint_set yELSE constraint_set { } +//UNSUP // // IEEE says array_identifier here, but dotted accepted in VMM + 1800-2009 +//UNSUP | yFOREACH '(' idClassForeach/*array_id[loop_variables]*/ ')' constraint_set { } +//UNSUP // // soft is 1800-2012 +//UNSUP | yDISABLE ySOFT expr/*constraint_primary*/ ';' { } +//UNSUP ; + +//UNSUPconstraint_set: // ==IEEE: constraint_set +//UNSUP constraint_expression { $$ = $1; } +//UNSUP | '{' constraint_expressionList '}' { $$ = $2; } +//UNSUP ; + +//UNSUPdist_list: // ==IEEE: dist_list +//UNSUP dist_item { $$ = $1; } +//UNSUP | dist_list ',' dist_item { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPdist_item: // ==IEEE: dist_item + dist_weight +//UNSUP value_range { $$ = $1; } +//UNSUP | value_range yP_COLONEQ expr { } +//UNSUP | value_range yP_COLONDIV expr { } +//UNSUP ; + +//UNSUPextern_constraint_declaration: // ==IEEE: extern_constraint_declaration +//UNSUP constraintStaticE yCONSTRAINT class_scope_id constraint_block { } +//UNSUP ; + +//UNSUPconstraintStaticE: // IEEE: part of extern_constraint_declaration +//UNSUP /* empty */ { $$ = false; } +//UNSUP | ySTATIC__CONSTRAINT { $$ = true; } +//UNSUP ; + //********************************************************************** // VLT Files vltItem: - vltOffFront { V3Config::addIgnore($1,false,"*",0,0); } - | vltOffFront yVLT_D_FILE yaSTRING { V3Config::addIgnore($1,false,*$3,0,0); } - | vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM { V3Config::addIgnore($1,false,*$3,$5->toUInt(),$5->toUInt()+1); } - | vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM { V3Config::addIgnore($1,false,*$3,$5->toUInt(),$7->toUInt()+1); } - | vltOnFront { V3Config::addIgnore($1,true,"*",0,0); } - | vltOnFront yVLT_D_FILE yaSTRING { V3Config::addIgnore($1,true,*$3,0,0); } - | vltOnFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM { V3Config::addIgnore($1,true,*$3,$5->toUInt(),$5->toUInt()+1); } - | vltOnFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM { V3Config::addIgnore($1,true,*$3,$5->toUInt(),$7->toUInt()+1); } + + vltOffFront { V3Config::addIgnore($1, false, "*", 0, 0); } + | vltOffFront yVLT_D_FILE yaSTRING + { V3Config::addIgnore($1, false, *$3, 0, 0); } + | vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM + { V3Config::addIgnore($1, false, *$3, $5->toUInt(), $5->toUInt()+1); } + | vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM + { V3Config::addIgnore($1, false, *$3, $5->toUInt(), $7->toUInt()+1); } + | vltOffFront yVLT_D_FILE yaSTRING yVLT_D_MATCH yaSTRING + { if (($1==V3ErrorCode::I_COVERAGE) || ($1==V3ErrorCode::I_TRACING)) { + $1->v3error("Argument -match only supported for lint_off"<toUInt(), $5->toUInt()+1); } + | vltOnFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM + { V3Config::addIgnore($1, true, *$3, $5->toUInt(), $7->toUInt()+1); } + | vltVarAttrFront vltDModuleE vltDFTaskE vltVarAttrVarE attr_event_controlE + { V3Config::addVarAttr($1, *$2, *$3, *$4, $1, $5); } + | vltInlineFront vltDModuleE vltDFTaskE + { V3Config::addInline($1, *$2, *$3, $1); } + | yVLT_COVERAGE_BLOCK_OFF yVLT_D_FILE yaSTRING + { V3Config::addCoverageBlockOff(*$3, 0); } + | yVLT_COVERAGE_BLOCK_OFF yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM + { V3Config::addCoverageBlockOff(*$3, $5->toUInt()); } + | yVLT_COVERAGE_BLOCK_OFF yVLT_D_MODULE yaSTRING yVLT_D_BLOCK yaSTRING + { V3Config::addCoverageBlockOff(*$3, *$5); } + | yVLT_FULL_CASE yVLT_D_FILE yaSTRING + { V3Config::addCaseFull(*$3, 0); } + | yVLT_FULL_CASE yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM + { V3Config::addCaseFull(*$3, $5->toUInt()); } + | yVLT_PARALLEL_CASE yVLT_D_FILE yaSTRING + { V3Config::addCaseParallel(*$3, 0); } + | yVLT_PARALLEL_CASE yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM + { V3Config::addCaseParallel(*$3, $5->toUInt()); } ; vltOffFront: @@ -4098,6 +5658,10 @@ vltOffFront: | yVLT_TRACING_OFF { $$ = V3ErrorCode::I_TRACING; } | yVLT_LINT_OFF { $$ = V3ErrorCode::I_LINT; } | yVLT_LINT_OFF yVLT_D_MSG yaID__ETC + { $$ = V3ErrorCode((*$3).c_str()); + if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown Error Code: "<<*$3<v3warn(DEPRECATED, "Deprecated -msg in configuration files, use -rule instead."<v3error("Unknown Error Code: "<<*$3<: | yVLT_TRACING_ON { $$ = V3ErrorCode::I_TRACING; } | yVLT_LINT_ON { $$ = V3ErrorCode::I_LINT; } | yVLT_LINT_ON yVLT_D_MSG yaID__ETC + { $$ = V3ErrorCode((*$3).c_str()); + if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown Error Code: "<<*$3<v3warn(DEPRECATED, "Deprecated -msg in configuration files, use -rule instead."<v3error("Unknown Error Code: "<<*$3<: + /* empty */ { static string unit = "__024unit"; $$ = &unit; } + | yVLT_D_MODULE str { $$ = $2; } + ; + +vltDFTaskE: + /* empty */ { static string empty = ""; $$ = ∅ } + | yVLT_D_FUNCTION str { $$ = $2; } + | yVLT_D_TASK str { $$ = $2; } + ; + +vltInlineFront: + yVLT_INLINE { $$ = true; } + | yVLT_NO_INLINE { $$ = false; } + ; + +vltVarAttrVarE: + /* empty */ { static string empty = ""; $$ = ∅ } + | yVLT_D_VAR str { $$ = $2; } + ; + +vltVarAttrFront: + yVLT_CLOCK_ENABLE { $$ = AstAttrType::VAR_CLOCK_ENABLE; } + | yVLT_CLOCKER { $$ = AstAttrType::VAR_CLOCKER; } + | yVLT_ISOLATE_ASSIGNMENTS { $$ = AstAttrType::VAR_ISOLATE_ASSIGNMENTS; } + | yVLT_NO_CLOCKER { $$ = AstAttrType::VAR_NO_CLOCKER; } + | yVLT_PUBLIC { $$ = AstAttrType::VAR_PUBLIC; v3Global.dpi(true); } + | yVLT_PUBLIC_FLAT { $$ = AstAttrType::VAR_PUBLIC_FLAT; v3Global.dpi(true); } + | yVLT_PUBLIC_FLAT_RD { $$ = AstAttrType::VAR_PUBLIC_FLAT_RD; v3Global.dpi(true); } + | yVLT_PUBLIC_FLAT_RW { $$ = AstAttrType::VAR_PUBLIC_FLAT_RW; v3Global.dpi(true); } + | yVLT_SC_BV { $$ = AstAttrType::VAR_SC_BV; } + | yVLT_SFORMAT { $$ = AstAttrType::VAR_SFORMAT; } + ; + //********************************************************************** %% // For implementation functions see V3ParseGrammar.cpp diff --git a/src/vlcovgen b/src/vlcovgen index 7c19810b3..135f80293 100755 --- a/src/vlcovgen +++ b/src/vlcovgen @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -#require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; @@ -150,7 +150,7 @@ Displays this message and program version and exits. =head1 DISTRIBUTION -Copyright 2002-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2002-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/test_regress/CMakeLists.txt b/test_regress/CMakeLists.txt index db053f6dd..e4492d064 100644 --- a/test_regress/CMakeLists.txt +++ b/test_regress/CMakeLists.txt @@ -4,7 +4,7 @@ # # This CMake file is meant to be consumed by regression tests. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/Makefile b/test_regress/Makefile index 1b224dc11..46c13973f 100644 --- a/test_regress/Makefile +++ b/test_regress/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/Makefile_obj b/test_regress/Makefile_obj index 9d0c9bcf4..02d911e7b 100644 --- a/test_regress/Makefile_obj +++ b/test_regress/Makefile_obj @@ -5,7 +5,7 @@ # # This is executed in the object directory, and called by ../Makefile # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/driver.pl b/test_regress/driver.pl index ab1d60acd..c65327582 100755 --- a/test_regress/driver.pl +++ b/test_regress/driver.pl @@ -1,10 +1,9 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### require 5.006_001; +use warnings; use Cwd; BEGIN { if (!$ENV{VERILATOR_ROOT} && -x "../bin/verilator") { @@ -2651,7 +2650,7 @@ Command to use to invoke XSim xvlog The latest version is available from L. -Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/test_regress/t/bootstrap.pl b/test_regress/t/bootstrap.pl index a057f813c..418e56d58 100755 --- a/test_regress/t/bootstrap.pl +++ b/test_regress/t/bootstrap.pl @@ -1,4 +1,4 @@ -#!/usr/bin/perl +#!/usr/bin/env perl # DESCRIPTION: Verilator: Verilog Test driver bootstrapper # # Copyright 2008 by Wilson Snyder. This program is free software; you can diff --git a/test_regress/t/t_array_unpacked_public.pl b/test_regress/t/t_array_unpacked_public.pl new file mode 100755 index 000000000..1bb1cc973 --- /dev/null +++ b/test_regress/t/t_array_unpacked_public.pl @@ -0,0 +1,21 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + verilator_flags2 => ["--public-flat-rw"], + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_array_unpacked_public.v b/test_regress/t/t_array_unpacked_public.v new file mode 100644 index 000000000..a54ea36e2 --- /dev/null +++ b/test_regress/t/t_array_unpacked_public.v @@ -0,0 +1,20 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2020 by Stefan Wallentowitz + +module t(); + logic din [0:15]; + + array_test array_test_inst(.din(din)); + + initial begin + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule + +module array_test( + input din [0:15] +); +endmodule diff --git a/test_regress/t/t_assert_implication.pl b/test_regress/t/t_assert_implication.pl new file mode 100755 index 000000000..fd994540c --- /dev/null +++ b/test_regress/t/t_assert_implication.pl @@ -0,0 +1,21 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + verilator_flags2 => ['--assert --cc'], + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_assert_implication.v b/test_regress/t/t_assert_implication.v new file mode 100644 index 000000000..686d65643 --- /dev/null +++ b/test_regress/t/t_assert_implication.v @@ -0,0 +1,57 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Peter Monsson. + +module t (/*AUTOARG*/ + // Inputs + clk + ); + + input clk; + integer cyc; initial cyc=1; + + Test test (/*AUTOINST*/ + // Inputs + .clk (clk)); + + always @ (posedge clk) begin + if (cyc!=0) begin + cyc <= cyc + 1; + if (cyc==10) begin + $write("*-* All Finished *-*\n"); + $finish; + end + end + end + +endmodule + +module Test + ( + input clk + ); + +`ifdef FAIL_ASSERT_1 + assert property ( + @(posedge clk) + 1 |-> 0 + ) else $display("[%0t] wrong implication", $time); +`endif + + assert property ( + @(posedge clk) + 1 |-> 1 + ); + + assert property ( + @(posedge clk) + 0 |-> 0 + ); + + assert property ( + @(posedge clk) + 0 |-> 1 + ); + +endmodule diff --git a/test_regress/t/t_assert_implication_bad.pl b/test_regress/t/t_assert_implication_bad.pl new file mode 100755 index 000000000..eb6f2f7e3 --- /dev/null +++ b/test_regress/t/t_assert_implication_bad.pl @@ -0,0 +1,26 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_assert_implication.v"); + +compile( + v_flags2 => ['+define+FAIL_ASSERT_1'], + verilator_flags2 => ['--assert --cc'], + ); + +execute( + ); + +# We expect to get a message when this assert fires: +file_grep($Self->{run_log_filename}, qr/wrong implication/); + +ok(1); +1; diff --git a/test_regress/t/t_assert_synth.v b/test_regress/t/t_assert_synth.v index 8506ca13a..d48d5ccb0 100644 --- a/test_regress/t/t_assert_synth.v +++ b/test_regress/t/t_assert_synth.v @@ -26,7 +26,11 @@ module t (/*AUTOARG*/ always @* begin // Note not all tools support directives on casez's +`ifdef ATTRIBUTES case ({a,b_fc}) // synopsys full_case +`else + case ({a,b_fc}) +`endif 2'b0_0: ; 2'b0_1: ; 2'b1_0: ; @@ -41,7 +45,15 @@ module t (/*AUTOARG*/ end always @* begin +`ifdef ATTRIBUTES case (1'b1) // synopsys full_case parallel_case +`else + `ifdef FAILING_FULL + case (1'b1) // synopsys parallel_case + `else + case (1'b1) // synopsys parallel_full + `endif +`endif a: ; b_pc: ; endcase diff --git a/test_regress/t/t_assert_synth_full.pl b/test_regress/t/t_assert_synth_full.pl index e59b20408..eb9239199 100755 --- a/test_regress/t/t_assert_synth_full.pl +++ b/test_regress/t/t_assert_synth_full.pl @@ -12,7 +12,7 @@ scenarios(simulator => 1); top_filename("t/t_assert_synth.v"); compile( - v_flags2 => ['+define+FAILING_FULL'], + v_flags2 => ['+define+FAILING_FULL +define+ATTRIBUTES'], verilator_flags2 => ['--assert'], nc_flags2 => ['+assert'], ); @@ -21,7 +21,7 @@ execute( check_finished => 0, fails => $Self->{vlt_all}, expect => -'%Error: t_assert_synth.v:\d+: Assertion failed in top.t: synthesis full_case' +'%Error: t_assert_synth.v:30: Assertion failed in top.t: synthesis full_case' ); ok(1); diff --git a/test_regress/t/t_assert_synth_full.vlt b/test_regress/t/t_assert_synth_full.vlt new file mode 100644 index 000000000..e2615f828 --- /dev/null +++ b/test_regress/t/t_assert_synth_full.vlt @@ -0,0 +1,8 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +full_case -file "t/t_assert_synth.v" -lines 32 diff --git a/test_regress/t/t_assert_synth_full_vlt.out b/test_regress/t/t_assert_synth_full_vlt.out new file mode 100644 index 000000000..ad5ebd09f --- /dev/null +++ b/test_regress/t/t_assert_synth_full_vlt.out @@ -0,0 +1,3 @@ +[40] %Error: t_assert_synth.v:32: Assertion failed in top.t: synthesis full_case, but non-match found +%Error: t/t_assert_synth.v:32: Verilog $stop +Aborting... diff --git a/test_regress/t/t_assert_synth_full_vlt.pl b/test_regress/t/t_assert_synth_full_vlt.pl new file mode 100755 index 000000000..eb2eb54ae --- /dev/null +++ b/test_regress/t/t_assert_synth_full_vlt.pl @@ -0,0 +1,27 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_assert_synth.v"); + +compile( + v_flags2 => ['+define+FAILING_FULL', "t/t_assert_synth_full.vlt"], + verilator_flags2 => ['--assert'], + nc_flags2 => ['+assert'], + ); + +execute( + check_finished => 0, + fails => $Self->{vlt_all}, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_assert_synth_parallel.pl b/test_regress/t/t_assert_synth_parallel.pl index ef491ab7d..628288ac8 100755 --- a/test_regress/t/t_assert_synth_parallel.pl +++ b/test_regress/t/t_assert_synth_parallel.pl @@ -12,7 +12,7 @@ scenarios(simulator => 1); top_filename("t/t_assert_synth.v"); compile( - v_flags2 => ['+define+FAILING_PARALLEL'], + v_flags2 => ['+define+FAILING_PARALLEL', '+define+ATTRIBUTES'], verilator_flags2 => ['--assert'], nc_flags2 => ['+assert'], ); diff --git a/test_regress/t/t_assert_synth_parallel.vlt b/test_regress/t/t_assert_synth_parallel.vlt new file mode 100644 index 000000000..d25ddaf06 --- /dev/null +++ b/test_regress/t/t_assert_synth_parallel.vlt @@ -0,0 +1,8 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +parallel_case -file "t/t_assert_synth.v" -lines 54 diff --git a/test_regress/t/t_assert_synth_parallel_vlt.pl b/test_regress/t/t_assert_synth_parallel_vlt.pl new file mode 100755 index 000000000..c9cd46167 --- /dev/null +++ b/test_regress/t/t_assert_synth_parallel_vlt.pl @@ -0,0 +1,28 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_assert_synth.v"); + +compile( + v_flags2 => ['+define+FAILING_PARALLEL', "t/t_assert_synth_parallel.vlt"], + verilator_flags2 => ['--assert'], + nc_flags2 => ['+assert'], + ); + +execute( + check_finished => 0, + fails => $Self->{vlt_all}, + expect => +'%Error: t_assert_synth.v:\d+: Assertion failed in top.t: synthesis parallel_case' + ); + +ok(1); +1; diff --git a/test_regress/t/t_class_unsup_bad.out b/test_regress/t/t_class_unsup_bad.out new file mode 100644 index 000000000..7d5a2eb29 --- /dev/null +++ b/test_regress/t/t_class_unsup_bad.out @@ -0,0 +1,31 @@ +%Error: t/t_class_unsup_bad.v:6: Unsupported: virtual interface +virtual interface vi_t vi; +^~~~~~~ +%Error: t/t_class_unsup_bad.v:7: Unsupported: virtual data type +virtual vi_t vi2; +^~~~~~~ +%Error: t/t_class_unsup_bad.v:12: Unsupported: classes +class C #(parameter P=1); +^~~~~ +%Error: t/t_class_unsup_bad.v:13: Unsupported: class parameters + localparam LOCPAR = 10; + ^ +%Error: t/t_class_unsup_bad.v:16: Unsupported: 'local' class item + local int loc; + ^~~~~ +%Error: t/t_class_unsup_bad.v:24: Unsupported: virtual class member qualifier + virtual function void func_virtual; endfunction + ^~~~~~~ +%Error: t/t_class_unsup_bad.v:25: Unsupported: pure virtual class method + pure virtual function void func_pure_virtual; endfunction + ^~~~ +%Error: t/t_class_unsup_bad.v:25: syntax error, unexpected endfunction + pure virtual function void func_pure_virtual; endfunction + ^~~~~~~~~~~ +%Error: t/t_class_unsup_bad.v:31: Unsupported: virtual classes +virtual class VC; +^~~~~~~ +%Error: t/t_class_unsup_bad.v:31: Unsupported: classes +virtual class VC; + ^~~~~ +%Error: Exiting due to diff --git a/test_regress/t/t_class_unsup_bad.pl b/test_regress/t/t_class_unsup_bad.pl new file mode 100755 index 000000000..49151b6cd --- /dev/null +++ b/test_regress/t/t_class_unsup_bad.pl @@ -0,0 +1,18 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2019 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +lint( + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_class_unsup_bad.v b/test_regress/t/t_class_unsup_bad.v new file mode 100644 index 000000000..e509c5aa0 --- /dev/null +++ b/test_regress/t/t_class_unsup_bad.v @@ -0,0 +1,35 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Wilson Snyder. + +virtual interface vi_t vi; +virtual vi_t vi2; + +typedef class c; +typedef interface class ic; + +class C #(parameter P=1); + localparam LOCPAR = 10; + int imember; + + local int loc; + protected int prot; + + rand int irand; + randc int icrand; + + task classtask; endtask + function int classfunc; endfunction + virtual function void func_virtual; endfunction + pure virtual function void func_pure_virtual; endfunction + automatic function void func_automatic; endfunction + const function void func_const; endfunction + extern task exttask; +endclass + +virtual class VC; +endclass + +module t (/*AUTOARG*/); +endmodule diff --git a/test_regress/t/t_clk_concat.pl b/test_regress/t/t_clk_concat.pl index 1be18a66c..abe880617 100755 --- a/test_regress/t/t_clk_concat.pl +++ b/test_regress/t/t_clk_concat.pl @@ -9,9 +9,18 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + compile( + verilator_flags2 => ["+define+ATTRIBUTES"], ); +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + execute( check_finished => 1, ); diff --git a/test_regress/t/t_clk_concat.v b/test_regress/t/t_clk_concat.v index caba2a926..afb1d26b1 100644 --- a/test_regress/t/t_clk_concat.v +++ b/test_regress/t/t_clk_concat.v @@ -70,9 +70,15 @@ module t2( endmodule module t( +`ifdef ATTRIBUTES input clk0 /*verilator clocker*/, input clk1 /*verilator clocker*/, input clk2 /*verilator clocker*/, +`else + input clk0, + input clk1, + input clk2, +`endif input data_in ); diff --git a/test_regress/t/t_clk_concat.vlt b/test_regress/t/t_clk_concat.vlt new file mode 100644 index 000000000..c6af77881 --- /dev/null +++ b/test_regress/t/t_clk_concat.vlt @@ -0,0 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +clocker -module "t" -var "clk*" +no_clocker -module "t" -var "data_in" diff --git a/test_regress/t/t_clk_concat_vlt.pl b/test_regress/t/t_clk_concat_vlt.pl new file mode 100755 index 000000000..965daacd9 --- /dev/null +++ b/test_regress/t/t_clk_concat_vlt.pl @@ -0,0 +1,31 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_clk_concat.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + verilator_flags2 => ["t/t_clk_concat.vlt"], + ); + +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_clk_first.pl b/test_regress/t/t_clk_first.pl index 89a4e77d9..91433482b 100755 --- a/test_regress/t/t_clk_first.pl +++ b/test_regress/t/t_clk_first.pl @@ -9,7 +9,10 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + compile( + verilator_flags2 => ["+define+ATTRIBUTES=1"], ); execute( diff --git a/test_regress/t/t_clk_first.v b/test_regress/t/t_clk_first.v index 32fb1c14b..52cf01582 100644 --- a/test_regress/t/t_clk_first.v +++ b/test_regress/t/t_clk_first.v @@ -8,8 +8,8 @@ module t (/*AUTOARG*/ clk, fastclk ); - input clk /*verilator sc_clock*/; - input fastclk /*verilator sc_clock*/; + input clk; + input fastclk; reg reset_l; int cyc; @@ -32,8 +32,8 @@ module t_clk (/*AUTOARG*/ clk, fastclk, reset_l ); - input clk /*verilator sc_clock*/; - input fastclk /*verilator sc_clock*/; + input clk; + input fastclk; input reset_l; // surefire lint_off STMINI diff --git a/test_regress/t/t_clk_first_bad.out b/test_regress/t/t_clk_first_bad.out new file mode 100644 index 000000000..2e9e41bf1 --- /dev/null +++ b/test_regress/t/t_clk_first_bad.out @@ -0,0 +1,5 @@ +%Warning-DEPRECATED: t/t_clk_first_deprecated.v:11: sc_clock is deprecated and will be removed + input clk /*verilator sc_clock*/ ; + ^~~~~~~~~~~~~~~~~~~~~~ + ... Use "/* verilator lint_off DEPRECATED */" and lint_on around source to disable this message. +%Error: Exiting due to diff --git a/test_regress/t/t_clk_first_bad.pl b/test_regress/t/t_clk_first_bad.pl new file mode 100755 index 000000000..3f7b54038 --- /dev/null +++ b/test_regress/t/t_clk_first_bad.pl @@ -0,0 +1,21 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +top_filename("t/t_clk_first_deprecated.v"); + +lint( + verilator_flags2 => ["--lint-only"], + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_clk_first_deprecated.pl b/test_regress/t/t_clk_first_deprecated.pl new file mode 100755 index 000000000..01d7bf8d0 --- /dev/null +++ b/test_regress/t/t_clk_first_deprecated.pl @@ -0,0 +1,17 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +lint( + verilator_flags2 => ["--lint-only", "-Wno-DEPRECATED"], + ); + +ok(1); +1; diff --git a/test_regress/t/t_clk_first_deprecated.v b/test_regress/t/t_clk_first_deprecated.v new file mode 100644 index 000000000..5c5f5ce12 --- /dev/null +++ b/test_regress/t/t_clk_first_deprecated.v @@ -0,0 +1,13 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2003 by Wilson Snyder. + +module t (/*AUTOARG*/ + // Inputs + clk + ); + + input clk /*verilator sc_clock*/; + +endmodule diff --git a/test_regress/t/t_cover_line.out b/test_regress/t/t_cover_line.out index 31873558e..3071c13a7 100644 --- a/test_regress/t/t_cover_line.out +++ b/test_regress/t/t_cover_line.out @@ -83,7 +83,9 @@ if (toggle) begin // CHECK_COVER_MISSING(-1) // This doesn't even get added + `ifdef ATTRIBUTE // verilator coverage_block_off + `endif $write(""); end end @@ -107,10 +109,12 @@ // CHECK_COVER(-1,"top.t.b*",2) // t.b1 and t.b2 collapse to a count of 2 end - if (toggle) begin + if (toggle) begin : block // CHECK_COVER_MISSING(-1) // This doesn't + `ifdef ATTRIBUTE // verilator coverage_block_off + `endif $write(""); end end diff --git a/test_regress/t/t_cover_line.v b/test_regress/t/t_cover_line.v index 7cb84decf..9c633a5dd 100644 --- a/test_regress/t/t_cover_line.v +++ b/test_regress/t/t_cover_line.v @@ -82,7 +82,9 @@ module alpha (/*AUTOARG*/ if (toggle) begin // CHECK_COVER_MISSING(-1) // This doesn't even get added +`ifdef ATTRIBUTE // verilator coverage_block_off +`endif $write(""); end end @@ -106,10 +108,12 @@ module beta (/*AUTOARG*/ // CHECK_COVER(-1,"top.t.b*",2) // t.b1 and t.b2 collapse to a count of 2 end - if (toggle) begin + if (toggle) begin : block // CHECK_COVER_MISSING(-1) // This doesn't +`ifdef ATTRIBUTE // verilator coverage_block_off +`endif $write(""); end end diff --git a/test_regress/t/t_cover_line.vlt b/test_regress/t/t_cover_line.vlt new file mode 100644 index 000000000..2018150fb --- /dev/null +++ b/test_regress/t/t_cover_line.vlt @@ -0,0 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +coverage_block_off -file "t/t_cover_line.v" -lines 82 +coverage_block_off -module "beta" -block "block" diff --git a/test_regress/t/t_cover_line_cc.pl b/test_regress/t/t_cover_line_cc.pl index 867e16ea4..560dc831d 100755 --- a/test_regress/t/t_cover_line_cc.pl +++ b/test_regress/t/t_cover_line_cc.pl @@ -12,7 +12,7 @@ scenarios(simulator => 1); top_filename("t/t_cover_line.v"); compile( - verilator_flags2 => ['--cc --coverage-line'], + verilator_flags2 => ['--cc --coverage-line +define+ATTRIBUTE'], ); execute( diff --git a/test_regress/t/t_cover_line_cc_vlt.pl b/test_regress/t/t_cover_line_cc_vlt.pl new file mode 100755 index 000000000..c2201d7b4 --- /dev/null +++ b/test_regress/t/t_cover_line_cc_vlt.pl @@ -0,0 +1,33 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_cover_line.v"); + +compile( + verilator_flags2 => ['--cc', '--coverage-line', "t/t_cover_line.vlt"], + ); + +execute( + check_finished => 1, + ); + +# Read the input .v file and do any CHECK_COVER requests +inline_checks(); + +run(cmd => ["../bin/verilator_coverage", + "--annotate", "$Self->{obj_dir}/annotated", + "$Self->{obj_dir}/coverage.dat", + ]); + +files_identical("$Self->{obj_dir}/annotated/t_cover_line.v", "t/t_cover_line.out"); + +ok(1); +1; diff --git a/test_regress/t/t_cover_line_sc.pl b/test_regress/t/t_cover_line_sc.pl index cde76f21f..fbe062a41 100755 --- a/test_regress/t/t_cover_line_sc.pl +++ b/test_regress/t/t_cover_line_sc.pl @@ -12,7 +12,7 @@ scenarios(simulator => 1); top_filename("t/t_cover_line.v"); compile( - verilator_flags2 => ['--sc --coverage-line'], + verilator_flags2 => ['--sc --coverage-line +define+ATTRIBUTE'], ); execute( diff --git a/test_regress/t/t_cover_line_trace.out b/test_regress/t/t_cover_line_trace.out index bbe500237..e1fbd2120 100644 --- a/test_regress/t/t_cover_line_trace.out +++ b/test_regress/t/t_cover_line_trace.out @@ -1,51 +1,51 @@ $version Generated by VerilatedVcd $end -$date Thu Oct 24 09:45:30 2019 +$date Sun Dec 29 13:11:10 2019 $end $timescale 1ns $end $scope module top $end - $var wire 1 1 clk $end + $var wire 1 5! clk $end $scope module t $end - $var wire 1 1 clk $end - $var wire 32 $ cyc [31:0] $end - $var wire 8 % cyc_copy [7:0] $end + $var wire 1 5! clk $end + $var wire 32 + cyc [31:0] $end + $var wire 8 3 cyc_copy [7:0] $end $var wire 1 # toggle $end - $var wire 32 ) vlCoverageLineTrace_t_cover_line__44_if [31:0] $end - $var wire 32 & vlCoverageLineTrace_t_cover_line__47_if [31:0] $end - $var wire 32 ' vlCoverageLineTrace_t_cover_line__50_elsif [31:0] $end - $var wire 32 ( vlCoverageLineTrace_t_cover_line__57_elsif [31:0] $end + $var wire 32 S vlCoverageLineTrace_t_cover_line__44_if [31:0] $end + $var wire 32 ; vlCoverageLineTrace_t_cover_line__47_if [31:0] $end + $var wire 32 C vlCoverageLineTrace_t_cover_line__50_elsif [31:0] $end + $var wire 32 K vlCoverageLineTrace_t_cover_line__57_elsif [31:0] $end $scope module a1 $end - $var wire 1 1 clk $end + $var wire 1 5! clk $end $var wire 1 # toggle $end - $var wire 32 * vlCoverageLineTrace_t_cover_line__78_if [31:0] $end + $var wire 32 [ vlCoverageLineTrace_t_cover_line__78_if [31:0] $end $upscope $end $scope module a2 $end - $var wire 1 1 clk $end + $var wire 1 5! clk $end $var wire 1 # toggle $end - $var wire 32 + vlCoverageLineTrace_t_cover_line__78_if [31:0] $end + $var wire 32 c vlCoverageLineTrace_t_cover_line__78_if [31:0] $end $upscope $end $scope module b1 $end - $var wire 1 1 clk $end + $var wire 1 5! clk $end $var wire 1 # toggle $end - $var wire 32 2 vlCoverageLineTrace_t_cover_line__101_if [31:0] $end - $var wire 32 - vlCoverageLineTrace_t_cover_line__105_if [31:0] $end + $var wire 32 =! vlCoverageLineTrace_t_cover_line__103_if [31:0] $end + $var wire 32 s vlCoverageLineTrace_t_cover_line__107_if [31:0] $end $upscope $end $scope module b2 $end - $var wire 1 1 clk $end + $var wire 1 5! clk $end $var wire 1 # toggle $end - $var wire 32 3 vlCoverageLineTrace_t_cover_line__101_if [31:0] $end - $var wire 32 . vlCoverageLineTrace_t_cover_line__105_if [31:0] $end + $var wire 32 E! vlCoverageLineTrace_t_cover_line__103_if [31:0] $end + $var wire 32 { vlCoverageLineTrace_t_cover_line__107_if [31:0] $end $upscope $end $scope module o1 $end - $var wire 1 1 clk $end + $var wire 1 5! clk $end $var wire 1 # toggle $end - $var wire 32 , vlCoverageLineTrace_t_cover_line__162_if [31:0] $end + $var wire 32 k vlCoverageLineTrace_t_cover_line__166_if [31:0] $end $upscope $end $scope module t1 $end - $var wire 1 1 clk $end + $var wire 1 5! clk $end $var wire 1 # toggle $end - $var wire 32 / vlCoverageLineTrace_t_cover_line__134_if [31:0] $end - $var wire 32 0 vlCoverageLineTrace_t_cover_line__137_if [31:0] $end + $var wire 32 %! vlCoverageLineTrace_t_cover_line__138_if [31:0] $end + $var wire 32 -! vlCoverageLineTrace_t_cover_line__141_if [31:0] $end $upscope $end $upscope $end $upscope $end @@ -54,99 +54,99 @@ $enddefinitions $end #0 0# -b00000000000000000000000000000001 $ -b00000001 % -b00000000000000000000000000000000 & -b00000000000000000000000000000000 ' -b00000000000000000000000000000000 ( -b00000000000000000000000000000000 ) -b00000000000000000000000000000000 * -b00000000000000000000000000000000 + -b00000000000000000000000000000000 , -b00000000000000000000000000000000 - -b00000000000000000000000000000000 . -b00000000000000000000000000000000 / -b00000000000000000000000000000000 0 -01 -b00000000000000000000000000000000 2 -b00000000000000000000000000000000 3 +b00000000000000000000000000000001 + +b00000001 3 +b00000000000000000000000000000000 ; +b00000000000000000000000000000000 C +b00000000000000000000000000000000 K +b00000000000000000000000000000000 S +b00000000000000000000000000000000 [ +b00000000000000000000000000000000 c +b00000000000000000000000000000000 k +b00000000000000000000000000000000 s +b00000000000000000000000000000000 { +b00000000000000000000000000000000 %! +b00000000000000000000000000000000 -! +05! +b00000000000000000000000000000000 =! +b00000000000000000000000000000000 E! #10 -b00000000000000000000000000000010 $ -b00000010 % -b00000000000000000000000000000001 ) -11 +b00000000000000000000000000000010 + +b00000010 3 +b00000000000000000000000000000001 S +15! #15 -01 +05! #20 -b00000000000000000000000000000011 $ -b00000011 % -b00000000000000000000000000000010 ) -11 +b00000000000000000000000000000011 + +b00000011 3 +b00000000000000000000000000000010 S +15! #25 -01 +05! #30 1# -b00000000000000000000000000000100 $ -b00000100 % -b00000000000000000000000000000001 & -b00000000000000000000000000000011 ) -11 +b00000000000000000000000000000100 + +b00000100 3 +b00000000000000000000000000000001 ; +b00000000000000000000000000000011 S +15! #35 -01 +05! #40 0# -b00000000000000000000000000000101 $ -b00000101 % -b00000000000000000000000000000100 ) -b00000000000000000000000000000001 * -b00000000000000000000000000000001 + -b00000000000000000000000000000001 , -b00000000000000000000000000000001 - -b00000000000000000000000000000001 . -b00000000000000000000000000000001 / -11 +b00000000000000000000000000000101 + +b00000101 3 +b00000000000000000000000000000100 S +b00000000000000000000000000000001 [ +b00000000000000000000000000000001 c +b00000000000000000000000000000001 k +b00000000000000000000000000000001 s +b00000000000000000000000000000001 { +b00000000000000000000000000000001 %! +15! #45 -01 +05! #50 -b00000000000000000000000000000110 $ -b00000110 % -b00000000000000000000000000000001 ' -b00000000000000000000000000000101 ) -b00000000000000000000000000000001 0 -11 +b00000000000000000000000000000110 + +b00000110 3 +b00000000000000000000000000000001 C +b00000000000000000000000000000101 S +b00000000000000000000000000000001 -! +15! #55 -01 +05! #60 -b00000000000000000000000000000111 $ -b00000111 % -b00000000000000000000000000000110 ) -11 +b00000000000000000000000000000111 + +b00000111 3 +b00000000000000000000000000000110 S +15! #65 -01 +05! #70 -b00000000000000000000000000001000 $ -b00001000 % -b00000000000000000000000000000111 ) -11 +b00000000000000000000000000001000 + +b00001000 3 +b00000000000000000000000000000111 S +15! #75 -01 +05! #80 -b00000000000000000000000000001001 $ -b00001001 % -b00000000000000000000000000001000 ) -11 +b00000000000000000000000000001001 + +b00001001 3 +b00000000000000000000000000001000 S +15! #85 -01 +05! #90 -b00000000000000000000000000001010 $ -b00001010 % -b00000000000000000000000000001001 ) -11 +b00000000000000000000000000001010 + +b00001010 3 +b00000000000000000000000000001001 S +15! #95 -01 +05! #100 -b00000000000000000000000000001011 $ -b00001011 % -b00000000000000000000000000000001 ( -b00000000000000000000000000001010 ) -11 +b00000000000000000000000000001011 + +b00001011 3 +b00000000000000000000000000000001 K +b00000000000000000000000000001010 S +15! diff --git a/test_regress/t/t_cover_line_trace.pl b/test_regress/t/t_cover_line_trace.pl index 40ff27284..0b6b4e958 100755 --- a/test_regress/t/t_cover_line_trace.pl +++ b/test_regress/t/t_cover_line_trace.pl @@ -12,7 +12,7 @@ scenarios(simulator => 1); top_filename("t/t_cover_line.v"); compile( - verilator_flags2 => ['--cc --coverage-line --trace --trace-coverage'], + verilator_flags2 => ['--cc --coverage-line --trace --trace-coverage +define+ATTRIBUTE'], ); execute( diff --git a/test_regress/t/t_dedupe_clk_gate.pl b/test_regress/t/t_dedupe_clk_gate.pl index 8bbe70d24..99b5982d1 100755 --- a/test_regress/t/t_dedupe_clk_gate.pl +++ b/test_regress/t/t_dedupe_clk_gate.pl @@ -9,13 +9,17 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + compile( - verilator_flags2 => ["--stats"], + verilator_flags2 => ["--stats $Self->{t_dir}/t_dedupe_clk_gate.vlt"], ); if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); file_grep($Self->{stats}, qr/Optimizations, Gate sigs deduped\s+(\d+)/i, 4); } + ok(1); 1; diff --git a/test_regress/t/t_dedupe_clk_gate.v b/test_regress/t/t_dedupe_clk_gate.v index 81cbc2af2..75196346a 100644 --- a/test_regress/t/t_dedupe_clk_gate.v +++ b/test_regress/t/t_dedupe_clk_gate.v @@ -40,7 +40,7 @@ endmodule module clock_gate_latch (gated_clk, clk, clken); output gated_clk; input clk, clken; - reg clken_latched /*verilator clock_enable*/; + reg clken_latched; assign gated_clk = clk & clken_latched ; wire clkb = ~clk; diff --git a/test_regress/t/t_dedupe_clk_gate.vlt b/test_regress/t/t_dedupe_clk_gate.vlt new file mode 100644 index 000000000..6e2a77ef9 --- /dev/null +++ b/test_regress/t/t_dedupe_clk_gate.vlt @@ -0,0 +1,3 @@ +`verilator_config + +clock_enable -module "clock_gate_latch" -var "clken_latched" diff --git a/test_regress/t/t_display.out b/test_regress/t/t_display.out index 10667f059..a06c167d4 100644 --- a/test_regress/t/t_display.out +++ b/test_regress/t/t_display.out @@ -41,6 +41,8 @@ [0] %t= 0 %03t= 0 %0t=0 [0] %s=! %s= what! %s= hmmm!1234 +[0] %6s=: !: %6s=: what!: %6s=: hmmm!1234: +[0] %8s=: sv-str: [0] hello, from a very long string. Percent %s are literally substituted in. hello, from a concatenated string. hello, from a concatenated format string [0]. diff --git a/test_regress/t/t_display.v b/test_regress/t/t_display.v index da6ab3f7c..691660ee6 100644 --- a/test_regress/t/t_display.v +++ b/test_regress/t/t_display.v @@ -124,6 +124,10 @@ module t; // Not testing %0s, it does different things in different simulators $display("[%0t] %%s=%s %%s=%s %%s=%s", $time, str2[7:0], str2, str3); + $display("[%0t] %%6s=:%6s: %%6s=:%6s: %%6s=:%6s:", $time, + str2[7:0], str2, str3); + $display("[%0t] %%8s=:%8s:", $time, + svs); $display("[%0t] %s%s%s", $time, "hel", "lo, fr", "om a very long string. Percent %s are literally substituted in."); diff --git a/test_regress/t/t_dist_contributors.pl b/test_regress/t/t_dist_contributors.pl index e8a092dd3..b31b8b4ff 100755 --- a/test_regress/t/t_dist_contributors.pl +++ b/test_regress/t/t_dist_contributors.pl @@ -71,7 +71,7 @@ sub read_user { sub read_authors { # Check recent commits in case did commit - my $git_auths = `git log '--pretty=format:%aN <%aE>' | head -20`; + my $git_auths = `git log '--pretty=format:%aN <%aE>' | head -5`; foreach my $line (split /\n/, $git_auths) { $line =~ s/ *<[^>]*>//; $Authors{$line} = 1; diff --git a/test_regress/t/t_dist_tabs.pl b/test_regress/t/t_dist_tabs.pl index 272b45c8f..606921a22 100755 --- a/test_regress/t/t_dist_tabs.pl +++ b/test_regress/t/t_dist_tabs.pl @@ -61,6 +61,10 @@ if (!-r "$root/.git") { } elsif ($line =~ m!^\+(.*)!) { ++$lineno; + if ($line =~ /\r/) { + $summary = "File modification adds carriage return (remove them):" if !$summary; + $warns{$file} = "File modification adds carriage return (remove them): $file:$lineno"; + } my $len = length($1); if ($len >= 100 && $file !~ /\.out$/) { diff --git a/test_regress/t/t_dist_whitespace.pl b/test_regress/t/t_dist_whitespace.pl index 86d3c9a64..1168b44d9 100755 --- a/test_regress/t/t_dist_whitespace.pl +++ b/test_regress/t/t_dist_whitespace.pl @@ -20,10 +20,16 @@ foreach my $file (sort keys %files) { my $contents = file_contents($filename); if ($file =~ /\.out$/) { # Ignore golden files + next; } elsif ($contents =~ /[\001\002\003\004\005\006]/) { - # Ignore binrary files - } elsif ($contents =~ /[ \t]\n/ - || $contents =~ m/\n\n+$/) { # Regexp repeated below + # Ignore binary files + next; + } + if ($contents !~ /\n$/s && $contents ne "") { + $warns{$file} = "Missing trailing newline in $file"; + } + if ($contents =~ /[ \t]\n/ + || $contents =~ m/\n\n+$/) { # Regexp repeated below my $eol_ws_exempt = ($file =~ /(\.txt|\.html)$/ || $file =~ m!^README$! || $file =~ m!/gtkwave/!); diff --git a/test_regress/t/t_dpi_var.cpp b/test_regress/t/t_dpi_var.cpp index 36a545d49..ce2fb5916 100644 --- a/test_regress/t/t_dpi_var.cpp +++ b/test_regress/t/t_dpi_var.cpp @@ -13,7 +13,7 @@ // //************************************************************************* -#include "Vt_dpi_var.h" +#include VM_PREFIX_INCLUDE #include "verilated.h" #include "svdpi.h" diff --git a/test_regress/t/t_dpi_var.pl b/test_regress/t/t_dpi_var.pl index 699b48d9e..652a9657f 100755 --- a/test_regress/t/t_dpi_var.pl +++ b/test_regress/t/t_dpi_var.pl @@ -8,13 +8,21 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # Version 2.0. scenarios(simulator => 1); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; compile( make_top_shell => 0, make_main => 0, - verilator_flags2 => ["--exe --no-l2name $Self->{t_dir}/t_dpi_var.cpp"], + verilator_flags2 => ["-DATTRIBUTES --exe --no-l2name $Self->{t_dir}/t_dpi_var.cpp"], ); +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + execute( check_finished => 1, ); diff --git a/test_regress/t/t_dpi_var.v b/test_regress/t/t_dpi_var.v index 8c42c420d..4f9236a09 100644 --- a/test_regress/t/t_dpi_var.v +++ b/test_regress/t/t_dpi_var.v @@ -51,7 +51,11 @@ module t (/*AUTOARG*/ endmodule +`ifdef ATTRIBUTES import "DPI-C" context function void mon_scope_name (input string formatted /*verilator sformat*/ ); +`else +import "DPI-C" context function void mon_scope_name (input string formatted); +`endif import "DPI-C" context function void mon_register_b(string name, int isOut); import "DPI-C" context function void mon_register_done(); import "DPI-C" context function void mon_eval(); @@ -68,9 +72,15 @@ module sub (/*AUTOARG*/ void mon_register_a(const char* namep, void* sigp, bool isOut); `verilog +`ifdef ATTRIBUTES input int in /*verilator public_flat_rd*/; output int fr_a /*verilator public_flat_rw @(posedge t.monclk)*/; output int fr_b /*verilator public_flat_rw @(posedge t.monclk)*/; +`else + input int in; + output int fr_a; + output int fr_b; +`endif output int fr_chk; always @* fr_chk = in + 1; diff --git a/test_regress/t/t_dpi_var.vlt b/test_regress/t/t_dpi_var.vlt new file mode 100644 index 000000000..063a2284b --- /dev/null +++ b/test_regress/t/t_dpi_var.vlt @@ -0,0 +1,11 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +sformat -task "mon_scope_name" -var "formatted" +public_flat_rd -module "sub" -var "in" +public_flat_rw -module "sub" -var "fr_a" @(posedge t.monclk) +public_flat_rw -module "sub" -var "fr_b" @(posedge t.monclk) diff --git a/test_regress/t/t_dpi_var_vlt.pl b/test_regress/t/t_dpi_var_vlt.pl new file mode 100755 index 000000000..bc0af71ca --- /dev/null +++ b/test_regress/t/t_dpi_var_vlt.pl @@ -0,0 +1,33 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_dpi_var.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + make_top_shell => 0, + make_main => 0, + verilator_flags2 => ["--exe --no-l2name $Self->{t_dir}/t_dpi_var.vlt $Self->{t_dir}/t_dpi_var.cpp"], + ); + +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_enum_x_bad.out b/test_regress/t/t_enum_x_bad.out index 6677ff6dc..5fd3bc732 100644 --- a/test_regress/t/t_enum_x_bad.out +++ b/test_regress/t/t_enum_x_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_enum_x_bad.v:8: Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2019 6.19) +%Error: t/t_enum_x_bad.v:8: Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2017 6.19) : ... In instance t enum bit [1:0] { BADX = 2'b1x } BAD1; ^~~~ diff --git a/test_regress/t/t_flag_wpedantic_bad.out b/test_regress/t/t_flag_wpedantic_bad.out index e59968538..26e8ff0ae 100644 --- a/test_regress/t/t_flag_wpedantic_bad.out +++ b/test_regress/t/t_flag_wpedantic_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_flag_wpedantic_bad.v:7: syntax error, unexpected global, expecting IDENTIFIER or do or final +%Error: t/t_flag_wpedantic_bad.v:7: syntax error, unexpected global, expecting IDENTIFIER or '=' or do or final reg global; ^ %Error: Exiting due to diff --git a/test_regress/t/t_func_dotted.v b/test_regress/t/t_func_dotted.v index 4c985ea75..892626ad0 100644 --- a/test_regress/t/t_func_dotted.v +++ b/test_regress/t/t_func_dotted.v @@ -52,17 +52,22 @@ module t (/*AUTOARG*/ endmodule -`ifdef USE_INLINE_MID - `define INLINE_MODULE /*verilator inline_module*/ - `define INLINE_MID_MODULE /*verilator no_inline_module*/ -`else - `ifdef USE_INLINE +`ifdef ATTRIBUTES + `ifdef USE_INLINE_MID `define INLINE_MODULE /*verilator inline_module*/ - `define INLINE_MID_MODULE /*verilator inline_module*/ + `define INLINE_MID_MODULE /*verilator no_inline_module*/ `else - `define INLINE_MODULE /*verilator public_module*/ - `define INLINE_MID_MODULE /*verilator public_module*/ + `ifdef USE_INLINE + `define INLINE_MODULE /*verilator inline_module*/ + `define INLINE_MID_MODULE /*verilator inline_module*/ + `else + `define INLINE_MODULE /*verilator public_module*/ + `define INLINE_MID_MODULE /*verilator public_module*/ + `endif `endif +`else + `define INLINE_MODULE + `define INLINE_MID_MODULE `endif module global_mod; diff --git a/test_regress/t/t_func_dotted_inl0.pl b/test_regress/t/t_func_dotted_inl0.pl index af2faf33f..de41c1dc4 100755 --- a/test_regress/t/t_func_dotted_inl0.pl +++ b/test_regress/t/t_func_dotted_inl0.pl @@ -10,11 +10,19 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); top_filename("t/t_func_dotted.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; compile( - v_flags2 => ['+define+NOUSE_INLINE',], + v_flags2 => ['+define+ATTRIBUTES', '+define+NOUSE_INLINE',], ); +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + execute( check_finished => 1, ); diff --git a/test_regress/t/t_func_dotted_inl0.vlt b/test_regress/t/t_func_dotted_inl0.vlt new file mode 100644 index 000000000..eef5ae669 --- /dev/null +++ b/test_regress/t/t_func_dotted_inl0.vlt @@ -0,0 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +public -module "global_mod" +public -module "m*" diff --git a/test_regress/t/t_func_dotted_inl0_vlt.pl b/test_regress/t/t_func_dotted_inl0_vlt.pl new file mode 100755 index 000000000..b8c833d2c --- /dev/null +++ b/test_regress/t/t_func_dotted_inl0_vlt.pl @@ -0,0 +1,31 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_func_dotted.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + v_flags2 => ["$Self->{t_dir}/t_func_dotted_inl0.vlt"], + ); + +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_func_dotted_inl1.pl b/test_regress/t/t_func_dotted_inl1.pl index 0f9ea98bd..2f3b869d0 100755 --- a/test_regress/t/t_func_dotted_inl1.pl +++ b/test_regress/t/t_func_dotted_inl1.pl @@ -10,11 +10,18 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); top_filename("t/t_func_dotted.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; compile( - v_flags2 => ['+define+USE_INLINE',], + v_flags2 => ['+define+ATTRIBUTES', '+define+USE_INLINE',], ); +if ($Self->{vlt_all}) { + file_grep_not("$out_filename", qr/ma0/i); + file_grep_not("$out_filename", qr/mb0/i); + file_grep_not("$out_filename", qr/mc0/i); +} + execute( check_finished => 1, ); diff --git a/test_regress/t/t_func_dotted_inl1.vlt b/test_regress/t/t_func_dotted_inl1.vlt new file mode 100644 index 000000000..e81ace1ff --- /dev/null +++ b/test_regress/t/t_func_dotted_inl1.vlt @@ -0,0 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +inline -module "global_mod" +inline -module "m*" diff --git a/test_regress/t/t_func_dotted_inl1_vlt.pl b/test_regress/t/t_func_dotted_inl1_vlt.pl new file mode 100755 index 000000000..51a92a162 --- /dev/null +++ b/test_regress/t/t_func_dotted_inl1_vlt.pl @@ -0,0 +1,30 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_func_dotted.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + v_flags2 => ["t/t_func_dotted_inl1.vlt",], + ); + +if ($Self->{vlt_all}) { + file_grep_not("$out_filename", qr/ma0/i); + file_grep_not("$out_filename", qr/mb0/i); + file_grep_not("$out_filename", qr/mc0/i); +} + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_func_dotted_inl2.pl b/test_regress/t/t_func_dotted_inl2.pl index fc71dbbca..9784092cd 100755 --- a/test_regress/t/t_func_dotted_inl2.pl +++ b/test_regress/t/t_func_dotted_inl2.pl @@ -10,11 +10,17 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); top_filename("t/t_func_dotted.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; compile( - v_flags2 => ['+define+USE_INLINE_MID',], + v_flags2 => ['+define+ATTRIBUTES', '+define+USE_INLINE_MID',], ); +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + execute( check_finished => 1, ); diff --git a/test_regress/t/t_func_dotted_inl2.vlt b/test_regress/t/t_func_dotted_inl2.vlt new file mode 100644 index 000000000..68d53c3e6 --- /dev/null +++ b/test_regress/t/t_func_dotted_inl2.vlt @@ -0,0 +1,11 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +inline -module "global_mod" +inline -module "ma" +no_inline -module "mb" +inline -module "mc" diff --git a/test_regress/t/t_func_dotted_inl2_vlt.pl b/test_regress/t/t_func_dotted_inl2_vlt.pl new file mode 100755 index 000000000..32a36011f --- /dev/null +++ b/test_regress/t/t_func_dotted_inl2_vlt.pl @@ -0,0 +1,29 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_func_dotted.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + v_flags2 => ["t/t_func_dotted_inl2.vlt",], + ); + +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_fuzz_genintf_bad.out b/test_regress/t/t_fuzz_genintf_bad.out index d8e9eee16..7ba1095b9 100644 --- a/test_regress/t/t_fuzz_genintf_bad.out +++ b/test_regress/t/t_fuzz_genintf_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_fuzz_genintf_bad.v:23: Unsupported: Member call on non-enum object 'VARREF 'j'' which is a 'BASICDTYPE 'integer'' +%Error: t/t_fuzz_genintf_bad.v:23: Unsupported: Member call on object 'VARREF 'j'' which is a 'BASICDTYPE 'integer'' : ... In instance t j.e(0), ^ diff --git a/test_regress/t/t_fuzz_triand_bad.out b/test_regress/t/t_fuzz_triand_bad.out index aba49b72e..a881e799f 100644 --- a/test_regress/t/t_fuzz_triand_bad.out +++ b/test_regress/t/t_fuzz_triand_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_fuzz_triand_bad.v:7: Unsupported: Member call on non-enum object 'VARREF 'g'' which is a 'BASICDTYPE 'logic'' +%Error: t/t_fuzz_triand_bad.v:7: Unsupported: Member call on object 'VARREF 'g'' which is a 'BASICDTYPE 'logic'' : ... In instance t tri g=g.and.g; ^~~ diff --git a/test_regress/t/t_inside_wild.v b/test_regress/t/t_inside_wild.v index d0ed5f3c7..103721c31 100644 --- a/test_regress/t/t_inside_wild.v +++ b/test_regress/t/t_inside_wild.v @@ -80,4 +80,4 @@ module Test (/*AUTOARG*/ out <= in inside {5'b1_1?1?}; end -endmodule // t \ No newline at end of file +endmodule diff --git a/test_regress/t/t_inst_long_bad.out b/test_regress/t/t_inst_long_bad.out new file mode 100644 index 000000000..24c5fdbae --- /dev/null +++ b/test_regress/t/t_inst_long_bad.out @@ -0,0 +1,6 @@ +%Error: obj_vlt/t_inst_long_bad/t_inst_long.v:4: Cannot find file containing module: 'long_long_long_long_long_long_lo__Vhsh1JZCXQVBM1QiASYlLmgTuAXYyUr7VAbJYwVHfiAD' + long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_ inst (); + ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + ... Unsupported: Name is longer than 127 characters; automatic file lookup not supported. + ... Suggest putting filename with this module/package onto command line instead. +%Error: Exiting due to diff --git a/test_regress/t/t_inst_long_bad.pl b/test_regress/t/t_inst_long_bad.pl new file mode 100755 index 000000000..7bcd414ac --- /dev/null +++ b/test_regress/t/t_inst_long_bad.pl @@ -0,0 +1,60 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +use IO::File; +use strict; +use vars qw($Self); + +scenarios(vlt => 1); + +my $length = 200; +my $long = "long_" x (($length + 4) / 5); + +sub gen_top { + my $filename = shift; + + my $fh = IO::File->new(">$filename") + or $Self->error("Can't write $filename"); + $fh->print("// Generated by t_inst_long.pl\n"); + $fh->print("module t;\n"); + $fh->print("\n"); + $fh->print(" ${long} inst ();\n"); + $fh->print("\n"); + $fh->print("endmodule\n"); + $fh->close; +} + +sub gen_sub { + my $filename = shift; + + my $fh = IO::File->new(">$filename") + or $Self->error("Can't write $filename"); + $fh->print("// Generated by t_inst_long.pl\n"); + $fh->print("module ${long};\n"); + $fh->print("\n"); + $fh->print(" initial begin\n"); + $fh->print(" \$write(\"*-* All Finished *-*\\n\");\n"); + $fh->print(" \$finish;\n"); + $fh->print(" end\n"); + $fh->print("endmodule\n"); + $fh->close; +} + +top_filename("$Self->{obj_dir}/t_inst_long.v", $long); + +gen_top($Self->{top_filename}); +gen_sub("$Self->{obj_dir}/${long}.v"); + +lint( + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_inst_tree.v b/test_regress/t/t_inst_tree.v index 9065d6b59..44530ccd8 100644 --- a/test_regress/t/t_inst_tree.v +++ b/test_regress/t/t_inst_tree.v @@ -47,58 +47,40 @@ module t (/*AUTOARG*/ endmodule -`ifdef USE_INLINE - `define INLINE_MODULE /*verilator inline_module*/ -`else - `define INLINE_MODULE /*verilator public_module*/ -`endif - -`ifdef USE_PUBLIC - `define PUBLIC /*verilator public*/ -`else - `define PUBLIC -`endif - module ps (input printclk); - `INLINE_MODULE // Check that %m stays correct across inlines always @ (posedge printclk) $write("[%0t] %m: Clocked\n", $time); endmodule -module l1 (input [7:0] a, output [7:0] z `PUBLIC); - `INLINE_MODULE - wire [7:0] z0 `PUBLIC; wire [7:0] z1 `PUBLIC; +module l1 (input [7:0] a, output [7:0] z); + wire [7:0] z0; wire [7:0] z1; assign z = z0+z1; l2 u0 (a, z0); l2 u1 (a, z1); endmodule -module l2 (input [7:0] a, output [7:0] z `PUBLIC); - `INLINE_MODULE - wire [7:0] z0 `PUBLIC; wire [7:0] z1 `PUBLIC; +module l2 (input [7:0] a, output [7:0] z); + wire [7:0] z0; wire [7:0] z1; assign z = z0+z1; wire [7:0] a1 = a+8'd1; l3 u0 (a, z0); l3 u1 (a1, z1); endmodule -module l3 (input [7:0] a, output [7:0] z `PUBLIC); - `INLINE_MODULE - wire [7:0] z0 `PUBLIC; wire [7:0] z1 `PUBLIC; +module l3 (input [7:0] a, output [7:0] z); + wire [7:0] z0; wire [7:0] z1; assign z = z0+z1; wire [7:0] a1 = a+8'd1; l4 u0 (a, z0); l4 u1 (a1, z1); endmodule -module l4 (input [7:0] a, output [7:0] z `PUBLIC); - `INLINE_MODULE - wire [7:0] z0 `PUBLIC; wire [7:0] z1 `PUBLIC; +module l4 (input [7:0] a, output [7:0] z); + wire [7:0] z0; wire [7:0] z1; assign z = z0+z1; wire [7:0] a1 = a+8'd1; l5 #(1) u0 (a, z0); l5 #(2) u1 (a1, z1); endmodule -module l5 (input [7:0] a, output [7:0] z `PUBLIC); - `INLINE_MODULE +module l5 (input [7:0] a, output [7:0] z); parameter PARAM = 5; - wire [7:0] z0 `PUBLIC; wire [7:0] z1 `PUBLIC; + wire [7:0] z0; wire [7:0] z1; assign z = a; endmodule diff --git a/test_regress/t/t_inst_tree_inl0_pub0.pl b/test_regress/t/t_inst_tree_inl0_pub0.pl index b9f879e8b..2ee859437 100755 --- a/test_regress/t/t_inst_tree_inl0_pub0.pl +++ b/test_regress/t/t_inst_tree_inl0_pub0.pl @@ -10,10 +10,20 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); top_filename("t/t_inst_tree.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; compile( - v_flags2 => ['+define+NOUSE_INLINE', '+define+NOUSE_PUBLIC'], - ); + v_flags2 => ["$Self->{t_dir}/$Self->{name}.vlt"], +); + +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} execute( check_finished => 1, diff --git a/test_regress/t/t_inst_tree_inl0_pub0.vlt b/test_regress/t/t_inst_tree_inl0_pub0.vlt new file mode 100644 index 000000000..dabc18533 --- /dev/null +++ b/test_regress/t/t_inst_tree_inl0_pub0.vlt @@ -0,0 +1,8 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +no_inline -module "l*" diff --git a/test_regress/t/t_inst_tree_inl0_pub1.pl b/test_regress/t/t_inst_tree_inl0_pub1.pl index 7b3bc4634..9ba3d3b56 100755 --- a/test_regress/t/t_inst_tree_inl0_pub1.pl +++ b/test_regress/t/t_inst_tree_inl0_pub1.pl @@ -13,7 +13,7 @@ top_filename("t/t_inst_tree.v"); my $default_vltmt_threads = $Self->get_default_vltmt_threads(); compile( - verilator_flags2 => ['+define+NOUSE_INLINE', '+define+USE_PUBLIC', '--stats', + verilator_flags2 => ['--stats', "$Self->{t_dir}/$Self->{name}.vlt", # Force 3 threads even if we have fewer cores $Self->{vltmt} ? "--threads $default_vltmt_threads" : ""] ); diff --git a/test_regress/t/t_inst_tree_inl0_pub1.vlt b/test_regress/t/t_inst_tree_inl0_pub1.vlt new file mode 100644 index 000000000..cddd66b4a --- /dev/null +++ b/test_regress/t/t_inst_tree_inl0_pub1.vlt @@ -0,0 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +no_inline -module "l*" +public -module "l*" -var "z*" diff --git a/test_regress/t/t_inst_tree_inl0_pub1_norelcfuncs.pl b/test_regress/t/t_inst_tree_inl0_pub1_norelcfuncs.pl index cc3e9ca48..fce7d84dc 100755 --- a/test_regress/t/t_inst_tree_inl0_pub1_norelcfuncs.pl +++ b/test_regress/t/t_inst_tree_inl0_pub1_norelcfuncs.pl @@ -12,7 +12,8 @@ scenarios(simulator => 1); top_filename("t/t_inst_tree.v"); compile( - verilator_flags2 => ['+define+NOUSE_INLINE', '+define+USE_PUBLIC', '--stats', '--norelative-cfuncs', + verilator_flags2 => ['--stats', '--norelative-cfuncs', + "$Self->{t_dir}/t_inst_tree_inl0_pub1.vlt", $Self->wno_unopthreads_for_few_cores()] ); diff --git a/test_regress/t/t_inst_tree_inl1_pub0.pl b/test_regress/t/t_inst_tree_inl1_pub0.pl index fe266c45e..c30155c2b 100755 --- a/test_regress/t/t_inst_tree_inl1_pub0.pl +++ b/test_regress/t/t_inst_tree_inl1_pub0.pl @@ -10,11 +10,18 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); top_filename("t/t_inst_tree.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; compile( - v_flags2 => ['+define+USE_INLINE', '+define+NOUSE_PUBLIC'], + v_flags2 => ["$Self->{t_dir}/t_inst_tree_inl1_pub0.vlt"], ); +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + execute( check_finished => 1, expect => diff --git a/test_regress/t/t_inst_tree_inl1_pub0.vlt b/test_regress/t/t_inst_tree_inl1_pub0.vlt new file mode 100644 index 000000000..177a14d24 --- /dev/null +++ b/test_regress/t/t_inst_tree_inl1_pub0.vlt @@ -0,0 +1,8 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +inline -module "l*" diff --git a/test_regress/t/t_inst_tree_inl1_pub1.pl b/test_regress/t/t_inst_tree_inl1_pub1.pl index 6c9349d72..abd93f9a5 100755 --- a/test_regress/t/t_inst_tree_inl1_pub1.pl +++ b/test_regress/t/t_inst_tree_inl1_pub1.pl @@ -10,12 +10,19 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); top_filename("t/t_inst_tree.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; compile( - v_flags2 => ['+define+USE_INLINE', '+define+USE_PUBLIC', + v_flags2 => ["t/$Self->{name}.vlt", $Self->wno_unopthreads_for_few_cores()] ); +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + execute( check_finished => 1, expect => diff --git a/test_regress/t/t_inst_tree_inl1_pub1.vlt b/test_regress/t/t_inst_tree_inl1_pub1.vlt new file mode 100644 index 000000000..8d917e7d4 --- /dev/null +++ b/test_regress/t/t_inst_tree_inl1_pub1.vlt @@ -0,0 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +inline -module "l*" +public -module "l*" -var "z*" diff --git a/test_regress/t/t_mem_multi_io3.cpp b/test_regress/t/t_mem_multi_io3.cpp index 30aa58aeb..2108bc73e 100644 --- a/test_regress/t/t_mem_multi_io3.cpp +++ b/test_regress/t/t_mem_multi_io3.cpp @@ -20,12 +20,6 @@ int main() tb = new VM_PREFIX("tb"); // Just a constructor test - bool pass = true; - - if (pass) { - VL_PRINTF("*-* All Finished *-*\n"); - } else { - vl_fatal(__FILE__, __LINE__, "top", "Unexpected results from test\n"); - } + VL_PRINTF("*-* All Finished *-*\n"); return 0; } diff --git a/test_regress/t/t_pp_defparen_bad.out b/test_regress/t/t_pp_defparen_bad.out new file mode 100644 index 000000000..58bbefbb8 --- /dev/null +++ b/test_regress/t/t_pp_defparen_bad.out @@ -0,0 +1,7 @@ +%Error: t/t_pp_defparen_bad.v:9: Illegal text before '(' that starts define arguments + ( 1,2) + ^ +%Error: t/t_pp_defparen_bad.v:9: syntax error, unexpected '(' +((val 1) + (2)) + ^ +%Error: Exiting due to diff --git a/test_regress/t/t_pp_defparen_bad.pl b/test_regress/t/t_pp_defparen_bad.pl new file mode 100755 index 000000000..18439afa9 --- /dev/null +++ b/test_regress/t/t_pp_defparen_bad.pl @@ -0,0 +1,19 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +lint( + verilator_flags2 => ["-Wpedantic"], + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_pp_defparen_bad.v b/test_regress/t/t_pp_defparen_bad.v new file mode 100644 index 000000000..232d54dbc --- /dev/null +++ b/test_regress/t/t_pp_defparen_bad.v @@ -0,0 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2020 by Wilson Snyder. + +`define test(a1,a2) ((a1) + (a2)) + +`test val + ( 1,2) diff --git a/test_regress/t/t_sys_readmem.v b/test_regress/t/t_sys_readmem.v index 66d1a7936..a85269837 100644 --- a/test_regress/t/t_sys_readmem.v +++ b/test_regress/t/t_sys_readmem.v @@ -61,23 +61,25 @@ module t; $writememh(`OUT_TMP1, binary_nostart_tmp); $readmemh(`OUT_TMP1, binary_nostart); `else - $readmemb("t/t_sys_readmem_b.mem", binary_nostart); + $readmemb("t/t_sys_readmem_b.mem", binary_nostart); `endif `ifdef TEST_VERBOSE - for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_nostart[i]); + for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_nostart[i]); `endif - if (binary_nostart['h2] != 6'h02) $stop; - if (binary_nostart['h3] != 6'h03) $stop; - if (binary_nostart['h4] != 6'h04) $stop; - if (binary_nostart['h5] != 6'h05) $stop; - if (binary_nostart['h6] != 6'h06) $stop; - if (binary_nostart['h7] != 6'h07) $stop; - if (binary_nostart['h8] != 6'h10) $stop; - if (binary_nostart['hc] != 6'h14) $stop; - if (binary_nostart['hd] != 6'h15) $stop; + if (binary_nostart['h2] != 6'h02) $stop; + if (binary_nostart['h3] != 6'h03) $stop; + if (binary_nostart['h4] != 6'h04) $stop; + if (binary_nostart['h5] != 6'h05) $stop; + if (binary_nostart['h6] != 6'h06) $stop; + if (binary_nostart['h7] != 6'h07) $stop; + if (binary_nostart['h8] != 6'h10) $stop; + if (binary_nostart['hc] != 6'h14) $stop; + if (binary_nostart['hd] != 6'h15) $stop; end begin + binary_start['h0c] = 6'h3f; // Not in read range + // `ifdef WRITEMEM_READ_BACK $readmemb("t/t_sys_readmem_b_8.mem", binary_start_tmp, 4, 4+7); `ifdef TEST_VERBOSE @@ -86,19 +88,21 @@ module t; $writememh(`OUT_TMP2, binary_start_tmp, 4, 4+7); $readmemh(`OUT_TMP2, binary_start, 4, 4+7); `else - $readmemb("t/t_sys_readmem_b_8.mem", binary_start, 4, 4+7); + $readmemb("t/t_sys_readmem_b_8.mem", binary_start, 4, 4+7); // 4-11 `endif `ifdef TEST_VERBOSE - for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_start[i]); + for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_start[i]); `endif - if (binary_start['h04] != 6'h10) $stop; - if (binary_start['h05] != 6'h11) $stop; - if (binary_start['h06] != 6'h12) $stop; - if (binary_start['h07] != 6'h13) $stop; - if (binary_start['h08] != 6'h14) $stop; - if (binary_start['h09] != 6'h15) $stop; - if (binary_start['h0a] != 6'h16) $stop; - if (binary_start['h0b] != 6'h17) $stop; + if (binary_start['h04] != 6'h10) $stop; + if (binary_start['h05] != 6'h11) $stop; + if (binary_start['h06] != 6'h12) $stop; + if (binary_start['h07] != 6'h13) $stop; + if (binary_start['h08] != 6'h14) $stop; + if (binary_start['h09] != 6'h15) $stop; + if (binary_start['h0a] != 6'h16) $stop; + if (binary_start['h0b] != 6'h17) $stop; + // + if (binary_start['h0c] != 6'h3f) $stop; end begin @@ -112,15 +116,15 @@ module t; $writememh(`OUT_TMP3, hex_tmp, 0); $readmemh(`OUT_TMP3, hex, 0); `else - $readmemh("t/t_sys_readmem_h.mem", hex, 0); + $readmemh("t/t_sys_readmem_h.mem", hex, 0); `endif `ifdef TEST_VERBOSE - for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, hex[i]); + for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, hex[i]); `endif - if (hex['h04] != 176'h400437654321276543211765432107654321abcdef10) $stop; - if (hex['h0a] != 176'h400a37654321276543211765432107654321abcdef11) $stop; - if (hex['h0b] != 176'h400b37654321276543211765432107654321abcdef12) $stop; - if (hex['h0c] != 176'h400c37654321276543211765432107654321abcdef13) $stop; + if (hex['h04] != 176'h400437654321276543211765432107654321abcdef10) $stop; + if (hex['h0a] != 176'h400a37654321276543211765432107654321abcdef11) $stop; + if (hex['h0b] != 176'h400b37654321276543211765432107654321abcdef12) $stop; + if (hex['h0c] != 176'h400c37654321276543211765432107654321abcdef13) $stop; end begin @@ -134,15 +138,15 @@ module t; $writememh(`OUT_TMP4, hex_align_tmp, 0); $readmemh(`OUT_TMP4, hex_align, 0); `else - $readmemh("t/t_sys_readmem_align_h.mem", hex_align, 0); + $readmemh("t/t_sys_readmem_align_h.mem", hex_align, 0); `endif `ifdef TEST_VERBOSE - for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, hex_align[i]); + for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, hex_align[i]); `endif - if (hex_align['h04] != 192'h77554004_37654321_27654321_17654321_07654321_abcdef10) $stop; - if (hex_align['h0a] != 192'h7755400a_37654321_27654321_17654321_07654321_abcdef11) $stop; - if (hex_align['h0b] != 192'h7755400b_37654321_27654321_17654321_07654321_abcdef12) $stop; - if (hex_align['h0c] != 192'h7755400c_37654321_27654321_17654321_07654321_abcdef13) $stop; + if (hex_align['h04] != 192'h77554004_37654321_27654321_17654321_07654321_abcdef10) $stop; + if (hex_align['h0a] != 192'h7755400a_37654321_27654321_17654321_07654321_abcdef11) $stop; + if (hex_align['h0b] != 192'h7755400b_37654321_27654321_17654321_07654321_abcdef12) $stop; + if (hex_align['h0c] != 192'h7755400c_37654321_27654321_17654321_07654321_abcdef13) $stop; end begin @@ -156,12 +160,12 @@ module t; $writememh(fns_tmp, binary_string_tmp); $readmemh(fns_tmp, binary_string); `else - $readmemb(fns, binary_string); + $readmemb(fns, binary_string); `endif `ifdef TEST_VERBOSE - for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_string[i]); + for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_string[i]); `endif - if (binary_string['h2] != 6'h02) $stop; + if (binary_string['h2] != 6'h02) $stop; end $write("*-* All Finished *-*\n"); diff --git a/test_regress/t/t_sys_readmem_assoc.pl b/test_regress/t/t_sys_readmem_assoc.pl new file mode 100755 index 000000000..d9e1753c8 --- /dev/null +++ b/test_regress/t/t_sys_readmem_assoc.pl @@ -0,0 +1,23 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + ); + +execute( + check_finished => 1, + ); + +files_identical("$Self->{obj_dir}/t_sys_writemem_c_b.mem", "t/t_sys_readmem_assoc_c_b.out"); +files_identical("$Self->{obj_dir}/t_sys_writemem_w_h.mem", "t/t_sys_readmem_assoc_w_h.out"); + +ok(1); +1; diff --git a/test_regress/t/t_sys_readmem_assoc.v b/test_regress/t/t_sys_readmem_assoc.v new file mode 100644 index 000000000..31c31f052 --- /dev/null +++ b/test_regress/t/t_sys_readmem_assoc.v @@ -0,0 +1,26 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2020 by Wilson Snyder. + +`define STRINGIFY(x) `"x`" + +module t; + + reg [5:0] assoc_c[int]; + reg [95:0] assoc_w[int]; + + initial begin + assoc_c[300] = 10; // See if clearing must happen first + $readmemb("t/t_sys_readmem_b.mem", assoc_c); + $display("assoc_c=%p", assoc_c); + $writememh({`STRINGIFY(`TEST_OBJ_DIR),"/t_sys_writemem_c_b.mem"}, assoc_c); + + $readmemb("t/t_sys_readmem_b.mem", assoc_w); + // Not conditional with TEST_VERBOSE as found bug with wide display + $display("assoc_w=%p", assoc_w); + $writememh({`STRINGIFY(`TEST_OBJ_DIR),"/t_sys_writemem_w_h.mem"}, assoc_w); + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule diff --git a/test_regress/t/t_sys_readmem_assoc_bad.out b/test_regress/t/t_sys_readmem_assoc_bad.out new file mode 100644 index 000000000..724b24250 --- /dev/null +++ b/test_regress/t/t_sys_readmem_assoc_bad.out @@ -0,0 +1,9 @@ +%Error: t/t_sys_readmem_assoc_bad.v:12: $readmemb address/key must be integral (IEEE 21.4.1) + : ... In instance t + $readmemb("not", assoc_bad_key); + ^~~~~~~~~~~~~ +%Error: t/t_sys_readmem_assoc_bad.v:13: Unsupported: $readmemb array values must be integral + : ... In instance t + $readmemb("not", assoc_bad_value); + ^~~~~~~~~~~~~~~ +%Error: Exiting due to diff --git a/test_regress/t/t_sys_readmem_assoc_bad.pl b/test_regress/t/t_sys_readmem_assoc_bad.pl new file mode 100755 index 000000000..43933e6ae --- /dev/null +++ b/test_regress/t/t_sys_readmem_assoc_bad.pl @@ -0,0 +1,18 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + fails => $Self->{vlt_all}, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_sys_readmem_assoc_bad.v b/test_regress/t/t_sys_readmem_assoc_bad.v new file mode 100644 index 000000000..bb3d58455 --- /dev/null +++ b/test_regress/t/t_sys_readmem_assoc_bad.v @@ -0,0 +1,17 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2020 by Wilson Snyder. + +module t; + + reg [5:0] assoc_bad_key[real]; + real assoc_bad_value[int]; + + initial begin + $readmemb("not", assoc_bad_key); + $readmemb("not", assoc_bad_value); + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule diff --git a/test_regress/t/t_sys_readmem_assoc_c_b.out b/test_regress/t/t_sys_readmem_assoc_c_b.out new file mode 100644 index 000000000..80ea5fa3e --- /dev/null +++ b/test_regress/t/t_sys_readmem_assoc_c_b.out @@ -0,0 +1,13 @@ +02 +03 +04 +05 +06 +07 +@8 +10 +@c +14 +15 +@12c +0a diff --git a/test_regress/t/t_sys_readmem_assoc_w_h.out b/test_regress/t/t_sys_readmem_assoc_w_h.out new file mode 100644 index 000000000..daf62faa4 --- /dev/null +++ b/test_regress/t/t_sys_readmem_assoc_w_h.out @@ -0,0 +1,11 @@ +000000000000000000000002 +000000000000000000000003 +000000000000000000000004 +000000000000000000000005 +000000000000000000000006 +000000000000000000000007 +@8 +000000000000000000000010 +@c +000000000000000000000014 +000000000000000000000015 diff --git a/test_regress/t/t_sys_readmem_bad_end.pl b/test_regress/t/t_sys_readmem_bad_end.pl index 9b77a1dd0..debf6df30 100755 --- a/test_regress/t/t_sys_readmem_bad_end.pl +++ b/test_regress/t/t_sys_readmem_bad_end.pl @@ -15,7 +15,7 @@ compile( execute( fails => $Self->{vlt_all}, expect => -'%Error: t/t_sys_readmem_bad_end.mem:\d+: \$readmem file ended before specified ending-address', +'%Error: t/t_sys_readmem_bad_end.mem:\d+: \$readmem file ended before specified final address', ); ok(1); diff --git a/test_regress/t/t_sys_writemem.pl b/test_regress/t/t_sys_writemem.pl index 52810dcc5..ceadb09e2 100755 --- a/test_regress/t/t_sys_writemem.pl +++ b/test_regress/t/t_sys_writemem.pl @@ -31,12 +31,7 @@ execute( for (my $i = 1; $i <= 5; $i++) { my $gold = "$Self->{t_dir}/t_sys_writemem.gold${i}.mem"; my $out = "$Self->{obj_dir}/tmp${i}.mem"; - print "> diff $gold $out\n"; - my @diffs = `diff $gold $out`; - if (0 < scalar @diffs) { - print @diffs; - error("Got unexpected diffs against gold."); - } + files_identical($out, $gold); } ok(1); diff --git a/test_regress/t/t_trace_complex.out b/test_regress/t/t_trace_complex.out index 1ca5bf69b..e3693b40b 100644 --- a/test_regress/t/t_trace_complex.out +++ b/test_regress/t/t_trace_complex.out @@ -1,49 +1,52 @@ $version Generated by VerilatedVcd $end -$date Wed May 1 19:09:18 2019 +$date Wed Jan 8 07:23:20 2020 $end $timescale 1ns $end $scope module top $end - $var wire 1 < clk $end + $var wire 1 /" clk $end $scope module $unit $end $var wire 1 # global_bit $end $upscope $end $scope module t $end - $var wire 1 < clk $end - $var wire 32 $ cyc [31:0] $end - $var real 64 3 v_arr_real(0) $end - $var real 64 5 v_arr_real(1) $end - $var wire 2 * v_arrp [2:1] $end - $var wire 4 + v_arrp_arrp [3:0] $end - $var wire 4 , v_arrp_strp [3:0] $end - $var wire 1 = v_arru(1) $end - $var wire 1 > v_arru(2) $end - $var wire 2 - v_arru_arrp(3) [2:1] $end - $var wire 2 . v_arru_arrp(4) [2:1] $end - $var wire 1 ? v_arru_arru(3)(1) $end - $var wire 1 @ v_arru_arru(3)(2) $end - $var wire 1 A v_arru_arru(4)(1) $end - $var wire 1 B v_arru_arru(4)(2) $end - $var wire 2 / v_arru_strp(3) [1:0] $end - $var wire 2 0 v_arru_strp(4) [1:0] $end - $var wire 3 9 v_enumb [2:0] $end - $var wire 32 7 v_enumed [31:0] $end - $var wire 32 8 v_enumed2 [31:0] $end - $var real 64 1 v_real $end - $var wire 64 % v_str32x2 [63:0] $end - $var wire 2 ' v_strp [1:0] $end - $var wire 4 ( v_strp_strp [3:0] $end - $var wire 2 ) v_unip_strp [1:0] $end + $var wire 1 /" clk $end + $var wire 32 + cyc [31:0] $end + $var wire 8 h" unpacked_array(-1) [7:0] $end + $var wire 8 g" unpacked_array(-2) [7:0] $end + $var wire 8 i" unpacked_array(0) [7:0] $end + $var real 64 E! v_arr_real(0) $end + $var real 64 G! v_arr_real(1) $end + $var wire 2 [ v_arrp [2:1] $end + $var wire 4 c v_arrp_arrp [3:0] $end + $var wire 4 k v_arrp_strp [3:0] $end + $var wire 1 7" v_arru(1) $end + $var wire 1 8" v_arru(2) $end + $var wire 2 s v_arru_arrp(3) [2:1] $end + $var wire 2 t v_arru_arrp(4) [2:1] $end + $var wire 1 G" v_arru_arru(3)(1) $end + $var wire 1 O" v_arru_arru(3)(2) $end + $var wire 1 W" v_arru_arru(4)(1) $end + $var wire 1 _" v_arru_arru(4)(2) $end + $var wire 2 %! v_arru_strp(3) [1:0] $end + $var wire 2 -! v_arru_strp(4) [1:0] $end + $var wire 3 u! v_enumb [2:0] $end + $var wire 32 e! v_enumed [31:0] $end + $var wire 32 m! v_enumed2 [31:0] $end + $var real 64 5! v_real $end + $var wire 64 3 v_str32x2 [63:0] $end + $var wire 2 C v_strp [1:0] $end + $var wire 4 K v_strp_strp [3:0] $end + $var wire 2 S v_unip_strp [1:0] $end $scope module p2 $end - $var wire 32 C PARAM [31:0] $end + $var wire 32 !# PARAM [31:0] $end $upscope $end $scope module p3 $end - $var wire 32 D PARAM [31:0] $end + $var wire 32 )# PARAM [31:0] $end $upscope $end $scope module unnamedblk1 $end - $var wire 32 : b [31:0] $end + $var wire 32 }! b [31:0] $end $scope module unnamedblk2 $end - $var wire 32 ; a [31:0] $end + $var wire 32 '" a [31:0] $end $upscope $end $upscope $end $upscope $end @@ -53,164 +56,167 @@ $enddefinitions $end #0 1# -b00000000000000000000000000000000 $ -b0000000000000000000000000000000000000000000000000000000011111111 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0 1 -r0 3 -r0 5 -b00000000000000000000000000000000 7 -b00000000000000000000000000000000 8 -b000 9 -b00000000000000000000000000000000 : -b00000000000000000000000000000000 ; -0< -0= -0> -0? -0@ -0A -0B -b00000000000000000000000000000010 C -b00000000000000000000000000000011 D +b00000000000000000000000000000000 + +b0000000000000000000000000000000000000000000000000000000011111111 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0 5! +r0 E! +r0 G! +b00000000000000000000000000000000 e! +b00000000000000000000000000000000 m! +b000 u! +b00000000000000000000000000000000 }! +b00000000000000000000000000000000 '" +0/" +07" +08" +0G" +0O" +0W" +0_" +b00000000 g" +b00000000 h" +b00000000 i" +b00000000000000000000000000000010 !# +b00000000000000000000000000000011 )# #10 -b00000000000000000000000000000001 $ -b0000000000000000000000000000000100000000000000000000000011111110 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.1 1 -r0.2 3 -r0.3 5 -b00000000000000000000000000000001 7 -b00000000000000000000000000000010 8 -b111 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; -1< +b00000000000000000000000000000001 + +b0000000000000000000000000000000100000000000000000000000011111110 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.1 5! +r0.2 E! +r0.3 G! +b00000000000000000000000000000001 e! +b00000000000000000000000000000010 m! +b111 u! +b00000000000000000000000000000101 }! +b00000000000000000000000000000101 '" +1/" #15 -0< +0/" #20 -b00000000000000000000000000000010 $ -b0000000000000000000000000000001000000000000000000000000011111101 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.2 1 -r0.4 3 -r0.6 5 -b00000000000000000000000000000010 7 -b00000000000000000000000000000100 8 -b110 9 -1< +b00000000000000000000000000000010 + +b0000000000000000000000000000001000000000000000000000000011111101 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.2 5! +r0.4 E! +r0.6 G! +b00000000000000000000000000000010 e! +b00000000000000000000000000000100 m! +b110 u! +1/" #25 -0< +0/" #30 -b00000000000000000000000000000011 $ -b0000000000000000000000000000001100000000000000000000000011111100 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.3 1 -r0.6000000000000001 3 -r0.8999999999999999 5 -b00000000000000000000000000000011 7 -b00000000000000000000000000000110 8 -b101 9 -1< +b00000000000000000000000000000011 + +b0000000000000000000000000000001100000000000000000000000011111100 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.3 5! +r0.6000000000000001 E! +r0.8999999999999999 G! +b00000000000000000000000000000011 e! +b00000000000000000000000000000110 m! +b101 u! +1/" #35 -0< +0/" #40 -b00000000000000000000000000000100 $ -b0000000000000000000000000000010000000000000000000000000011111011 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.4 1 -r0.8 3 -r1.2 5 -b00000000000000000000000000000100 7 -b00000000000000000000000000001000 8 -b100 9 -1< +b00000000000000000000000000000100 + +b0000000000000000000000000000010000000000000000000000000011111011 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.4 5! +r0.8 E! +r1.2 G! +b00000000000000000000000000000100 e! +b00000000000000000000000000001000 m! +b100 u! +1/" #45 -0< +0/" #50 -b00000000000000000000000000000101 $ -b0000000000000000000000000000010100000000000000000000000011111010 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.5 1 -r1 3 -r1.5 5 -b00000000000000000000000000000101 7 -b00000000000000000000000000001010 8 -b011 9 -1< +b00000000000000000000000000000101 + +b0000000000000000000000000000010100000000000000000000000011111010 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.5 5! +r1 E! +r1.5 G! +b00000000000000000000000000000101 e! +b00000000000000000000000000001010 m! +b011 u! +1/" #55 -0< +0/" #60 -b00000000000000000000000000000110 $ -b0000000000000000000000000000011000000000000000000000000011111001 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.6 1 -r1.2 3 -r1.8 5 -b00000000000000000000000000000110 7 -b00000000000000000000000000001100 8 -b010 9 -1< +b00000000000000000000000000000110 + +b0000000000000000000000000000011000000000000000000000000011111001 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.6 5! +r1.2 E! +r1.8 G! +b00000000000000000000000000000110 e! +b00000000000000000000000000001100 m! +b010 u! +1/" diff --git a/test_regress/t/t_trace_complex.v b/test_regress/t/t_trace_complex.v index 22f744289..803148e86 100644 --- a/test_regress/t/t_trace_complex.v +++ b/test_regress/t/t_trace_complex.v @@ -65,6 +65,8 @@ module t (clk); typedef enum logic [2:0] { BZERO=0, BONE, BTWO, BTHREE } enumb_t; enumb_t v_enumb; + logic [7:0] unpacked_array[-2:0]; + p #(.PARAM(2)) p2 (); p #(.PARAM(3)) p3 (); diff --git a/test_regress/t/t_trace_complex_fst.out b/test_regress/t/t_trace_complex_fst.out index 6850fcf49..09140eaf7 100644 --- a/test_regress/t/t_trace_complex_fst.out +++ b/test_regress/t/t_trace_complex_fst.out @@ -1,5 +1,5 @@ $date - Wed May 1 19:09:18 2019 + Wed Jan 8 07:26:16 2020 $end $version @@ -41,21 +41,24 @@ $var logic 32 8 v_enumed2 $end $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end $attrbegin misc 07 "" 2 $end $var logic 3 9 v_enumb $end +$var logic 8 : unpacked_array(-2) $end +$var logic 8 ; unpacked_array(-1) $end +$var logic 8 < unpacked_array(0) $end $scope module unnamedblk1 $end -$var integer 32 : b $end +$var integer 32 = b $end $scope module unnamedblk2 $end -$var integer 32 ; a $end +$var integer 32 > a $end $upscope $end $upscope $end $scope module p2 $end -$var parameter 32 < PARAM $end +$var parameter 32 ? PARAM $end $upscope $end $scope module p3 $end -$var parameter 32 = PARAM $end +$var parameter 32 @ PARAM $end $upscope $end $upscope $end $scope module $unit $end -$var bit 1 > global_bit $end +$var bit 1 A global_bit $end $upscope $end $upscope $end $enddefinitions $end @@ -85,14 +88,17 @@ b0000000000000000000000000000000000000000000000000000000011111111 6 b00000000000000000000000000000000 7 b00000000000000000000000000000000 8 b000 9 -b00000000000000000000000000000000 : -b00000000000000000000000000000000 ; -b00000000000000000000000000000010 < -b00000000000000000000000000000011 = -1> +b00000000 : +b00000000 ; +b00000000 < +b00000000000000000000000000000000 = +b00000000000000000000000000000000 > +b00000000000000000000000000000010 ? +b00000000000000000000000000000011 @ +1A #10 -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b111 9 b00000000000000000000000000000010 8 b00000000000000000000000000000001 7 @@ -134,14 +140,14 @@ b0000000000000000000000000000001000000000000000000000000011111101 6 b00000000000000000000000000000010 7 b00000000000000000000000000000100 8 b110 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > #25 0! #30 1! -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b101 9 b00000000000000000000000000000110 8 b00000000000000000000000000000011 7 @@ -182,14 +188,14 @@ b0000000000000000000000000000010000000000000000000000000011111011 6 b00000000000000000000000000000100 7 b00000000000000000000000000001000 8 b100 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > #45 0! #50 1! -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b011 9 b00000000000000000000000000001010 8 b00000000000000000000000000000101 7 @@ -230,5 +236,5 @@ b0000000000000000000000000000011000000000000000000000000011111001 6 b00000000000000000000000000000110 7 b00000000000000000000000000001100 8 b010 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > diff --git a/test_regress/t/t_trace_complex_params.out b/test_regress/t/t_trace_complex_params.out index 2f0975e10..ca5eeb36d 100644 --- a/test_regress/t/t_trace_complex_params.out +++ b/test_regress/t/t_trace_complex_params.out @@ -1,49 +1,52 @@ $version Generated by VerilatedVcd $end -$date Wed May 1 19:09:21 2019 +$date Wed Jan 8 07:26:16 2020 $end $timescale 1ns $end $scope module top $end - $var wire 1 < clk $end + $var wire 1 /" clk $end $scope module $unit $end $var wire 1 # global_bit $end $upscope $end $scope module t $end - $var wire 1 < clk $end - $var wire 32 $ cyc [31:0] $end - $var real 64 3 v_arr_real(0) $end - $var real 64 5 v_arr_real(1) $end - $var wire 2 * v_arrp [2:1] $end - $var wire 4 + v_arrp_arrp [3:0] $end - $var wire 4 , v_arrp_strp [3:0] $end - $var wire 1 = v_arru(1) $end - $var wire 1 > v_arru(2) $end - $var wire 2 - v_arru_arrp(3) [2:1] $end - $var wire 2 . v_arru_arrp(4) [2:1] $end - $var wire 1 ? v_arru_arru(3)(1) $end - $var wire 1 @ v_arru_arru(3)(2) $end - $var wire 1 A v_arru_arru(4)(1) $end - $var wire 1 B v_arru_arru(4)(2) $end - $var wire 2 / v_arru_strp(3) [1:0] $end - $var wire 2 0 v_arru_strp(4) [1:0] $end - $var wire 3 9 v_enumb [2:0] $end - $var wire 32 7 v_enumed [31:0] $end - $var wire 32 8 v_enumed2 [31:0] $end - $var real 64 1 v_real $end - $var wire 64 % v_str32x2 [63:0] $end - $var wire 2 ' v_strp [1:0] $end - $var wire 4 ( v_strp_strp [3:0] $end - $var wire 2 ) v_unip_strp [1:0] $end + $var wire 1 /" clk $end + $var wire 32 + cyc [31:0] $end + $var wire 8 h" unpacked_array(-1) [7:0] $end + $var wire 8 g" unpacked_array(-2) [7:0] $end + $var wire 8 i" unpacked_array(0) [7:0] $end + $var real 64 E! v_arr_real(0) $end + $var real 64 G! v_arr_real(1) $end + $var wire 2 [ v_arrp [2:1] $end + $var wire 4 c v_arrp_arrp [3:0] $end + $var wire 4 k v_arrp_strp [3:0] $end + $var wire 1 7" v_arru(1) $end + $var wire 1 8" v_arru(2) $end + $var wire 2 s v_arru_arrp(3) [2:1] $end + $var wire 2 t v_arru_arrp(4) [2:1] $end + $var wire 1 G" v_arru_arru(3)(1) $end + $var wire 1 O" v_arru_arru(3)(2) $end + $var wire 1 W" v_arru_arru(4)(1) $end + $var wire 1 _" v_arru_arru(4)(2) $end + $var wire 2 %! v_arru_strp(3) [1:0] $end + $var wire 2 -! v_arru_strp(4) [1:0] $end + $var wire 3 u! v_enumb [2:0] $end + $var wire 32 e! v_enumed [31:0] $end + $var wire 32 m! v_enumed2 [31:0] $end + $var real 64 5! v_real $end + $var wire 64 3 v_str32x2 [63:0] $end + $var wire 2 C v_strp [1:0] $end + $var wire 4 K v_strp_strp [3:0] $end + $var wire 2 S v_unip_strp [1:0] $end $scope module p2 $end - $var wire 32 C PARAM [31:0] $end + $var wire 32 !# PARAM [31:0] $end $upscope $end $scope module p3 $end - $var wire 32 D PARAM [31:0] $end + $var wire 32 )# PARAM [31:0] $end $upscope $end $scope module unnamedblk1 $end - $var wire 32 : b [31:0] $end + $var wire 32 }! b [31:0] $end $scope module unnamedblk2 $end - $var wire 32 ; a [31:0] $end + $var wire 32 '" a [31:0] $end $upscope $end $upscope $end $upscope $end @@ -53,164 +56,167 @@ $enddefinitions $end #0 1# -b00000000000000000000000000000000 $ -b0000000000000000000000000000000000000000000000000000000011111111 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0 1 -r0 3 -r0 5 -b00000000000000000000000000000000 7 -b00000000000000000000000000000000 8 -b000 9 -b00000000000000000000000000000000 : -b00000000000000000000000000000000 ; -0< -0= -0> -0? -0@ -0A -0B -b00000000000000000000000000000010 C -b00000000000000000000000000000011 D +b00000000000000000000000000000000 + +b0000000000000000000000000000000000000000000000000000000011111111 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0 5! +r0 E! +r0 G! +b00000000000000000000000000000000 e! +b00000000000000000000000000000000 m! +b000 u! +b00000000000000000000000000000000 }! +b00000000000000000000000000000000 '" +0/" +07" +08" +0G" +0O" +0W" +0_" +b00000000 g" +b00000000 h" +b00000000 i" +b00000000000000000000000000000010 !# +b00000000000000000000000000000011 )# #10 -b00000000000000000000000000000001 $ -b0000000000000000000000000000000100000000000000000000000011111110 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.1 1 -r0.2 3 -r0.3 5 -b00000000000000000000000000000001 7 -b00000000000000000000000000000010 8 -b111 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; -1< +b00000000000000000000000000000001 + +b0000000000000000000000000000000100000000000000000000000011111110 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.1 5! +r0.2 E! +r0.3 G! +b00000000000000000000000000000001 e! +b00000000000000000000000000000010 m! +b111 u! +b00000000000000000000000000000101 }! +b00000000000000000000000000000101 '" +1/" #15 -0< +0/" #20 -b00000000000000000000000000000010 $ -b0000000000000000000000000000001000000000000000000000000011111101 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.2 1 -r0.4 3 -r0.6 5 -b00000000000000000000000000000010 7 -b00000000000000000000000000000100 8 -b110 9 -1< +b00000000000000000000000000000010 + +b0000000000000000000000000000001000000000000000000000000011111101 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.2 5! +r0.4 E! +r0.6 G! +b00000000000000000000000000000010 e! +b00000000000000000000000000000100 m! +b110 u! +1/" #25 -0< +0/" #30 -b00000000000000000000000000000011 $ -b0000000000000000000000000000001100000000000000000000000011111100 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.3 1 -r0.6000000000000001 3 -r0.8999999999999999 5 -b00000000000000000000000000000011 7 -b00000000000000000000000000000110 8 -b101 9 -1< +b00000000000000000000000000000011 + +b0000000000000000000000000000001100000000000000000000000011111100 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.3 5! +r0.6000000000000001 E! +r0.8999999999999999 G! +b00000000000000000000000000000011 e! +b00000000000000000000000000000110 m! +b101 u! +1/" #35 -0< +0/" #40 -b00000000000000000000000000000100 $ -b0000000000000000000000000000010000000000000000000000000011111011 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.4 1 -r0.8 3 -r1.2 5 -b00000000000000000000000000000100 7 -b00000000000000000000000000001000 8 -b100 9 -1< +b00000000000000000000000000000100 + +b0000000000000000000000000000010000000000000000000000000011111011 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.4 5! +r0.8 E! +r1.2 G! +b00000000000000000000000000000100 e! +b00000000000000000000000000001000 m! +b100 u! +1/" #45 -0< +0/" #50 -b00000000000000000000000000000101 $ -b0000000000000000000000000000010100000000000000000000000011111010 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.5 1 -r1 3 -r1.5 5 -b00000000000000000000000000000101 7 -b00000000000000000000000000001010 8 -b011 9 -1< +b00000000000000000000000000000101 + +b0000000000000000000000000000010100000000000000000000000011111010 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.5 5! +r1 E! +r1.5 G! +b00000000000000000000000000000101 e! +b00000000000000000000000000001010 m! +b011 u! +1/" #55 -0< +0/" #60 -b00000000000000000000000000000110 $ -b0000000000000000000000000000011000000000000000000000000011111001 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.6 1 -r1.2 3 -r1.8 5 -b00000000000000000000000000000110 7 -b00000000000000000000000000001100 8 -b010 9 -1< +b00000000000000000000000000000110 + +b0000000000000000000000000000011000000000000000000000000011111001 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.6 5! +r1.2 E! +r1.8 G! +b00000000000000000000000000000110 e! +b00000000000000000000000000001100 m! +b010 u! +1/" diff --git a/test_regress/t/t_trace_complex_params_fst.out b/test_regress/t/t_trace_complex_params_fst.out index 3389037da..366add463 100644 --- a/test_regress/t/t_trace_complex_params_fst.out +++ b/test_regress/t/t_trace_complex_params_fst.out @@ -1,5 +1,5 @@ $date - Wed May 1 19:09:23 2019 + Wed Jan 8 07:26:17 2020 $end $version @@ -41,21 +41,24 @@ $var logic 32 8 v_enumed2 $end $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end $attrbegin misc 07 "" 2 $end $var logic 3 9 v_enumb $end +$var logic 8 : unpacked_array(-2) $end +$var logic 8 ; unpacked_array(-1) $end +$var logic 8 < unpacked_array(0) $end $scope module unnamedblk1 $end -$var integer 32 : b $end +$var integer 32 = b $end $scope module unnamedblk2 $end -$var integer 32 ; a $end +$var integer 32 > a $end $upscope $end $upscope $end $scope module p2 $end -$var parameter 32 < PARAM $end +$var parameter 32 ? PARAM $end $upscope $end $scope module p3 $end -$var parameter 32 = PARAM $end +$var parameter 32 @ PARAM $end $upscope $end $upscope $end $scope module $unit $end -$var bit 1 > global_bit $end +$var bit 1 A global_bit $end $upscope $end $upscope $end $enddefinitions $end @@ -85,14 +88,17 @@ b0000000000000000000000000000000000000000000000000000000011111111 6 b00000000000000000000000000000000 7 b00000000000000000000000000000000 8 b000 9 -b00000000000000000000000000000000 : -b00000000000000000000000000000000 ; -b00000000000000000000000000000010 < -b00000000000000000000000000000011 = -1> +b00000000 : +b00000000 ; +b00000000 < +b00000000000000000000000000000000 = +b00000000000000000000000000000000 > +b00000000000000000000000000000010 ? +b00000000000000000000000000000011 @ +1A #10 -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b111 9 b00000000000000000000000000000010 8 b00000000000000000000000000000001 7 @@ -134,14 +140,14 @@ b0000000000000000000000000000001000000000000000000000000011111101 6 b00000000000000000000000000000010 7 b00000000000000000000000000000100 8 b110 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > #25 0! #30 1! -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b101 9 b00000000000000000000000000000110 8 b00000000000000000000000000000011 7 @@ -182,14 +188,14 @@ b0000000000000000000000000000010000000000000000000000000011111011 6 b00000000000000000000000000000100 7 b00000000000000000000000000001000 8 b100 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > #45 0! #50 1! -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b011 9 b00000000000000000000000000001010 8 b00000000000000000000000000000101 7 @@ -230,5 +236,5 @@ b0000000000000000000000000000011000000000000000000000000011111001 6 b00000000000000000000000000000110 7 b00000000000000000000000000001100 8 b010 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > diff --git a/test_regress/t/t_trace_complex_structs.out b/test_regress/t/t_trace_complex_structs.out index 22b81efdb..ba955aa5e 100644 --- a/test_regress/t/t_trace_complex_structs.out +++ b/test_regress/t/t_trace_complex_structs.out @@ -1,83 +1,86 @@ $version Generated by VerilatedVcd $end -$date Wed May 1 19:09:26 2019 +$date Wed Jan 8 07:26:19 2020 $end $timescale 1ns $end $scope module top $end - $var wire 1 G clk $end + $var wire 1 )# clk $end $scope module $unit $end $var wire 1 # global_bit $end $upscope $end $scope module t $end - $var wire 1 G clk $end - $var wire 32 $ cyc [31:0] $end - $var real 64 > v_arr_real(0) $end - $var real 64 @ v_arr_real(1) $end - $var wire 2 / v_arrp [2:1] $end - $var wire 2 0 v_arrp_arrp(3) [1:0] $end - $var wire 2 1 v_arrp_arrp(4) [1:0] $end - $var wire 1 H v_arru(1) $end - $var wire 1 I v_arru(2) $end - $var wire 2 6 v_arru_arrp(3) [2:1] $end - $var wire 2 7 v_arru_arrp(4) [2:1] $end - $var wire 1 J v_arru_arru(3)(1) $end - $var wire 1 K v_arru_arru(3)(2) $end - $var wire 1 L v_arru_arru(4)(1) $end - $var wire 1 M v_arru_arru(4)(2) $end - $var wire 3 D v_enumb [2:0] $end - $var wire 32 B v_enumed [31:0] $end - $var wire 32 C v_enumed2 [31:0] $end - $var real 64 < v_real $end + $var wire 1 )# clk $end + $var wire 32 + cyc [31:0] $end + $var wire 8 b# unpacked_array(-1) [7:0] $end + $var wire 8 a# unpacked_array(-2) [7:0] $end + $var wire 8 c# unpacked_array(0) [7:0] $end + $var real 64 ?" v_arr_real(0) $end + $var real 64 A" v_arr_real(1) $end + $var wire 2 %! v_arrp [2:1] $end + $var wire 2 -! v_arrp_arrp(3) [1:0] $end + $var wire 2 5! v_arrp_arrp(4) [1:0] $end + $var wire 1 1# v_arru(1) $end + $var wire 1 2# v_arru(2) $end + $var wire 2 ]! v_arru_arrp(3) [2:1] $end + $var wire 2 ^! v_arru_arrp(4) [2:1] $end + $var wire 1 A# v_arru_arru(3)(1) $end + $var wire 1 I# v_arru_arru(3)(2) $end + $var wire 1 Q# v_arru_arru(4)(1) $end + $var wire 1 Y# v_arru_arru(4)(2) $end + $var wire 3 o" v_enumb [2:0] $end + $var wire 32 _" v_enumed [31:0] $end + $var wire 32 g" v_enumed2 [31:0] $end + $var real 64 /" v_real $end $scope module unnamedblk1 $end - $var wire 32 E b [31:0] $end + $var wire 32 w" b [31:0] $end $scope module unnamedblk2 $end - $var wire 32 F a [31:0] $end + $var wire 32 !# a [31:0] $end $upscope $end $upscope $end $scope module v_arrp_strp(3) $end - $var wire 1 3 b0 $end - $var wire 1 2 b1 $end + $var wire 1 E! b0 $end + $var wire 1 =! b1 $end $upscope $end $scope module v_arrp_strp(4) $end - $var wire 1 5 b0 $end - $var wire 1 4 b1 $end + $var wire 1 U! b0 $end + $var wire 1 M! b1 $end $upscope $end $scope module v_arru_strp(3) $end - $var wire 1 9 b0 $end - $var wire 1 8 b1 $end + $var wire 1 u! b0 $end + $var wire 1 m! b1 $end $upscope $end $scope module v_arru_strp(4) $end - $var wire 1 ; b0 $end - $var wire 1 : b1 $end + $var wire 1 '" b0 $end + $var wire 1 }! b1 $end $upscope $end $scope module v_str32x2(0) $end - $var wire 32 % data [31:0] $end + $var wire 32 3 data [31:0] $end $upscope $end $scope module v_str32x2(1) $end - $var wire 32 & data [31:0] $end + $var wire 32 ; data [31:0] $end $upscope $end $scope module v_strp $end - $var wire 1 ( b0 $end - $var wire 1 ' b1 $end + $var wire 1 K b0 $end + $var wire 1 C b1 $end $upscope $end $scope module v_strp_strp $end $scope module x0 $end - $var wire 1 , b0 $end - $var wire 1 + b1 $end + $var wire 1 k b0 $end + $var wire 1 c b1 $end $upscope $end $scope module x1 $end - $var wire 1 * b0 $end - $var wire 1 ) b1 $end + $var wire 1 [ b0 $end + $var wire 1 S b1 $end $upscope $end $upscope $end $scope module v_unip_strp $end $scope module x0 $end - $var wire 1 . b0 $end - $var wire 1 - b1 $end + $var wire 1 { b0 $end + $var wire 1 s b1 $end $upscope $end $scope module x1 $end - $var wire 1 . b0 $end - $var wire 1 - b1 $end + $var wire 1 { b0 $end + $var wire 1 s b1 $end $upscope $end $upscope $end $upscope $end @@ -87,246 +90,249 @@ $enddefinitions $end #0 1# -b00000000000000000000000000000000 $ -b00000000000000000000000011111111 % -b00000000000000000000000000000000 & -0' -0( -0) -0* -0+ -0, -0- -0. -b00 / -b00 0 -b00 1 -02 -03 -04 -05 -b00 6 -b00 7 -08 -09 -0: -0; -r0 < -r0 > -r0 @ -b00000000000000000000000000000000 B -b00000000000000000000000000000000 C -b000 D -b00000000000000000000000000000000 E -b00000000000000000000000000000000 F -0G -0H -0I -0J +b00000000000000000000000000000000 + +b00000000000000000000000011111111 3 +b00000000000000000000000000000000 ; +0C 0K -0L -0M +0S +0[ +0c +0k +0s +0{ +b00 %! +b00 -! +b00 5! +0=! +0E! +0M! +0U! +b00 ]! +b00 ^! +0m! +0u! +0}! +0'" +r0 /" +r0 ?" +r0 A" +b00000000000000000000000000000000 _" +b00000000000000000000000000000000 g" +b000 o" +b00000000000000000000000000000000 w" +b00000000000000000000000000000000 !# +0)# +01# +02# +0A# +0I# +0Q# +0Y# +b00000000 a# +b00000000 b# +b00000000 c# #10 -b00000000000000000000000000000001 $ -b00000000000000000000000011111110 % -b00000000000000000000000000000001 & -1' -1( -1) -1* -1+ -1, -1- -1. -b11 / -b11 0 -b11 1 -12 -13 -14 -15 -b11 6 -b11 7 -18 -19 -1: -1; -r0.1 < -r0.2 > -r0.3 @ -b00000000000000000000000000000001 B -b00000000000000000000000000000010 C -b111 D -b00000000000000000000000000000101 E -b00000000000000000000000000000101 F -1G +b00000000000000000000000000000001 + +b00000000000000000000000011111110 3 +b00000000000000000000000000000001 ; +1C +1K +1S +1[ +1c +1k +1s +1{ +b11 %! +b11 -! +b11 5! +1=! +1E! +1M! +1U! +b11 ]! +b11 ^! +1m! +1u! +1}! +1'" +r0.1 /" +r0.2 ?" +r0.3 A" +b00000000000000000000000000000001 _" +b00000000000000000000000000000010 g" +b111 o" +b00000000000000000000000000000101 w" +b00000000000000000000000000000101 !# +1)# #15 -0G +0)# #20 -b00000000000000000000000000000010 $ -b00000000000000000000000011111101 % -b00000000000000000000000000000010 & -0' -0( -0) -0* -0+ -0, -0- -0. -b00 / -b00 0 -b00 1 -02 -03 -04 -05 -b00 6 -b00 7 -08 -09 -0: -0; -r0.2 < -r0.4 > -r0.6 @ -b00000000000000000000000000000010 B -b00000000000000000000000000000100 C -b110 D -1G +b00000000000000000000000000000010 + +b00000000000000000000000011111101 3 +b00000000000000000000000000000010 ; +0C +0K +0S +0[ +0c +0k +0s +0{ +b00 %! +b00 -! +b00 5! +0=! +0E! +0M! +0U! +b00 ]! +b00 ^! +0m! +0u! +0}! +0'" +r0.2 /" +r0.4 ?" +r0.6 A" +b00000000000000000000000000000010 _" +b00000000000000000000000000000100 g" +b110 o" +1)# #25 -0G +0)# #30 -b00000000000000000000000000000011 $ -b00000000000000000000000011111100 % -b00000000000000000000000000000011 & -1' -1( -1) -1* -1+ -1, -1- -1. -b11 / -b11 0 -b11 1 -12 -13 -14 -15 -b11 6 -b11 7 -18 -19 -1: -1; -r0.3 < -r0.6000000000000001 > -r0.8999999999999999 @ -b00000000000000000000000000000011 B -b00000000000000000000000000000110 C -b101 D -1G +b00000000000000000000000000000011 + +b00000000000000000000000011111100 3 +b00000000000000000000000000000011 ; +1C +1K +1S +1[ +1c +1k +1s +1{ +b11 %! +b11 -! +b11 5! +1=! +1E! +1M! +1U! +b11 ]! +b11 ^! +1m! +1u! +1}! +1'" +r0.3 /" +r0.6000000000000001 ?" +r0.8999999999999999 A" +b00000000000000000000000000000011 _" +b00000000000000000000000000000110 g" +b101 o" +1)# #35 -0G +0)# #40 -b00000000000000000000000000000100 $ -b00000000000000000000000011111011 % -b00000000000000000000000000000100 & -0' -0( -0) -0* -0+ -0, -0- -0. -b00 / -b00 0 -b00 1 -02 -03 -04 -05 -b00 6 -b00 7 -08 -09 -0: -0; -r0.4 < -r0.8 > -r1.2 @ -b00000000000000000000000000000100 B -b00000000000000000000000000001000 C -b100 D -1G +b00000000000000000000000000000100 + +b00000000000000000000000011111011 3 +b00000000000000000000000000000100 ; +0C +0K +0S +0[ +0c +0k +0s +0{ +b00 %! +b00 -! +b00 5! +0=! +0E! +0M! +0U! +b00 ]! +b00 ^! +0m! +0u! +0}! +0'" +r0.4 /" +r0.8 ?" +r1.2 A" +b00000000000000000000000000000100 _" +b00000000000000000000000000001000 g" +b100 o" +1)# #45 -0G +0)# #50 -b00000000000000000000000000000101 $ -b00000000000000000000000011111010 % -b00000000000000000000000000000101 & -1' -1( -1) -1* -1+ -1, -1- -1. -b11 / -b11 0 -b11 1 -12 -13 -14 -15 -b11 6 -b11 7 -18 -19 -1: -1; -r0.5 < -r1 > -r1.5 @ -b00000000000000000000000000000101 B -b00000000000000000000000000001010 C -b011 D -1G +b00000000000000000000000000000101 + +b00000000000000000000000011111010 3 +b00000000000000000000000000000101 ; +1C +1K +1S +1[ +1c +1k +1s +1{ +b11 %! +b11 -! +b11 5! +1=! +1E! +1M! +1U! +b11 ]! +b11 ^! +1m! +1u! +1}! +1'" +r0.5 /" +r1 ?" +r1.5 A" +b00000000000000000000000000000101 _" +b00000000000000000000000000001010 g" +b011 o" +1)# #55 -0G +0)# #60 -b00000000000000000000000000000110 $ -b00000000000000000000000011111001 % -b00000000000000000000000000000110 & -0' -0( -0) -0* -0+ -0, -0- -0. -b00 / -b00 0 -b00 1 -02 -03 -04 -05 -b00 6 -b00 7 -08 -09 -0: -0; -r0.6 < -r1.2 > -r1.8 @ -b00000000000000000000000000000110 B -b00000000000000000000000000001100 C -b010 D -1G +b00000000000000000000000000000110 + +b00000000000000000000000011111001 3 +b00000000000000000000000000000110 ; +0C +0K +0S +0[ +0c +0k +0s +0{ +b00 %! +b00 -! +b00 5! +0=! +0E! +0M! +0U! +b00 ]! +b00 ^! +0m! +0u! +0}! +0'" +r0.6 /" +r1.2 ?" +r1.8 A" +b00000000000000000000000000000110 _" +b00000000000000000000000000001100 g" +b010 o" +1)# diff --git a/test_regress/t/t_trace_complex_structs_fst.out b/test_regress/t/t_trace_complex_structs_fst.out index 93e8f6d7a..a3e68df29 100644 --- a/test_regress/t/t_trace_complex_structs_fst.out +++ b/test_regress/t/t_trace_complex_structs_fst.out @@ -1,5 +1,5 @@ $date - Wed May 1 19:09:29 2019 + Wed Jan 8 07:26:20 2020 $end $version @@ -81,15 +81,18 @@ $var logic 32 D v_enumed2 $end $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end $attrbegin misc 07 "" 2 $end $var logic 3 E v_enumb $end +$var logic 8 F unpacked_array(-2) $end +$var logic 8 G unpacked_array(-1) $end +$var logic 8 H unpacked_array(0) $end $scope module unnamedblk1 $end -$var integer 32 F b $end +$var integer 32 I b $end $scope module unnamedblk2 $end -$var integer 32 G a $end +$var integer 32 J a $end $upscope $end $upscope $end $upscope $end $scope module $unit $end -$var bit 1 H global_bit $end +$var bit 1 K global_bit $end $upscope $end $upscope $end $enddefinitions $end @@ -131,12 +134,15 @@ b00000000000000000000000000000000 B b00000000000000000000000000000000 C b00000000000000000000000000000000 D b000 E -b00000000000000000000000000000000 F -b00000000000000000000000000000000 G -1H +b00000000 F +b00000000 G +b00000000 H +b00000000000000000000000000000000 I +b00000000000000000000000000000000 J +1K #10 -b00000000000000000000000000000101 G -b00000000000000000000000000000101 F +b00000000000000000000000000000101 J +b00000000000000000000000000000101 I b111 E b00000000000000000000000000000010 D b00000000000000000000000000000001 C @@ -202,14 +208,14 @@ b00000000000000000000000000000010 B b00000000000000000000000000000010 C b00000000000000000000000000000100 D b110 E -b00000000000000000000000000000101 F -b00000000000000000000000000000101 G +b00000000000000000000000000000101 I +b00000000000000000000000000000101 J #25 0! #30 1! -b00000000000000000000000000000101 G -b00000000000000000000000000000101 F +b00000000000000000000000000000101 J +b00000000000000000000000000000101 I b101 E b00000000000000000000000000000110 D b00000000000000000000000000000011 C @@ -274,14 +280,14 @@ b00000000000000000000000000000100 B b00000000000000000000000000000100 C b00000000000000000000000000001000 D b100 E -b00000000000000000000000000000101 F -b00000000000000000000000000000101 G +b00000000000000000000000000000101 I +b00000000000000000000000000000101 J #45 0! #50 1! -b00000000000000000000000000000101 G -b00000000000000000000000000000101 F +b00000000000000000000000000000101 J +b00000000000000000000000000000101 I b011 E b00000000000000000000000000001010 D b00000000000000000000000000000101 C @@ -346,5 +352,5 @@ b00000000000000000000000000000110 B b00000000000000000000000000000110 C b00000000000000000000000000001100 D b010 E -b00000000000000000000000000000101 F -b00000000000000000000000000000101 G +b00000000000000000000000000000101 I +b00000000000000000000000000000101 J diff --git a/test_regress/t/t_trace_public.v b/test_regress/t/t_trace_public.v index 1f848a876..06080d229 100644 --- a/test_regress/t/t_trace_public.v +++ b/test_regress/t/t_trace_public.v @@ -33,12 +33,18 @@ module glbl(); `ifdef PUB_FUNC reg GSR; task setGSR; +`ifdef ATTRIBUTES /* verilator public */ +`endif input value; GSR = value; endtask `else + `ifdef ATTRIBUTES reg GSR /*verilator public*/; + `else + reg GSR; + `endif `endif endmodule diff --git a/test_regress/t/t_trace_public_func.cpp b/test_regress/t/t_trace_public_func.cpp index cf5606ed5..d5e055111 100644 --- a/test_regress/t/t_trace_public_func.cpp +++ b/test_regress/t/t_trace_public_func.cpp @@ -8,9 +8,14 @@ #include #include -#include "Vt_trace_public_func.h" -#include "Vt_trace_public_func_t.h" -#include "Vt_trace_public_func_glbl.h" +#include VM_PREFIX_INCLUDE +#ifdef T_TRACE_PUBLIC_FUNC_VLT +# include "Vt_trace_public_func_vlt_t.h" +# include "Vt_trace_public_func_vlt_glbl.h" +#else +# include "Vt_trace_public_func_t.h" +# include "Vt_trace_public_func_glbl.h" +#endif unsigned long long main_time = 0; double sc_time_stamp() { return (double)main_time; } @@ -18,7 +23,7 @@ double sc_time_stamp() { return (double)main_time; } const unsigned long long dt_2 = 3; int main(int argc, char** argv, char** env) { - Vt_trace_public_func* top = new Vt_trace_public_func("top"); + VM_PREFIX* top = new VM_PREFIX("top"); Verilated::debug(0); Verilated::traceEverOn(true); diff --git a/test_regress/t/t_trace_public_func.pl b/test_regress/t/t_trace_public_func.pl index a8fa99330..1a9d8c57a 100755 --- a/test_regress/t/t_trace_public_func.pl +++ b/test_regress/t/t_trace_public_func.pl @@ -14,7 +14,7 @@ top_filename("t/t_trace_public.v"); compile( make_top_shell => 0, make_main => 0, - v_flags2 => ["-DPUB_FUNC --trace --exe $Self->{t_dir}/$Self->{name}.cpp"], + v_flags2 => ["-DATTRIBUTES -DPUB_FUNC --trace --exe $Self->{t_dir}/$Self->{name}.cpp"], ); execute( diff --git a/test_regress/t/t_trace_public_func.vlt b/test_regress/t/t_trace_public_func.vlt new file mode 100644 index 000000000..15b96feeb --- /dev/null +++ b/test_regress/t/t_trace_public_func.vlt @@ -0,0 +1,8 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +public -module "glbl" -function "setGSR" diff --git a/test_regress/t/t_trace_public_func_vlt.pl b/test_regress/t/t_trace_public_func_vlt.pl new file mode 100755 index 000000000..a7f553931 --- /dev/null +++ b/test_regress/t/t_trace_public_func_vlt.pl @@ -0,0 +1,28 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt_all => 1); + +top_filename("t/t_trace_public.v"); + +compile( + make_top_shell => 0, + make_main => 0, + v_flags2 => ["-DPUB_FUNC --trace --exe $Self->{t_dir}/t_trace_public_func.cpp $Self->{t_dir}/t_trace_public_func.vlt"], + ); + +execute( + check_finished => 1, + ); + +vcd_identical("$Self->{obj_dir}/simx.vcd", + "t/t_trace_public.out"); + +ok(1); +1; diff --git a/test_regress/t/t_trace_public_sig.cpp b/test_regress/t/t_trace_public_sig.cpp index 457c76560..983a5449a 100644 --- a/test_regress/t/t_trace_public_sig.cpp +++ b/test_regress/t/t_trace_public_sig.cpp @@ -8,9 +8,14 @@ #include #include -#include "Vt_trace_public_sig.h" -#include "Vt_trace_public_sig_t.h" -#include "Vt_trace_public_sig_glbl.h" +#include VM_PREFIX_INCLUDE +#ifdef T_TRACE_PUBLIC_SIG_VLT +# include "Vt_trace_public_sig_vlt_t.h" +# include "Vt_trace_public_sig_vlt_glbl.h" +#else +# include "Vt_trace_public_sig_t.h" +# include "Vt_trace_public_sig_glbl.h" +#endif unsigned long long main_time = 0; double sc_time_stamp() { return (double)main_time; } @@ -18,7 +23,7 @@ double sc_time_stamp() { return (double)main_time; } const unsigned long long dt_2 = 3; int main(int argc, char** argv, char** env) { - Vt_trace_public_sig* top = new Vt_trace_public_sig("top"); + VM_PREFIX* top = new VM_PREFIX("top"); Verilated::debug(0); Verilated::traceEverOn(true); diff --git a/test_regress/t/t_trace_public_sig.pl b/test_regress/t/t_trace_public_sig.pl index 7d69b207c..f06a83b83 100755 --- a/test_regress/t/t_trace_public_sig.pl +++ b/test_regress/t/t_trace_public_sig.pl @@ -14,7 +14,7 @@ top_filename("t/t_trace_public.v"); compile( make_top_shell => 0, make_main => 0, - v_flags2 => ["--trace --exe $Self->{t_dir}/$Self->{name}.cpp"], + v_flags2 => ["-DATTRIBUTES --trace --exe $Self->{t_dir}/$Self->{name}.cpp"], ); execute( diff --git a/test_regress/t/t_trace_public_sig.vlt b/test_regress/t/t_trace_public_sig.vlt new file mode 100644 index 000000000..ec8647b5d --- /dev/null +++ b/test_regress/t/t_trace_public_sig.vlt @@ -0,0 +1,8 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +public -module "glbl" -var "GSR" diff --git a/test_regress/t/t_trace_public_sig_vlt.pl b/test_regress/t/t_trace_public_sig_vlt.pl new file mode 100755 index 000000000..68c888339 --- /dev/null +++ b/test_regress/t/t_trace_public_sig_vlt.pl @@ -0,0 +1,36 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt_all => 1); + +top_filename("t/t_trace_public.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + make_top_shell => 0, + make_main => 0, + v_flags2 => ["--trace --exe $Self->{t_dir}/t_trace_public_sig.cpp $Self->{t_dir}/t_trace_public_sig.vlt"], + ); + +if ($Self->{vlt_all}) { + file_grep("$out_filename", qr/\/i); +} + +execute( + check_finished => 1, + ); + +vcd_identical("$Self->{obj_dir}/simx.vcd", + "t/t_trace_public.out"); + +# vcd_identical doesn't detect "$var a.b;" vs "$scope module a; $var b;" +file_grep("$Self->{obj_dir}/simx.vcd", qr/module glbl/i); + +ok(1); +1; diff --git a/test_regress/t/t_unopt_combo.v b/test_regress/t/t_unopt_combo.v index f923d97e7..8e74883f2 100644 --- a/test_regress/t/t_unopt_combo.v +++ b/test_regress/t/t_unopt_combo.v @@ -94,10 +94,17 @@ module file (/*AUTOARG*/ endcase end +`ifdef ISOLATE function [31:16] get_31_16 /* verilator isolate_assignments*/; input [31:0] t_crc /* verilator isolate_assignments*/; get_31_16 = t_crc[31:16]; endfunction +`else + function [31:16] get_31_16; + input [31:0] t_crc; + get_31_16 = t_crc[31:16]; + endfunction +`endif task set_b_d; `ifdef ISOLATE diff --git a/test_regress/t/t_unopt_combo_bad.out b/test_regress/t/t_unopt_combo_bad.out index 67138f1b5..6c675c42b 100644 --- a/test_regress/t/t_unopt_combo_bad.out +++ b/test_regress/t/t_unopt_combo_bad.out @@ -5,6 +5,6 @@ t/t_unopt_combo.v:23: Example path: t.c t/t_unopt_combo.v:80: Example path: ALWAYS t/t_unopt_combo.v:22: Example path: t.b - t/t_unopt_combo.v:116: Example path: ALWAYS + t/t_unopt_combo.v:123: Example path: ALWAYS t/t_unopt_combo.v:23: Example path: t.c %Error: Exiting due to diff --git a/test_regress/t/t_unopt_combo_bad.pl b/test_regress/t/t_unopt_combo_bad.pl index 6ba52ae7a..81bf42fa9 100755 --- a/test_regress/t/t_unopt_combo_bad.pl +++ b/test_regress/t/t_unopt_combo_bad.pl @@ -12,6 +12,7 @@ scenarios(simulator => 1); top_filename("t/t_unopt_combo.v"); compile( + v_flags2 => ['+define+ATTRIBUTES'], fails => $Self->{vlt_all}, expect_filename => $Self->{golden_filename}, ); diff --git a/test_regress/t/t_unopt_combo_isolate.pl b/test_regress/t/t_unopt_combo_isolate.pl index 1e27afc3d..d43183607 100755 --- a/test_regress/t/t_unopt_combo_isolate.pl +++ b/test_regress/t/t_unopt_combo_isolate.pl @@ -10,13 +10,19 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(simulator => 1); top_filename("t/t_unopt_combo.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; compile( - verilator_flags2 => ['+define+ISOLATE --stats'], + verilator_flags2 => ["+define+ISOLATE --stats"], ); if ($Self->{vlt_all}) { file_grep($Self->{stats}, qr/Optimizations, isolate_assignments blocks\s+5/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); } execute( diff --git a/test_regress/t/t_unopt_combo_isolate.vlt b/test_regress/t/t_unopt_combo_isolate.vlt new file mode 100644 index 000000000..44546c5a9 --- /dev/null +++ b/test_regress/t/t_unopt_combo_isolate.vlt @@ -0,0 +1,11 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +isolate_assignments -module "file" -var "b" +isolate_assignments -module "file" -task "set_b_d" -var "t_c*" +isolate_assignments -module "file" -function "get_31_16" -var "t_crc" +isolate_assignments -module "file" -function "get_31_16" diff --git a/test_regress/t/t_unopt_combo_isolate_vlt.pl b/test_regress/t/t_unopt_combo_isolate_vlt.pl new file mode 100755 index 000000000..855ac8b0e --- /dev/null +++ b/test_regress/t/t_unopt_combo_isolate_vlt.pl @@ -0,0 +1,32 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_unopt_combo.v"); +my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml"; + +compile( + verilator_flags2 => ["--stats $Self->{t_dir}/t_unopt_combo_isolate.vlt"], + ); + +if ($Self->{vlt_all}) { + file_grep($Self->{stats}, qr/Optimizations, isolate_assignments blocks\s+5/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); + file_grep("$out_filename", qr/\/i); +} + +execute( + ); + +ok(1); +1; diff --git a/test_regress/t/t_var_pins_sc1.pl b/test_regress/t/t_var_pins_sc1.pl index c635d6614..3a41be17d 100755 --- a/test_regress/t/t_var_pins_sc1.pl +++ b/test_regress/t/t_var_pins_sc1.pl @@ -12,7 +12,7 @@ scenarios(vlt_all => 1); top_filename("t/t_var_pinsizes.v"); compile( - verilator_flags2 => ["-sc -pins-bv 1 --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp"], + verilator_flags2 => ["-sc -pins-bv 1 --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp $Self->{t_dir}/t_var_pinsizes.vlt"], make_main => 0, ); @@ -25,6 +25,8 @@ if ($Self->{vlt_all}) { file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ i65;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv16;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv1_vlt;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv16_vlt;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ o1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ o8;/x); @@ -34,6 +36,8 @@ if ($Self->{vlt_all}) { file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ o65;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv16;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv1_vlt;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv16_vlt;/x); } execute(); diff --git a/test_regress/t/t_var_pins_sc2.pl b/test_regress/t/t_var_pins_sc2.pl index e6b123d1f..2d1d53916 100755 --- a/test_regress/t/t_var_pins_sc2.pl +++ b/test_regress/t/t_var_pins_sc2.pl @@ -12,7 +12,7 @@ scenarios(vlt_all => 1); top_filename("t/t_var_pinsizes.v"); compile( - verilator_flags2 => ["-sc -pins-bv 2 --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp"], + verilator_flags2 => ["-sc -pins-bv 2 --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp $Self->{t_dir}/t_var_pinsizes.vlt"], make_main => 0, ); @@ -25,6 +25,8 @@ compile( file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ i65;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv16;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv1_vlt;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv16_vlt;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out \s+ o1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ o8;/x); @@ -34,6 +36,8 @@ compile( file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ o65;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv16;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv1_vlt;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv16_vlt;/x); } execute(); diff --git a/test_regress/t/t_var_pins_sc32.pl b/test_regress/t/t_var_pins_sc32.pl index 5d8bb92d0..800adf220 100755 --- a/test_regress/t/t_var_pins_sc32.pl +++ b/test_regress/t/t_var_pins_sc32.pl @@ -12,7 +12,7 @@ scenarios(vlt_all => 1); top_filename("t/t_var_pinsizes.v"); compile( - verilator_flags2 => ["-sc -no-pins64 --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp"], + verilator_flags2 => ["-sc -no-pins64 --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp $Self->{t_dir}/t_var_pinsizes.vlt"], make_main => 0, ); @@ -25,6 +25,8 @@ compile( file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ i65;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv16;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv1_vlt;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv16_vlt;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out \s+ o1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out \s+ o8;/x); @@ -34,6 +36,8 @@ compile( file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ o65;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv16;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv1_vlt;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv16_vlt;/x); } execute(); diff --git a/test_regress/t/t_var_pins_sc64.pl b/test_regress/t/t_var_pins_sc64.pl index c7fa7c26d..0182586e2 100755 --- a/test_regress/t/t_var_pins_sc64.pl +++ b/test_regress/t/t_var_pins_sc64.pl @@ -12,7 +12,7 @@ scenarios(vlt_all => 1); top_filename("t/t_var_pinsizes.v"); compile( - verilator_flags2 => ["-sc -pins64 --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp"], + verilator_flags2 => ["-sc -pins64 --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp $Self->{t_dir}/t_var_pinsizes.vlt"], make_main => 0, ); @@ -25,6 +25,8 @@ if ($Self->{vlt_all}) { file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ i65;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv16;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv1_vlt;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_in\s> \s+ ibv16_vlt;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out \s+ o1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out \s+ o8;/x); @@ -34,6 +36,8 @@ if ($Self->{vlt_all}) { file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ o65;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv1;/x); file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv16;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv1_vlt;/x); + file_grep("$Self->{obj_dir}/$Self->{VM_PREFIX}.h", qr/sc_out\s> \s+ obv16_vlt;/x); } execute(); diff --git a/test_regress/t/t_var_pinsizes.v b/test_regress/t/t_var_pinsizes.v index 1ed04a606..e8e47533f 100644 --- a/test_regress/t/t_var_pinsizes.v +++ b/test_regress/t/t_var_pinsizes.v @@ -8,9 +8,9 @@ module t (/*AUTOARG*/ // Outputs - o1, o8, o16, o32, o64, o65, o128, o513, o1a2, o94a3, obv1, obv16, + o1, o8, o16, o32, o64, o65, o128, o513, o1a2, o94a3, obv1, obv16, obv1_vlt, obv16_vlt, // Inputs - clk, i1, i8, i16, i32, i64, i65, i128, i513, i1a2, i94a3, ibv1, ibv16 + clk, i1, i8, i16, i32, i64, i65, i128, i513, i1a2, i94a3, ibv1, ibv16, ibv1_vlt, ibv16_vlt ); input clk; @@ -38,10 +38,14 @@ module t (/*AUTOARG*/ output logic [93:0] o94a3 [2:0]; input [0:0] ibv1 /*verilator sc_bv*/; - input [15:0] ibv16 /*verilator sc_bv*/; + input [15:0] ibv16 /*verilator sc_bv*/; + input [0:0] ibv1_vlt; + input [15:0] ibv16_vlt; output logic [0:0] obv1 /*verilator sc_bv*/; output logic [15:0] obv16 /*verilator sc_bv*/; + output logic [0:0] obv1_vlt; + output logic [15:0] obv16_vlt; always @ (posedge clk) begin o1 <= i1; @@ -54,6 +58,8 @@ module t (/*AUTOARG*/ o513 <= i513; obv1 <= ibv1; obv16 <= ibv16; + obv1_vlt <= ibv1_vlt; + obv16_vlt <= ibv16_vlt; o1a2 <= i1a2; o94a3 <= i94a3; end diff --git a/test_regress/t/t_var_pinsizes.vlt b/test_regress/t/t_var_pinsizes.vlt new file mode 100644 index 000000000..7febde1d9 --- /dev/null +++ b/test_regress/t/t_var_pinsizes.vlt @@ -0,0 +1,10 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Stefan Wallentowitz. + +`verilator_config + +sc_bv -module "t" -var "ibv1_vlt" +sc_bv -module "*" -var "ibv16_vlt" +sc_bv -module "*" -var "obv*_vlt" diff --git a/test_regress/t/t_vlt_syntax_bad.out b/test_regress/t/t_vlt_syntax_bad.out new file mode 100644 index 000000000..a33d90118 --- /dev/null +++ b/test_regress/t/t_vlt_syntax_bad.out @@ -0,0 +1,7 @@ +%Error: t/t_vlt_syntax_bad.vlt:8: sensitivity not expected for attribute +public -module "t" @(posedge clk) + ^ +%Error: t/t_vlt_syntax_bad.vlt:9: isolate_assignments only applies to signals or functions/tasks +isolate_assignments -module "t" +^~~~~~~~~~~~~~~~~~~ +%Error: Exiting due to diff --git a/test_regress/t/t_vlt_syntax_bad.pl b/test_regress/t/t_vlt_syntax_bad.pl new file mode 100755 index 000000000..b53b7da4d --- /dev/null +++ b/test_regress/t/t_vlt_syntax_bad.pl @@ -0,0 +1,19 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt_all => 1); + +compile( + verilator_flags2 => ["t/t_vlt_syntax_bad.vlt"], + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_vlt_syntax_bad.v b/test_regress/t/t_vlt_syntax_bad.v new file mode 100644 index 000000000..6370f0978 --- /dev/null +++ b/test_regress/t/t_vlt_syntax_bad.v @@ -0,0 +1,2 @@ +module t; +endmodule diff --git a/test_regress/t/t_vlt_syntax_bad.vlt b/test_regress/t/t_vlt_syntax_bad.vlt new file mode 100644 index 000000000..51140ca01 --- /dev/null +++ b/test_regress/t/t_vlt_syntax_bad.vlt @@ -0,0 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2010 by Wilson Snyder. + +`verilator_config + +public -module "t" @(posedge clk) +isolate_assignments -module "t" diff --git a/test_regress/t/t_vlt_warn.pl b/test_regress/t/t_vlt_warn.pl index f363c7cbe..078632d69 100755 --- a/test_regress/t/t_vlt_warn.pl +++ b/test_regress/t/t_vlt_warn.pl @@ -10,7 +10,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(vlt => 1); lint( - verilator_flags2 => ["--lint-only t/t_vlt_warn.vlt"], + verilator_flags2 => ["--lint-only t/t_vlt_warn.vlt -Wall"], ); ok(1); diff --git a/test_regress/t/t_vlt_warn.v b/test_regress/t/t_vlt_warn.v index 315e086b8..1c2a936d4 100644 --- a/test_regress/t/t_vlt_warn.v +++ b/test_regress/t/t_vlt_warn.v @@ -6,7 +6,7 @@ // Try inline config `ifdef verilator `verilator_config - lint_off -msg CASEX -file "t/t_vlt_warn.v" + lint_off -rule CASEX -file "t/t_vlt_warn.v" `verilog `endif diff --git a/test_regress/t/t_vlt_warn.vlt b/test_regress/t/t_vlt_warn.vlt index 6334c6691..3aaac32bb 100644 --- a/test_regress/t/t_vlt_warn.vlt +++ b/test_regress/t/t_vlt_warn.vlt @@ -5,12 +5,16 @@ `verilator_config -lint_off -msg CASEINCOMPLETE -file "t/t_vlt_warn.v" -lint_off -msg WIDTH -file "t/t_vlt_warn.v" -lines 18 +lint_off -rule DEPRECATED -file "t/t_vlt_warn.vlt" -lines 13 +lint_off -rule CASEINCOMPLETE -file "t/t_vlt_warn.v" +lint_off -rule WIDTH -file "t/t_vlt_warn.v" -lines 18 +lint_off -rule DECLFILENAME -file "*/t_vlt_warn.v" // Test wildcard filenames -lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19 +lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19 // Test global disables -lint_off -file "*/t_vlt_warn.v" -lines 20-20 +lint_off -file "*/t_vlt_warn.v" -lines 20-20 +// Test match +lint_off -rule UNUSED -file "*/t_vlt_warn.v" -match "Signal is not used: 'width_warn*'" coverage_off -file "t/t_vlt_warn.v" // Test --flag is also accepted diff --git a/test_regress/t/t_vlt_warn_bad.out b/test_regress/t/t_vlt_warn_bad.out new file mode 100644 index 000000000..0a847a31a --- /dev/null +++ b/test_regress/t/t_vlt_warn_bad.out @@ -0,0 +1,5 @@ +%Warning-DEPRECATED: t/t_vlt_warn_bad.vlt:11: Deprecated -msg in configuration files, use -rule instead. +lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19 + ^~~~ + ... Use "/* verilator lint_off DEPRECATED */" and lint_on around source to disable this message. +%Error: Exiting due to diff --git a/test_regress/t/t_vlt_warn_bad.pl b/test_regress/t/t_vlt_warn_bad.pl new file mode 100755 index 000000000..5dd7bae92 --- /dev/null +++ b/test_regress/t/t_vlt_warn_bad.pl @@ -0,0 +1,21 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2008 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +top_filename("t/t_vlt_warn.v"); + +lint( + verilator_flags2 => ["--lint-only t/t_vlt_warn_bad.vlt"], + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_vlt_warn_bad.vlt b/test_regress/t/t_vlt_warn_bad.vlt new file mode 100644 index 000000000..b16f429b1 --- /dev/null +++ b/test_regress/t/t_vlt_warn_bad.vlt @@ -0,0 +1,17 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2010 by Wilson Snyder. + +`verilator_config + +lint_off -rule CASEINCOMPLETE -file "t/t_vlt_warn.v" +lint_off -rule WIDTH -file "t/t_vlt_warn.v" -lines 18 +// Test wildcard filenames +lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19 +// Test global disables +lint_off -file "*/t_vlt_warn.v" -lines 20-20 + +coverage_off -file "t/t_vlt_warn.v" +// Test --flag is also accepted +tracing_off --file "t/t_vlt_warn.v" diff --git a/test_regress/t/t_vpi_var.cpp b/test_regress/t/t_vpi_var.cpp index 91ba19008..9fdd7dc1b 100644 --- a/test_regress/t/t_vpi_var.cpp +++ b/test_regress/t/t_vpi_var.cpp @@ -84,7 +84,7 @@ unsigned int callback_count_strs_max = 500; #define CHECK_RESULT_CSTR(got, exp) \ if (strcmp((got), (exp))) { \ printf("%%Error: %s:%d: GOT = '%s' EXP = '%s'\n", FILENM, __LINE__, \ - (got) ? (got) : "", (exp) ? (exp) : ""); \ + ((got) != NULL) ? (got) : "", ((exp) != NULL) ? (exp) : ""); \ return __LINE__; \ } diff --git a/test_regress/vgen.pl b/test_regress/vgen.pl index 3ed4afac2..dd9955f82 100755 --- a/test_regress/vgen.pl +++ b/test_regress/vgen.pl @@ -1,8 +1,10 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### require 5.006_001; +use warnings; + use Getopt::Long; use IO::File; use Pod::Usage; @@ -1044,7 +1046,7 @@ Include some signed arithmetic in the generated code. Experimental. =head1 DISTRIBUTION -Copyright 2001-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2001-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/verilator-config-version.cmake.in b/verilator-config-version.cmake.in index 89862189a..d20a842ba 100644 --- a/verilator-config-version.cmake.in +++ b/verilator-config-version.cmake.in @@ -7,7 +7,7 @@ # # find_package(verilate 4.0) # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/verilator-config.cmake.in b/verilator-config.cmake.in index 0f25e3195..e7fe515d4 100644 --- a/verilator-config.cmake.in +++ b/verilator-config.cmake.in @@ -11,7 +11,7 @@ # add_executable(simulator ) # verilate(simulator SOURCES ) # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0.