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Fix function references under top inlined module.

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git-svn-id: file://localhost/svn/verilator/trunk/verilator@781 77ca24e4-aefa-0310-84f0-b9a241c72d87
This commit is contained in:
Wilson Snyder
2006-09-08 16:16:30 +00:00
parent 1b20481100
commit 88809587f9
3 changed files with 24 additions and 3 deletions
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+5 -1
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@@ -3,7 +3,11 @@ Revision history for Verilator
The contributors that suggested a given feature are shown in []. [by ...]
indicates the contributor was also the author of the fix; Thanks!
* Verilator 3.601 09/06/2006
* Verilator 3.602 ****
**** Fix function references under top inlined module. [David Hewson]
* Verilator 3.601 09/06/2006 Beta
*** Added --inhibit-sim flag for environments using old __Vm_inhibitSim.
src/V3LinkDot.cpp
+5 -2
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@@ -546,7 +546,8 @@ private:
string baddot;
LinkDotBaseVertex* dotVxp = m_cellVxp; // Start search at current scope
if (nodep->inlinedDots()!="") { // Correct for current scope
dotVxp = m_statep->findDotted(dotVxp, nodep->inlinedDots(), baddot);
string inl = AstNode::prettyName(nodep->inlinedDots());
dotVxp = m_statep->findDotted(dotVxp, inl, baddot);
if (!dotVxp) nodep->v3fatalSrc("Couldn't resolve inlined scope '"<<baddot<<"' in: "<<nodep->inlinedDots());
}
dotVxp = m_statep->findDotted(dotVxp, nodep->dotted(), baddot); // Maybe NULL
@@ -589,7 +590,9 @@ private:
string baddot;
LinkDotBaseVertex* dotVxp = m_cellVxp; // Start search at current scope
if (nodep->inlinedDots()!="") { // Correct for current scope
dotVxp = m_statep->findDotted(dotVxp, nodep->inlinedDots(), baddot);
string inl = AstNode::prettyName(nodep->inlinedDots());
UINFO(8,"\t\tInlined "<<inl<<endl);
dotVxp = m_statep->findDotted(dotVxp, inl, baddot);
if (!dotVxp) nodep->v3fatalSrc("Couldn't resolve inlined scope '"<<baddot<<"' in: "<<nodep->inlinedDots());
}
dotVxp = m_statep->findDotted(dotVxp, nodep->dotted(), baddot); // Maybe NULL
test_regress/t/t_func_lib_sub.pl
Executable
+14
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@@ -0,0 +1,14 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("./driver.pl", @ARGV, $0); die; }
# $Id$
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
compile (
);
# No execute
ok(1);
1;