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Fix errant integer promotion (#7012)
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+2
-1
@@ -18,7 +18,7 @@
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// Each module:
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// For each expression, if it requires a clean operand,
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// and the operand is dirty, insert a CLEAN node.
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// Resize operands to C++ 32/64/wide types.
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// Resize operands (but not variables or variable selects) to C++ 32/64/wide types.
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// Copy all width() values to widthMin() so RANGE, etc can still see orig widths
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//
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//*************************************************************************
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@@ -83,6 +83,7 @@ class CleanVisitor final : public VNVisitor {
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if (VN_IS(nodep, Var) //
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|| VN_IS(nodep, ConsPackMember) //
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|| VN_IS(nodep, NodeDType) // Don't want to change variable widths!
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|| VN_IS(nodep, NodeSel) // Array selects should reflect variable widths
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|| VN_IS(nodep->dtypep()->skipRefp(), AssocArrayDType) // Or arrays
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|| VN_IS(nodep->dtypep()->skipRefp(), WildcardArrayDType)
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|| VN_IS(nodep->dtypep()->skipRefp(), DynArrayDType)
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+2
-1
@@ -527,7 +527,8 @@ static void process() {
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// Bits between widthMin() and width() are irrelevant, but may be non zero.
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v3Global.widthMinUsage(VWidthMinUsage::VERILOG_WIDTH);
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// Make all expressions either 8, 16, 32 or 64 bits
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// Make all expressions 32, 64, or 32*N bits
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// Variables and selects-of-variables remain verilog-width
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V3Clean::cleanAll(v3Global.rootp());
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// Move wide constants to BLOCK temps / ConstPool.
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